JPS5634234A - Buffer circuit - Google Patents
Buffer circuitInfo
- Publication number
- JPS5634234A JPS5634234A JP11070379A JP11070379A JPS5634234A JP S5634234 A JPS5634234 A JP S5634234A JP 11070379 A JP11070379 A JP 11070379A JP 11070379 A JP11070379 A JP 11070379A JP S5634234 A JPS5634234 A JP S5634234A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- power source
- input
- transient state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
Landscapes
- Logic Circuits (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
Abstract
PURPOSE:To obtain a buffer circuit where noise is prevented from being generated even in the transient state of applying of a DC power source voltage for the logic system driven by the same DC voltage power source. CONSTITUTION:Buffer circuit 30 is provided which consists of inverter circuit 11 driven by DC voltage power source 13 and NAND gate circuit 31, and the logic signal from another system is input to circuit 11. The input terminal where the output of circuit 11 is input, Zener diode ZD connected backward to voltage power source 13, and the input terminal where the voltage between diode ZD and resistance R41 connected across the earth is input are provided in NAND gate circuit 31. When the voltage of voltage power source 13 is applied through switch 14, the circuit is so controlled that the potential at the second input terminal may be the ground level until the DC voltage exceeds the brackdown voltage of diode ZD in this transient state, thus preventing generation of noise in the transient state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11070379A JPS5634234A (en) | 1979-08-30 | 1979-08-30 | Buffer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11070379A JPS5634234A (en) | 1979-08-30 | 1979-08-30 | Buffer circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5634234A true JPS5634234A (en) | 1981-04-06 |
Family
ID=14542308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11070379A Pending JPS5634234A (en) | 1979-08-30 | 1979-08-30 | Buffer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5634234A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58189263A (en) * | 1982-04-28 | 1983-11-04 | Hitachi Chem Co Ltd | Coating fluid for sio2 film formation |
EP0173148A2 (en) * | 1984-08-29 | 1986-03-05 | Fujitsu Limited | A logic circuit |
-
1979
- 1979-08-30 JP JP11070379A patent/JPS5634234A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58189263A (en) * | 1982-04-28 | 1983-11-04 | Hitachi Chem Co Ltd | Coating fluid for sio2 film formation |
JPS6358867B2 (en) * | 1982-04-28 | 1988-11-17 | ||
EP0173148A2 (en) * | 1984-08-29 | 1986-03-05 | Fujitsu Limited | A logic circuit |
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