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JPS56142631A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56142631A
JPS56142631A JP4646480A JP4646480A JPS56142631A JP S56142631 A JPS56142631 A JP S56142631A JP 4646480 A JP4646480 A JP 4646480A JP 4646480 A JP4646480 A JP 4646480A JP S56142631 A JPS56142631 A JP S56142631A
Authority
JP
Japan
Prior art keywords
layer
opening
polycrystal
section
lasers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4646480A
Other languages
Japanese (ja)
Inventor
Osamu Hataishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4646480A priority Critical patent/JPS56142631A/en
Publication of JPS56142631A publication Critical patent/JPS56142631A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To eliminate the need for occupying area for forming a contacting section by a method wherein a semiconductor layer made up on a semiconductor substrate through an insulating film with an opening is annealed by lasers or electron beams, the semiconductor layer of the opening section is changed into a single crystal and an element is manufactured. CONSTITUTION:An insulating film 2 with an opening is made up on a semiconductor substrate 1, the film 2 is coated with a polycrystal or amorphous Si, an Si layer of the opening section is changed into a single crystal by annealing by lasers or electron beams, B, etc. are diffused and a base region 7 and a P type polycrystal Si layer 6 are built up, P, etc. are introduced and an N type emitter region 10 is formed, the polycrystal Si layer 6 is used as a wiring conductor as it is, and wiring bodies 11, 11' are made up. Thus, occupying area for forming a contacting section of an electrode and positioning allowance are not required, and high density is obtd.
JP4646480A 1980-04-09 1980-04-09 Manufacture of semiconductor device Pending JPS56142631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4646480A JPS56142631A (en) 1980-04-09 1980-04-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4646480A JPS56142631A (en) 1980-04-09 1980-04-09 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56142631A true JPS56142631A (en) 1981-11-07

Family

ID=12747883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4646480A Pending JPS56142631A (en) 1980-04-09 1980-04-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56142631A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4523962A (en) * 1982-12-13 1985-06-18 Mitsubishi Denki Kabushiki Kaisha Method for fabricating monocrystalline semiconductor layer on insulating layer by laser crystallization using a grid of anti-reflection coating disposed on poly/amorphous semiconductor
US4609407A (en) * 1979-11-21 1986-09-02 Hitachi, Ltd. Method of making three dimensional semiconductor devices in selectively laser regrown polysilicon or amorphous silicon layers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4609407A (en) * 1979-11-21 1986-09-02 Hitachi, Ltd. Method of making three dimensional semiconductor devices in selectively laser regrown polysilicon or amorphous silicon layers
US4523962A (en) * 1982-12-13 1985-06-18 Mitsubishi Denki Kabushiki Kaisha Method for fabricating monocrystalline semiconductor layer on insulating layer by laser crystallization using a grid of anti-reflection coating disposed on poly/amorphous semiconductor

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