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JPS5588368A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5588368A
JPS5588368A JP16380878A JP16380878A JPS5588368A JP S5588368 A JPS5588368 A JP S5588368A JP 16380878 A JP16380878 A JP 16380878A JP 16380878 A JP16380878 A JP 16380878A JP S5588368 A JPS5588368 A JP S5588368A
Authority
JP
Japan
Prior art keywords
film
silicon
capacitor
oxide film
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16380878A
Other languages
English (en)
Other versions
JPS607389B2 (ja
Inventor
Tatsuya Enomoto
Hiroshi Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP53163808A priority Critical patent/JPS607389B2/ja
Priority to US06/107,286 priority patent/US4322881A/en
Publication of JPS5588368A publication Critical patent/JPS5588368A/ja
Publication of JPS607389B2 publication Critical patent/JPS607389B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
JP53163808A 1978-12-26 1978-12-26 半導体装置の製造方法 Expired JPS607389B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP53163808A JPS607389B2 (ja) 1978-12-26 1978-12-26 半導体装置の製造方法
US06/107,286 US4322881A (en) 1978-12-26 1979-12-26 Method for manufacturing semiconductor memory devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53163808A JPS607389B2 (ja) 1978-12-26 1978-12-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5588368A true JPS5588368A (en) 1980-07-04
JPS607389B2 JPS607389B2 (ja) 1985-02-23

Family

ID=15781091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53163808A Expired JPS607389B2 (ja) 1978-12-26 1978-12-26 半導体装置の製造方法

Country Status (2)

Country Link
US (1) US4322881A (ja)
JP (1) JPS607389B2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5793572A (en) * 1980-12-03 1982-06-10 Nec Corp Manufacture of semiconductor device
JPS60216577A (ja) * 1984-01-26 1985-10-30 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド 半導体メモリ構造体及びその製造方法
US4761678A (en) * 1986-02-26 1988-08-02 Nec Corporation Integrated circuit semiconductor device

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654680A (en) * 1980-09-24 1987-03-31 Semiconductor Energy Laboratory Co., Ltd. Sidewall gate IGFET
US4353159A (en) * 1981-05-11 1982-10-12 Rca Corporation Method of forming self-aligned contact in semiconductor devices
US4352236A (en) * 1981-07-24 1982-10-05 Intel Corporation Double field oxidation process
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor
JPH0612619B2 (ja) * 1982-09-22 1994-02-16 株式会社日立製作所 半導体メモリ装置
DE3304651A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Dynamische halbleiterspeicherzelle mit wahlfreiem zugriff (dram) und verfahren zu ihrer herstellung
US4592799A (en) * 1983-05-09 1986-06-03 Sony Corporation Method of recrystallizing a polycrystalline, amorphous or small grain material
US4466177A (en) * 1983-06-30 1984-08-21 International Business Machines Corporation Storage capacitor optimization for one device FET dynamic RAM cell
JPS6014462A (ja) * 1983-07-05 1985-01-25 Oki Electric Ind Co Ltd 半導体メモリ素子
JP2748070B2 (ja) * 1992-05-20 1998-05-06 三菱電機株式会社 半導体装置およびその製造方法
US6780718B2 (en) * 1993-11-30 2004-08-24 Stmicroelectronics, Inc. Transistor structure and method for making same
US5830575A (en) * 1996-09-16 1998-11-03 Sandia National Laboratories Memory device using movement of protons
US6159829A (en) * 1996-09-16 2000-12-12 Warren; William L. Memory device using movement of protons
US6140157A (en) * 1998-08-05 2000-10-31 Sandia Corporation Memory device using movement of protons
US20080299780A1 (en) * 2007-06-01 2008-12-04 Uv Tech Systems, Inc. Method and apparatus for laser oxidation and reduction

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4152823A (en) * 1975-06-10 1979-05-08 Micro Power Systems High temperature refractory metal contact assembly and multiple layer interconnect structure
US4151537A (en) * 1976-03-10 1979-04-24 Gte Laboratories Incorporated Gate electrode for MNOS semiconductor memory device
US4114256A (en) * 1977-06-24 1978-09-19 Bell Telephone Laboratories, Incorporated Reliable metal-to-junction contacts in large-scale-integrated devices
US4163985A (en) * 1977-09-30 1979-08-07 The United States Of America As Represented By The Secretary Of The Air Force Nonvolatile punch through memory cell with buried n+ region in channel
US4149307A (en) * 1977-12-28 1979-04-17 Hughes Aircraft Company Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
US4174252A (en) * 1978-07-26 1979-11-13 Rca Corporation Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes
US4240845A (en) * 1980-02-04 1980-12-23 International Business Machines Corporation Method of fabricating random access memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5793572A (en) * 1980-12-03 1982-06-10 Nec Corp Manufacture of semiconductor device
JPH022298B2 (ja) * 1980-12-03 1990-01-17 Nippon Electric Co
JPS60216577A (ja) * 1984-01-26 1985-10-30 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド 半導体メモリ構造体及びその製造方法
US4761678A (en) * 1986-02-26 1988-08-02 Nec Corporation Integrated circuit semiconductor device

Also Published As

Publication number Publication date
US4322881A (en) 1982-04-06
JPS607389B2 (ja) 1985-02-23

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