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JPS5530868A - Method of making semiconductor device - Google Patents

Method of making semiconductor device

Info

Publication number
JPS5530868A
JPS5530868A JP10453278A JP10453278A JPS5530868A JP S5530868 A JPS5530868 A JP S5530868A JP 10453278 A JP10453278 A JP 10453278A JP 10453278 A JP10453278 A JP 10453278A JP S5530868 A JPS5530868 A JP S5530868A
Authority
JP
Japan
Prior art keywords
oxide film
oxidation
film
silicon substrate
oxidation techniques
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10453278A
Other languages
Japanese (ja)
Inventor
Yoshio Fujishiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP10453278A priority Critical patent/JPS5530868A/en
Publication of JPS5530868A publication Critical patent/JPS5530868A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To prevent the occurrence of any defective crystal formation in the manufacture of semiconductor devices by virtue of selected oxidation using the plate oxidation techniques and further to minimize the leakage of reverse current by the p-n junction.
CONSTITUTION: An n-type silicon substrate 3 is overlaid with an oxide film 2 by the plate oxidation techniques, while over the oxide film is formed a nitride silicon film 1. This nitride silicon film is then etched off, to form a source electrode 4 and a drain electrode 4a with p-type impurities of high concentration. Thereafter, a gate oxide film 5 is formed with contact holes 7 through each of which aluminum wiring 6 is applied. The plate oxidation techniques have an oxidation reaction proceed not on the interface of the silicon substrate and the oxide film but on the surface of the latter, and yet under a relatively low temperature of more or less 100°C, thus any distortions can be prevented from occurring in crystallization.
COPYRIGHT: (C)1980,JPO&Japio
JP10453278A 1978-08-28 1978-08-28 Method of making semiconductor device Pending JPS5530868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10453278A JPS5530868A (en) 1978-08-28 1978-08-28 Method of making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10453278A JPS5530868A (en) 1978-08-28 1978-08-28 Method of making semiconductor device

Publications (1)

Publication Number Publication Date
JPS5530868A true JPS5530868A (en) 1980-03-04

Family

ID=14383095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10453278A Pending JPS5530868A (en) 1978-08-28 1978-08-28 Method of making semiconductor device

Country Status (1)

Country Link
JP (1) JPS5530868A (en)

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