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JPS5571045A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS5571045A
JPS5571045A JP14418578A JP14418578A JPS5571045A JP S5571045 A JPS5571045 A JP S5571045A JP 14418578 A JP14418578 A JP 14418578A JP 14418578 A JP14418578 A JP 14418578A JP S5571045 A JPS5571045 A JP S5571045A
Authority
JP
Japan
Prior art keywords
lead
oxidized
nickel
lead frame
coat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14418578A
Other languages
Japanese (ja)
Inventor
Usuke Enomoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14418578A priority Critical patent/JPS5571045A/en
Publication of JPS5571045A publication Critical patent/JPS5571045A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To curtail cost of a lead frame by a method wherein a base material consists of aluminum, the surface with pellet is plated with nickel not oxidized and the surface of a lead is coated with a film by aluminum solder dipping in the lead frame for a semiconductor device.
CONSTITUTION: A common frame 1, a set of leads 2 coming in three pieces, small plates 3 connected to each lead tip, and a common branch 4 called dam are formed in series of aluminum material on a lead frame. A coat 5 of nickel not oxidized is formed at the center of each small plate 3 in a partial plating across in stripe. A semiconductor pellet 6 of small-signal transistor is mounted on a coat 5a of nickel not oxidized on the central lead, and a wire 7 is bonded from an electrode of the pellet to zones 3b, 3c on the tips of the other two leads not plated with nickel not oxidized. A coat 9 is formed on the lead part through aluminum solder dipping.
COPYRIGHT: (C)1980,JPO&Japio
JP14418578A 1978-11-24 1978-11-24 Lead frame Pending JPS5571045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14418578A JPS5571045A (en) 1978-11-24 1978-11-24 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14418578A JPS5571045A (en) 1978-11-24 1978-11-24 Lead frame

Publications (1)

Publication Number Publication Date
JPS5571045A true JPS5571045A (en) 1980-05-28

Family

ID=15356169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14418578A Pending JPS5571045A (en) 1978-11-24 1978-11-24 Lead frame

Country Status (1)

Country Link
JP (1) JPS5571045A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02110982A (en) * 1989-09-08 1990-04-24 Sharp Corp Manufacture of semiconductor device
JPH10163519A (en) * 1996-10-01 1998-06-19 Toshiba Corp Semiconductor device and method of manufacturing semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02110982A (en) * 1989-09-08 1990-04-24 Sharp Corp Manufacture of semiconductor device
JPH0553310B2 (en) * 1989-09-08 1993-08-09 Sharp Kk
JPH10163519A (en) * 1996-10-01 1998-06-19 Toshiba Corp Semiconductor device and method of manufacturing semiconductor device

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