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JPS5569831A - Channel control system - Google Patents

Channel control system

Info

Publication number
JPS5569831A
JPS5569831A JP14388678A JP14388678A JPS5569831A JP S5569831 A JPS5569831 A JP S5569831A JP 14388678 A JP14388678 A JP 14388678A JP 14388678 A JP14388678 A JP 14388678A JP S5569831 A JPS5569831 A JP S5569831A
Authority
JP
Japan
Prior art keywords
data
memory unit
sent
auxiliary memory
transfer line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14388678A
Other languages
Japanese (ja)
Other versions
JPS5844254B2 (en
Inventor
Nobuhiko Yamagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP53143886A priority Critical patent/JPS5844254B2/en
Publication of JPS5569831A publication Critical patent/JPS5569831A/en
Publication of JPS5844254B2 publication Critical patent/JPS5844254B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to edit and modify data to be transferred by chaging a flow of data between units in direction by interposing a block, where data are temporarily retained, into a data transfer line between units.
CONSTITUTION: To transfer the (n)-number data which a channel made by itself to an auxiliary memory unit, channel control part 3 writes the (n)-number data into buffer 4 through data transfer line 21. Once the auxiliary memory unit starts operating, signal 30 outputted by control block 2 places buffer 4 in data transmission mode and is also supplied to gate 19, allowing data sent through data transfer line 21 to be transferred to the auxiliary memory unit. When the first (n)-number data among those sent from the auxiliary memory unit are received by the channel and the remainder is sent to a main memory unit, data are sent from the auxiliary memory unit to transfer line 21 through gate 20 and then stored in buffer 4. After the (n)- number data are all stored, gate 17 is opened to sent all data sent from the auxiliary memory unit to the main memory unit.
COPYRIGHT: (C)1980,JPO&Japio
JP53143886A 1978-11-21 1978-11-21 Data transfer control method Expired JPS5844254B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53143886A JPS5844254B2 (en) 1978-11-21 1978-11-21 Data transfer control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53143886A JPS5844254B2 (en) 1978-11-21 1978-11-21 Data transfer control method

Publications (2)

Publication Number Publication Date
JPS5569831A true JPS5569831A (en) 1980-05-26
JPS5844254B2 JPS5844254B2 (en) 1983-10-01

Family

ID=15349304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53143886A Expired JPS5844254B2 (en) 1978-11-21 1978-11-21 Data transfer control method

Country Status (1)

Country Link
JP (1) JPS5844254B2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50117327A (en) * 1973-02-01 1975-09-13
JPS50120229A (en) * 1974-03-04 1975-09-20
JPS5360128A (en) * 1976-11-10 1978-05-30 Nippon Telegr & Teleph Corp <Ntt> Cycle steal data transfer system
JPS53132954A (en) * 1977-04-25 1978-11-20 Hitachi Ltd Data transfer controller

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50117327A (en) * 1973-02-01 1975-09-13
JPS50120229A (en) * 1974-03-04 1975-09-20
JPS5360128A (en) * 1976-11-10 1978-05-30 Nippon Telegr & Teleph Corp <Ntt> Cycle steal data transfer system
JPS53132954A (en) * 1977-04-25 1978-11-20 Hitachi Ltd Data transfer controller

Also Published As

Publication number Publication date
JPS5844254B2 (en) 1983-10-01

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