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JPS556685A - Intermediate buffer memory control system - Google Patents

Intermediate buffer memory control system

Info

Publication number
JPS556685A
JPS556685A JP7960078A JP7960078A JPS556685A JP S556685 A JPS556685 A JP S556685A JP 7960078 A JP7960078 A JP 7960078A JP 7960078 A JP7960078 A JP 7960078A JP S556685 A JPS556685 A JP S556685A
Authority
JP
Japan
Prior art keywords
memory
access
read
memories
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7960078A
Other languages
Japanese (ja)
Inventor
Akira Hattori
Yukio Soma
Takamitsu Tsuchimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7960078A priority Critical patent/JPS556685A/en
Publication of JPS556685A publication Critical patent/JPS556685A/en
Pending legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To increase the bit rate of an intermediate memory by writing data to the intermediate memory at the time of writing from a channel to a memory and by reading data out from the main memory direct when an address for a read is not in the intermediate memory, in a processor consisting of three buffer, intermediate and main memories.
CONSTITUTION: The data processing unit consists of center processors 1-0 to 1-2 with their private buffer memories 2-0 to 2-2, intermediate buffer memory 3, main memory 4, channel unit 5, and file unit 6 using a magnetic tape. To request memory access by processors 1-0 to 1-2 in this constitution, search in memories 2-0 to 2-1 stored with the addresses is made and if they can not be found there, access to memory 3 is attained. To make an access request by unit 5, it is supplied to memory 3 and a read is made, but if it does not reside there, direct access to memory 4 is attained to read the address, thereby allowing for the capacity of memory 3.
COPYRIGHT: (C)1980,JPO&Japio
JP7960078A 1978-06-30 1978-06-30 Intermediate buffer memory control system Pending JPS556685A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7960078A JPS556685A (en) 1978-06-30 1978-06-30 Intermediate buffer memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7960078A JPS556685A (en) 1978-06-30 1978-06-30 Intermediate buffer memory control system

Publications (1)

Publication Number Publication Date
JPS556685A true JPS556685A (en) 1980-01-18

Family

ID=13694493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7960078A Pending JPS556685A (en) 1978-06-30 1978-06-30 Intermediate buffer memory control system

Country Status (1)

Country Link
JP (1) JPS556685A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5746371A (en) * 1980-09-04 1982-03-16 Nec Corp Cash storage device
JP2008204488A (en) * 2008-05-29 2008-09-04 Renesas Technology Corp Multi-processor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187927A (en) * 1975-01-31 1976-07-31 Hitachi Ltd
JPS5242032A (en) * 1975-09-29 1977-04-01 Hitachi Ltd Data processing unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187927A (en) * 1975-01-31 1976-07-31 Hitachi Ltd
JPS5242032A (en) * 1975-09-29 1977-04-01 Hitachi Ltd Data processing unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5746371A (en) * 1980-09-04 1982-03-16 Nec Corp Cash storage device
JP2008204488A (en) * 2008-05-29 2008-09-04 Renesas Technology Corp Multi-processor device

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