JPS5518162A - Noise reduction circuit - Google Patents
Noise reduction circuitInfo
- Publication number
- JPS5518162A JPS5518162A JP9126678A JP9126678A JPS5518162A JP S5518162 A JPS5518162 A JP S5518162A JP 9126678 A JP9126678 A JP 9126678A JP 9126678 A JP9126678 A JP 9126678A JP S5518162 A JPS5518162 A JP S5518162A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- amplifier
- recording time
- time
- high band
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
PURPOSE: To reduce the noise in a simple structure to ensure a suitable application for the IC formation by intensifying the high band with connection between the input amplifier and the resistance circuit at the sound recording time and then obtaining the output featuring the opposite characteristics to the recording time by applying the negative feedback signal to the input amplifier at the reproducing time.
CONSTITUTION: The signals from input terminal 1E are applied to input amplifier 21 at the sound recording time. And if the value of resistors 22 and 23 are referred to as R1 and R2, the flat signal festuring the gain of (R1+R2)/R2 is supplied to variable HPF7, amplifier 8 and limiter 9 each to form the signal which intensifies the high band. This signal is added 27 with the flat signal to be delivered 11E via buffer amplifier 28. At the reproducing time, the signals sent from register 28, HPF7, amplifier 8 and limiter 9 are fed negatively back to the signal from input terminal 1D, and then the signal of amplifier 21 is delivered 11D under the sufficient gain of and the opposite characteristics to the recording time. Thus, both the high band intensification of the recording time and the opposite characteristics of the reproducing time can be secured. As a result, the noise can be reduced to ensure a suitable application for the IC formation.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9126678A JPS5518162A (en) | 1978-07-26 | 1978-07-26 | Noise reduction circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9126678A JPS5518162A (en) | 1978-07-26 | 1978-07-26 | Noise reduction circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5518162A true JPS5518162A (en) | 1980-02-08 |
JPS6249762B2 JPS6249762B2 (en) | 1987-10-21 |
Family
ID=14021616
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9126678A Granted JPS5518162A (en) | 1978-07-26 | 1978-07-26 | Noise reduction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5518162A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243837U (en) * | 1975-09-20 | 1977-03-28 | ||
JPS5313965A (en) * | 1976-07-23 | 1978-02-08 | Mitsubishi Electric Corp | Synchronism indicator |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243837B2 (en) * | 1973-07-17 | 1977-11-02 |
-
1978
- 1978-07-26 JP JP9126678A patent/JPS5518162A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243837U (en) * | 1975-09-20 | 1977-03-28 | ||
JPS5313965A (en) * | 1976-07-23 | 1978-02-08 | Mitsubishi Electric Corp | Synchronism indicator |
Also Published As
Publication number | Publication date |
---|---|
JPS6249762B2 (en) | 1987-10-21 |
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