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JPS55157052A - Disc cash control system - Google Patents

Disc cash control system

Info

Publication number
JPS55157052A
JPS55157052A JP6544279A JP6544279A JPS55157052A JP S55157052 A JPS55157052 A JP S55157052A JP 6544279 A JP6544279 A JP 6544279A JP 6544279 A JP6544279 A JP 6544279A JP S55157052 A JPS55157052 A JP S55157052A
Authority
JP
Japan
Prior art keywords
record length
instruction
disc
record
length
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6544279A
Other languages
Japanese (ja)
Other versions
JPS6331807B2 (en
Inventor
Hiroshi Hatsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6544279A priority Critical patent/JPS55157052A/en
Publication of JPS55157052A publication Critical patent/JPS55157052A/en
Publication of JPS6331807B2 publication Critical patent/JPS6331807B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To increase the number of records to be stored and to increase the probability of discovery of record to be desired by bypassing the disc cash memory to the access instruction requesting data transfer longer than the predetermined data length.
CONSTITUTION: The instruction from CPU1 to a disc unit 5 is interpreted at an instruction interpreting circuit 22, the information relating to the record length is extracted, the record length is calculated at a record length identifying circuit 23, and it is compared with the predetermined record length at a record length comparison circuit 25. If the record length read out with this instruction is to bypass the cash, a signal is output to the write-in control circuit 26 to inhibit the write-in to the disc cash memory section 3 and the read out data is directly given to the CPU1.
COPYRIGHT: (C)1980,JPO&Japio
JP6544279A 1979-05-25 1979-05-25 Disc cash control system Granted JPS55157052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6544279A JPS55157052A (en) 1979-05-25 1979-05-25 Disc cash control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6544279A JPS55157052A (en) 1979-05-25 1979-05-25 Disc cash control system

Publications (2)

Publication Number Publication Date
JPS55157052A true JPS55157052A (en) 1980-12-06
JPS6331807B2 JPS6331807B2 (en) 1988-06-27

Family

ID=13287245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6544279A Granted JPS55157052A (en) 1979-05-25 1979-05-25 Disc cash control system

Country Status (1)

Country Link
JP (1) JPS55157052A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161059A (en) * 1981-11-27 1983-09-24 ストレ−ジ・テクノロジ−・コ−ポレ−シヨン Cash buffer memory subsystem
JPS58161051A (en) * 1981-11-27 1983-09-24 ストレ−ジ・テクノロジ−・コ−ポレ−シヨン Apparatus for re-forming data path for controlling errors
JPH0460730A (en) * 1990-06-28 1992-02-26 Nec Corp Cache control system
EP1130590A3 (en) * 2000-03-03 2003-07-16 Hitachi, Ltd. High reliability storage drive and data write method
US7062664B2 (en) 1997-07-25 2006-06-13 Canon Kabushiki Kaisha Bus management based on bus status

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01128605U (en) * 1988-02-25 1989-09-01
JPH01131303U (en) * 1988-03-03 1989-09-06

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53126828A (en) * 1977-04-13 1978-11-06 Hitachi Ltd Storage control unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53126828A (en) * 1977-04-13 1978-11-06 Hitachi Ltd Storage control unit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161059A (en) * 1981-11-27 1983-09-24 ストレ−ジ・テクノロジ−・コ−ポレ−シヨン Cash buffer memory subsystem
JPS58161051A (en) * 1981-11-27 1983-09-24 ストレ−ジ・テクノロジ−・コ−ポレ−シヨン Apparatus for re-forming data path for controlling errors
JPH0460730A (en) * 1990-06-28 1992-02-26 Nec Corp Cache control system
US7062664B2 (en) 1997-07-25 2006-06-13 Canon Kabushiki Kaisha Bus management based on bus status
EP1130590A3 (en) * 2000-03-03 2003-07-16 Hitachi, Ltd. High reliability storage drive and data write method
US7031092B2 (en) 2000-03-03 2006-04-18 Hitachi Global Storage Technologies Japan, Ltd. High reliability storage drive and data write method

Also Published As

Publication number Publication date
JPS6331807B2 (en) 1988-06-27

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