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JPS55151357A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS55151357A
JPS55151357A JP5994079A JP5994079A JPS55151357A JP S55151357 A JPS55151357 A JP S55151357A JP 5994079 A JP5994079 A JP 5994079A JP 5994079 A JP5994079 A JP 5994079A JP S55151357 A JPS55151357 A JP S55151357A
Authority
JP
Japan
Prior art keywords
plating
wires
plated
lead frame
die stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5994079A
Other languages
Japanese (ja)
Other versions
JPS633462B2 (en
Inventor
Katsuyoshi Miyairi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5994079A priority Critical patent/JPS55151357A/en
Publication of JPS55151357A publication Critical patent/JPS55151357A/en
Publication of JPS633462B2 publication Critical patent/JPS633462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable common use of plating mask by partly plating only special boundary inside the inner frame in a lead frame for a semiconductor partly plated at a die stage and metallic fine wire connector. CONSTITUTION:When plating the die stage 4 of a lead frame for a resin sealed semiconductor device having 16 external lead wires 5 and the die stage to the metallic fine wire connector 7, a plurality of internal lead wires 1 in parallel inside the inner frame 2 are divided into plated wires and not-plated wires via a boundary lines 11 perpendicularly crossed with the wires and plated. In this manner, in case of the lead wires in the same number but different patterns, when the patterns except the connectors and the die stage are formed in the same mask pattern for plating, the mask 10 for the plating can be sufficient with only one type. Therefore, it can increase the mass productivity and reduce the cost of the lead frame for the semiconductor device.
JP5994079A 1979-05-16 1979-05-16 Lead frame for semiconductor device Granted JPS55151357A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5994079A JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5994079A JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Publications (2)

Publication Number Publication Date
JPS55151357A true JPS55151357A (en) 1980-11-25
JPS633462B2 JPS633462B2 (en) 1988-01-23

Family

ID=13127631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5994079A Granted JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS55151357A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02154454A (en) * 1988-12-06 1990-06-13 Shinko Electric Ind Co Ltd Working of lead frame
JPH02156659A (en) * 1988-12-09 1990-06-15 Shinko Electric Ind Co Ltd Manufacture of lead frame

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144263A (en) * 1977-05-21 1978-12-15 Mitsubishi Electric Corp Partial plating device for lead frame of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144263A (en) * 1977-05-21 1978-12-15 Mitsubishi Electric Corp Partial plating device for lead frame of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02154454A (en) * 1988-12-06 1990-06-13 Shinko Electric Ind Co Ltd Working of lead frame
JPH02156659A (en) * 1988-12-09 1990-06-15 Shinko Electric Ind Co Ltd Manufacture of lead frame

Also Published As

Publication number Publication date
JPS633462B2 (en) 1988-01-23

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