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JPS55132037A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS55132037A
JPS55132037A JP3950979A JP3950979A JPS55132037A JP S55132037 A JPS55132037 A JP S55132037A JP 3950979 A JP3950979 A JP 3950979A JP 3950979 A JP3950979 A JP 3950979A JP S55132037 A JPS55132037 A JP S55132037A
Authority
JP
Japan
Prior art keywords
ion
laser beam
wafer
implanted
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3950979A
Other languages
Japanese (ja)
Inventor
Toshio Yonezawa
Shunichi Kai
Shigeo Furuguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3950979A priority Critical patent/JPS55132037A/en
Publication of JPS55132037A publication Critical patent/JPS55132037A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To decrease manufacturing cost by a method wherein an impurity ion is implanted in a semiconductor layer in the same means, and then pn-junction is formed through heat treatment by means of laser beam. CONSTITUTION:A semiconductor device manufacturing device is obtained through combining and coupling a semiconductor wafer container 1 for ion implantation, an ion generating source 2 and a laser beam generator 3. Under constituting such manufacturing means, an ion is generated from the ion generating source 2, the impurity ion is implanted on a wafer arranged in the wafer container 1, and a laser beam from the laser beam generator 3 is irradiated to an ion-implanted region to produce pn-junction through heat treatment. It is then not necessary to transfer the wafer, leading to cost lowering; it is also not necessary to heat annecessary portion of the wafer, thus minimizing an occurrence of a crystal defect due to heat shock.
JP3950979A 1979-04-02 1979-04-02 Manufacture of semiconductor device Pending JPS55132037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3950979A JPS55132037A (en) 1979-04-02 1979-04-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3950979A JPS55132037A (en) 1979-04-02 1979-04-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS55132037A true JPS55132037A (en) 1980-10-14

Family

ID=12555001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3950979A Pending JPS55132037A (en) 1979-04-02 1979-04-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55132037A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073534A (en) * 1996-05-15 2007-03-22 Semiconductor Energy Lab Co Ltd Doping processor
US8003958B2 (en) 1996-05-15 2011-08-23 Semiconductor Energy Laboratory Co., Ltd. Apparatus and method for doping

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073534A (en) * 1996-05-15 2007-03-22 Semiconductor Energy Lab Co Ltd Doping processor
US8003958B2 (en) 1996-05-15 2011-08-23 Semiconductor Energy Laboratory Co., Ltd. Apparatus and method for doping
US8344336B2 (en) 1996-05-15 2013-01-01 Semiconductor Energy Laboratory Co., Ltd. Apparatus and method for doping

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