[go: up one dir, main page]

JPS55120251A - Data processing method - Google Patents

Data processing method

Info

Publication number
JPS55120251A
JPS55120251A JP2734579A JP2734579A JPS55120251A JP S55120251 A JPS55120251 A JP S55120251A JP 2734579 A JP2734579 A JP 2734579A JP 2734579 A JP2734579 A JP 2734579A JP S55120251 A JPS55120251 A JP S55120251A
Authority
JP
Japan
Prior art keywords
flag
output
word
error
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2734579A
Other languages
Japanese (ja)
Other versions
JPS5840381B2 (en
Inventor
Hiroaki Uchiumi
Kiyoshi Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP2734579A priority Critical patent/JPS5840381B2/en
Publication of JPS55120251A publication Critical patent/JPS55120251A/en
Publication of JPS5840381B2 publication Critical patent/JPS5840381B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0079—Formats for control data
    • H04L1/0082—Formats for control data fields explicitly indicating existence of error in data being transmitted, e.g. so that downstream stations can avoid decoding erroneous packet; relays

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To prevent a composite word from being processed as error data even when a transmission error occurs, by adding an error flag to word data. CONSTITUTION:Receiving signal SR is code-decided 11 and the decision result is inputted to parity check part 12, shift register 13 and synchronizing word detection part 15. The output of register 13 is supplied to double-transmission collation part 16 and colated there with the output of bit counter 14 and when collation is completed, its output is supplied to error proceesing part 17. Then, the existenece of a parity check NG flag is formed under the condition of counter 14 and stored in memory 18. The existence of this flag is set on each word unit of frame constitution. At transfer timing determined by the cndition of counter 14, output data of register 13 and the flag of memory 18 are coupled 19 and supplied to external unit 20.
JP2734579A 1979-03-09 1979-03-09 data processing equipment Expired JPS5840381B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2734579A JPS5840381B2 (en) 1979-03-09 1979-03-09 data processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2734579A JPS5840381B2 (en) 1979-03-09 1979-03-09 data processing equipment

Publications (2)

Publication Number Publication Date
JPS55120251A true JPS55120251A (en) 1980-09-16
JPS5840381B2 JPS5840381B2 (en) 1983-09-05

Family

ID=12218449

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2734579A Expired JPS5840381B2 (en) 1979-03-09 1979-03-09 data processing equipment

Country Status (1)

Country Link
JP (1) JPS5840381B2 (en)

Also Published As

Publication number Publication date
JPS5840381B2 (en) 1983-09-05

Similar Documents

Publication Publication Date Title
EP0323030A3 (en) Data processing, including correcting stored data groups
JPS6468842A (en) Error detecting and correcting circuit
JPS55120251A (en) Data processing method
JPS54140437A (en) Parallel process system
JPS5666947A (en) Data transmission method
JPS5683154A (en) Transmission method for pcm data
JPS54140813A (en) Frame synchronization system
JPS57162550A (en) Battery checking system
JPS55157022A (en) Output circuit for microcomputer
JPS5725769A (en) Receiving system of facsimile picture information
JPS5592054A (en) Unique word detection circuit
JPS5413236A (en) Bus control system
JPS52130249A (en) Register write-in system
JPS54124947A (en) Error check system of arithmetic circuit
JPS5587254A (en) Parity check system for two-way bus
JPS5353932A (en) Fault detection system for memory address line
JPS5755446A (en) Check system for digital transfer data
JPS56132645A (en) Check system of input data selection signal for register
JPS5530770A (en) Detection system for control circuit failure by tracer
JPS57137938A (en) Data processor
JPS5654696A (en) Memory device
JPS5595449A (en) Framing code detection circuit
JPS6423636A (en) Signal protecting circuit
JPS55139699A (en) Error detection system of memory unit
JPS56156043A (en) Transmitting system of series data