JPS5498948A - Initial set up method - Google Patents
Initial set up methodInfo
- Publication number
- JPS5498948A JPS5498948A JP634978A JP634978A JPS5498948A JP S5498948 A JPS5498948 A JP S5498948A JP 634978 A JP634978 A JP 634978A JP 634978 A JP634978 A JP 634978A JP S5498948 A JPS5498948 A JP S5498948A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- voltage
- initial set
- charging
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
PURPOSE: To minimize the fluctuation of an initial set up time and to reduce the size of a capacitor by adding the initial build up voltage of the power source to a level shift circuit to delay the charging of the capacitor.
CONSTITUTION: The initial build up voltage at the time of power source throw-in is added to a level shift circuit 10 which is actuated when its voltage reaches the sum of threshold voltage of respective MOS transistors 14 and 15 to turn on a switching MOS transistor 11 to charge a capacitor 12 the charged level of which is detected by the threshold voltage of an inverter circuit 13 to complete the initial set up. Thus, the charging of the capacitor 12 is delayed by the level shift circuit 10 thereby increasing the slope of charging voltage characteristic curve to reduce the size of the capacitor for inclusion in LSI and to shorten the initial set up time.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP634978A JPS5498948A (en) | 1978-01-20 | 1978-01-20 | Initial set up method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP634978A JPS5498948A (en) | 1978-01-20 | 1978-01-20 | Initial set up method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5498948A true JPS5498948A (en) | 1979-08-04 |
Family
ID=11635885
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP634978A Pending JPS5498948A (en) | 1978-01-20 | 1978-01-20 | Initial set up method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5498948A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62234418A (en) * | 1986-03-14 | 1987-10-14 | ウエスタン、デジタル、コ−ポレ−シヨン | Power-up reset circuit |
| JPH06296126A (en) * | 1993-07-23 | 1994-10-21 | Toshiba Corp | Control pulse signal generating circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5347893U (en) * | 1976-09-28 | 1978-04-22 | ||
| JPS5347893A (en) * | 1976-10-12 | 1978-04-28 | Yoshihiko Ueda | Automatic device for separate pouring |
-
1978
- 1978-01-20 JP JP634978A patent/JPS5498948A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5347893U (en) * | 1976-09-28 | 1978-04-22 | ||
| JPS5347893A (en) * | 1976-10-12 | 1978-04-28 | Yoshihiko Ueda | Automatic device for separate pouring |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62234418A (en) * | 1986-03-14 | 1987-10-14 | ウエスタン、デジタル、コ−ポレ−シヨン | Power-up reset circuit |
| JPH06296126A (en) * | 1993-07-23 | 1994-10-21 | Toshiba Corp | Control pulse signal generating circuit |
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