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JPS5492142A - Communication controller - Google Patents

Communication controller

Info

Publication number
JPS5492142A
JPS5492142A JP16045777A JP16045777A JPS5492142A JP S5492142 A JPS5492142 A JP S5492142A JP 16045777 A JP16045777 A JP 16045777A JP 16045777 A JP16045777 A JP 16045777A JP S5492142 A JPS5492142 A JP S5492142A
Authority
JP
Japan
Prior art keywords
circuit
code
control
register
indication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16045777A
Other languages
Japanese (ja)
Other versions
JPS5653772B2 (en
Inventor
Akio Hanazawa
Setsuo Kugimiya
Taiho Higuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16045777A priority Critical patent/JPS5492142A/en
Publication of JPS5492142A publication Critical patent/JPS5492142A/en
Publication of JPS5653772B2 publication Critical patent/JPS5653772B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Communication Control (AREA)

Abstract

PURPOSE: To enable a controller to conform to various circuits only by indicating a code system, etc., through control programs, by providing an indication-information storage part to which code-system indication information and unit-number information are written through the indication of control programs.
CONSTITUTION: The circuit control circuit used by the communication control circuit consists of circuit control word memory 1 stored with several circuit control words 50 provided to each circuit, read register 2, input register 3, circuit control word memory control circuit 4, unit-number register 5, and synchronizing-code register 6. The circuit-mode assignment field constituting control word 50 indicates, for example, that a circuit is the EBCIDIC code system, USASCII code system, of SBT (six units) code system, and when it is one of three, code X"C", X"D", or X"E" (X dentoes sexadecimal representation) is written. In case of X"E", a synchronizing code and character segmentation position are detected referring to contents of registers 5 and 6.
COPYRIGHT: (C)1979,JPO&Japio
JP16045777A 1977-12-29 1977-12-29 Communication controller Granted JPS5492142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16045777A JPS5492142A (en) 1977-12-29 1977-12-29 Communication controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16045777A JPS5492142A (en) 1977-12-29 1977-12-29 Communication controller

Publications (2)

Publication Number Publication Date
JPS5492142A true JPS5492142A (en) 1979-07-21
JPS5653772B2 JPS5653772B2 (en) 1981-12-21

Family

ID=15715342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16045777A Granted JPS5492142A (en) 1977-12-29 1977-12-29 Communication controller

Country Status (1)

Country Link
JP (1) JPS5492142A (en)

Also Published As

Publication number Publication date
JPS5653772B2 (en) 1981-12-21

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