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JPS5484468A - Analog-digital converter - Google Patents

Analog-digital converter

Info

Publication number
JPS5484468A
JPS5484468A JP15277277A JP15277277A JPS5484468A JP S5484468 A JPS5484468 A JP S5484468A JP 15277277 A JP15277277 A JP 15277277A JP 15277277 A JP15277277 A JP 15277277A JP S5484468 A JPS5484468 A JP S5484468A
Authority
JP
Japan
Prior art keywords
current source
resistance
current
output current
lower limit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15277277A
Other languages
Japanese (ja)
Inventor
Kazuo Murano
Kiichi Matsuda
Yutaka Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15277277A priority Critical patent/JPS5484468A/en
Publication of JPS5484468A publication Critical patent/JPS5484468A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To secure the high-accuracy A-D conversion by suppressing the variation of the output current of the amplifier in the comparator group of the multi-value feedback type.
CONSTITUTION: Current source I3 is connected to both ends of division resistance R which obtains the comparison reference voltage for comparator group containing two units of current source I2 and I3 to perform the comparison with the analog signals via the current switch circuit consisting of transistor Q1, Q2 and others. At the same time, current source I2 is connected to one end of resistance R. Then current source I2 and I3 are formed in order to satisfy the fixed conditions which are determined by resistance R and the difference between the upper and lower limit reference voltage of the 1at and 2nd decision. As a result, the output current becomes identical between output step amplifier AMP1 and AMP2 for upper limit voltage generator circuit UVG and lower limit voltage generator circuit DVG, and at the same time no output current exists at the 1st and 2nd decision time each.
COPYRIGHT: (C)1979,JPO&Japio
JP15277277A 1977-12-19 1977-12-19 Analog-digital converter Pending JPS5484468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15277277A JPS5484468A (en) 1977-12-19 1977-12-19 Analog-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15277277A JPS5484468A (en) 1977-12-19 1977-12-19 Analog-digital converter

Publications (1)

Publication Number Publication Date
JPS5484468A true JPS5484468A (en) 1979-07-05

Family

ID=15547803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15277277A Pending JPS5484468A (en) 1977-12-19 1977-12-19 Analog-digital converter

Country Status (1)

Country Link
JP (1) JPS5484468A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10125805B2 (en) 2015-04-21 2018-11-13 Sungwoo Hitech Co., Ltd Rivet screw drill

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10125805B2 (en) 2015-04-21 2018-11-13 Sungwoo Hitech Co., Ltd Rivet screw drill

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