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JPS5483328A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS5483328A
JPS5483328A JP15129477A JP15129477A JPS5483328A JP S5483328 A JPS5483328 A JP S5483328A JP 15129477 A JP15129477 A JP 15129477A JP 15129477 A JP15129477 A JP 15129477A JP S5483328 A JPS5483328 A JP S5483328A
Authority
JP
Japan
Prior art keywords
buffer memory
contents
main memory
unit
discrepancy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15129477A
Other languages
Japanese (ja)
Other versions
JPS6036617B2 (en
Inventor
Naoya Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP52151294A priority Critical patent/JPS6036617B2/en
Publication of JPS5483328A publication Critical patent/JPS5483328A/en
Publication of JPS6036617B2 publication Critical patent/JPS6036617B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To erase equivalently the corresponding data from the buffer memory at the instant when a possibility arises that discrepancy of the contents may occur between the main memory unit and the buffer memory, thereby making high-speed erasure possible.
CONSTITUTION: To the data address on main memory unit 9 are added identification No. and the address tag for information unit to be erased from buffer memory 8; and when a possibility arises that discrepancy of contents may occur between main memory unit 9 and buffer memory 8, the contents of this address tag are changed, thereby equivalently erasing the corresponding data from buffer memory 8. This procedure makes possible high-speed erasure, because there is no need of performing retrieval in respect of the entire set, when the information unit concerned is to be erased.
COPYRIGHT: (C)1979,JPO&Japio
JP52151294A 1977-12-15 1977-12-15 information processing system Expired JPS6036617B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52151294A JPS6036617B2 (en) 1977-12-15 1977-12-15 information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52151294A JPS6036617B2 (en) 1977-12-15 1977-12-15 information processing system

Publications (2)

Publication Number Publication Date
JPS5483328A true JPS5483328A (en) 1979-07-03
JPS6036617B2 JPS6036617B2 (en) 1985-08-21

Family

ID=15515530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52151294A Expired JPS6036617B2 (en) 1977-12-15 1977-12-15 information processing system

Country Status (1)

Country Link
JP (1) JPS6036617B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6291630U (en) * 1985-11-29 1987-06-11

Also Published As

Publication number Publication date
JPS6036617B2 (en) 1985-08-21

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