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JPS5467732A - Information processing system controller - Google Patents

Information processing system controller

Info

Publication number
JPS5467732A
JPS5467732A JP13511277A JP13511277A JPS5467732A JP S5467732 A JPS5467732 A JP S5467732A JP 13511277 A JP13511277 A JP 13511277A JP 13511277 A JP13511277 A JP 13511277A JP S5467732 A JPS5467732 A JP S5467732A
Authority
JP
Japan
Prior art keywords
signals
connection
switch
requesting
system controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13511277A
Other languages
Japanese (ja)
Inventor
Masatoshi Tominaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13511277A priority Critical patent/JPS5467732A/en
Publication of JPS5467732A publication Critical patent/JPS5467732A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To determine arbitrarily the switch occupation time of a connection requesting unit by providing a system controller, which has switch control circuits correspondingly to connection destination units, and connecting units in the system.
CONSTITUTION: Information processing system controller 1 transmits connection requesting signals 2000 to 2070 and 1200 to 1270 as well as continuation requesting signals 2100 to 2170 to request the continuation of switch connection simultaneously with command/data 180 to 187 to be transferred. When receiving these signals, controller 1 selects the switch circuit provided correspondingly to the connection destination unit by using decode circuits 120 to 127 on a basis of connection requesting signals and connection destination indicating signals 1200 to 1270. By giving connection requesting signals to decode circuit enable terminal E, the switch circuit generates selection signals 1201 to 1278. In this circuit, an arbitrary switch occupation time which is requested by the connection requesting unit can be given, and various unit connections are possible.
COPYRIGHT: (C)1979,JPO&Japio
JP13511277A 1977-11-09 1977-11-09 Information processing system controller Pending JPS5467732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13511277A JPS5467732A (en) 1977-11-09 1977-11-09 Information processing system controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13511277A JPS5467732A (en) 1977-11-09 1977-11-09 Information processing system controller

Publications (1)

Publication Number Publication Date
JPS5467732A true JPS5467732A (en) 1979-05-31

Family

ID=15144105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13511277A Pending JPS5467732A (en) 1977-11-09 1977-11-09 Information processing system controller

Country Status (1)

Country Link
JP (1) JPS5467732A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4817441A (en) * 1988-05-02 1989-04-04 O'donnell & Associates, Inc. Process and apparatus for obtaining a gas sample

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4817441A (en) * 1988-05-02 1989-04-04 O'donnell & Associates, Inc. Process and apparatus for obtaining a gas sample

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