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JPS5454563A - Bit phase synchronous circuit - Google Patents

Bit phase synchronous circuit

Info

Publication number
JPS5454563A
JPS5454563A JP12169777A JP12169777A JPS5454563A JP S5454563 A JPS5454563 A JP S5454563A JP 12169777 A JP12169777 A JP 12169777A JP 12169777 A JP12169777 A JP 12169777A JP S5454563 A JPS5454563 A JP S5454563A
Authority
JP
Japan
Prior art keywords
digital signal
circuit
clock
delayed
reception digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12169777A
Other languages
Japanese (ja)
Inventor
Haruo Tsuda
Yoshihiro Kamimura
Hidetoshi Shirakawa
Moriyuki Yamamoto
Susumu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP12169777A priority Critical patent/JPS5454563A/en
Publication of JPS5454563A publication Critical patent/JPS5454563A/en
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: To remarkably simplify the circuit constitution, by selecting either of the reception digital signal or the delayed digital signal, through the detection of the varying point detection signal and the phase of clock.
CONSTITUTION: The circuit consists of the delay circuit DL, differentiation circuits DF1 and DF2, AND gates A1 and A2, FF FF1, FF2 and selection circuit SEL. The reception digital signal is delayed with the circuit DL, the varying of the delayed digital signal and the reception digital signal is detected with the circuits DF1 and DF2, the phase of the carrying point detection signal and the clock cl is detected with the gates A1 and A2, thus, either of the reception digital signal or the delayed digital signal is selected with the circuit SEL, and read in is made by using the clock cl through FF2. Further, the front time margin in reading in FF2, the output pulse width of DF1 and DF2 assures and the rear time margin is assured by the pulse width of the clock cl
COPYRIGHT: (C)1979,JPO&Japio
JP12169777A 1977-10-11 1977-10-11 Bit phase synchronous circuit Pending JPS5454563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12169777A JPS5454563A (en) 1977-10-11 1977-10-11 Bit phase synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12169777A JPS5454563A (en) 1977-10-11 1977-10-11 Bit phase synchronous circuit

Publications (1)

Publication Number Publication Date
JPS5454563A true JPS5454563A (en) 1979-04-28

Family

ID=14817632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12169777A Pending JPS5454563A (en) 1977-10-11 1977-10-11 Bit phase synchronous circuit

Country Status (1)

Country Link
JP (1) JPS5454563A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249351U (en) * 1986-08-22 1987-03-26
JPH02168754A (en) * 1988-02-26 1990-06-28 American Teleph & Telegr Co <Att> Clock skew correcting
JPH0353629A (en) * 1989-07-21 1991-03-07 Hitachi Ltd Bit phase synchronization circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249351U (en) * 1986-08-22 1987-03-26
JPH02168754A (en) * 1988-02-26 1990-06-28 American Teleph & Telegr Co <Att> Clock skew correcting
JPH0353629A (en) * 1989-07-21 1991-03-07 Hitachi Ltd Bit phase synchronization circuit

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