[go: up one dir, main page]

JPS54154948A - Data process system - Google Patents

Data process system

Info

Publication number
JPS54154948A
JPS54154948A JP6414678A JP6414678A JPS54154948A JP S54154948 A JPS54154948 A JP S54154948A JP 6414678 A JP6414678 A JP 6414678A JP 6414678 A JP6414678 A JP 6414678A JP S54154948 A JPS54154948 A JP S54154948A
Authority
JP
Japan
Prior art keywords
terminal
state
stop
stop indication
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6414678A
Other languages
Japanese (ja)
Other versions
JPS5760651B2 (en
Inventor
Hisashi Ibe
Takemasa Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6414678A priority Critical patent/JPS54154948A/en
Publication of JPS54154948A publication Critical patent/JPS54154948A/en
Publication of JPS5760651B2 publication Critical patent/JPS5760651B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To secure shifting to the stop state corresponding to the stop indication when the stop indication occurs from the terminal to the central process unit by examining the busy state of each terminal.
CONSTITUTION: Central process unit 1 features the control function (channel) for the terminal. When the stop indication is given from the terminal, unit 1 shifts to the channel control program at the break of the macroorder. This program gives the sequential access to the subchannel memories existing at each terminal for examination of the terminal state. In case some terminal is under execution, the input/output given from the corresponding terminal is carried out. If the terminal under execution does not exist or the terminal is put under the hang-up state after holding the input/ output, the busy display is erased to shift to the stop state.
COPYRIGHT: (C)1979,JPO&Japio
JP6414678A 1978-05-29 1978-05-29 Data process system Granted JPS54154948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6414678A JPS54154948A (en) 1978-05-29 1978-05-29 Data process system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6414678A JPS54154948A (en) 1978-05-29 1978-05-29 Data process system

Publications (2)

Publication Number Publication Date
JPS54154948A true JPS54154948A (en) 1979-12-06
JPS5760651B2 JPS5760651B2 (en) 1982-12-21

Family

ID=13249637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6414678A Granted JPS54154948A (en) 1978-05-29 1978-05-29 Data process system

Country Status (1)

Country Link
JP (1) JPS54154948A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214859A (en) * 1987-03-04 1988-09-07 Nec Corp Synchronizing type data output circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057549A (en) * 1973-09-20 1975-05-20
JPS534428A (en) * 1976-07-02 1978-01-17 Hitachi Ltd Power supply interlock unit in data transmission system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057549A (en) * 1973-09-20 1975-05-20
JPS534428A (en) * 1976-07-02 1978-01-17 Hitachi Ltd Power supply interlock unit in data transmission system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214859A (en) * 1987-03-04 1988-09-07 Nec Corp Synchronizing type data output circuit

Also Published As

Publication number Publication date
JPS5760651B2 (en) 1982-12-21

Similar Documents

Publication Publication Date Title
JPS54154948A (en) Data process system
JPS545343A (en) Micro program processing system
JPS5235929A (en) Program reservation system
JPS53121429A (en) Duplex memory unit
JPS5631146A (en) Automatic testing system for information processor
JPS5431222A (en) Character information memory system
JPS52107741A (en) Peripheral control unit
JPS54114139A (en) Input/output interface control system
JPS5248446A (en) Micro diagnosis system
JPS5520565A (en) Computer system
JPS55105729A (en) Data processing unit
JPS5328497A (en) Tester for coin selector
JPS5384651A (en) Automatic test control system
JPS5437654A (en) Data erase system for register
JPS52130245A (en) Control system for information collection memory unit
JPS55159257A (en) Debugging system
JPS553047A (en) Microdiagnosis system
JPS53124042A (en) Preceding reading control device
JPS5478640A (en) Channel control system
JPS52151526A (en) Character reduction system
JPS53139442A (en) Data input process control system
JPS5523539A (en) Input/output control unit
JPS5313324A (en) Input/output device
JPS5388548A (en) Diagnosis control system
JPS5631119A (en) Setting system for lower-rank device