[go: up one dir, main page]

JPS54154214A - Multi-character broadcast transmitter-receiver - Google Patents

Multi-character broadcast transmitter-receiver

Info

Publication number
JPS54154214A
JPS54154214A JP6216578A JP6216578A JPS54154214A JP S54154214 A JPS54154214 A JP S54154214A JP 6216578 A JP6216578 A JP 6216578A JP 6216578 A JP6216578 A JP 6216578A JP S54154214 A JPS54154214 A JP S54154214A
Authority
JP
Japan
Prior art keywords
pattern information
memory
lateral
memorized
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6216578A
Other languages
Japanese (ja)
Other versions
JPS5719914B2 (en
Inventor
Tetsuo Inose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP6216578A priority Critical patent/JPS54154214A/en
Publication of JPS54154214A publication Critical patent/JPS54154214A/en
Publication of JPS5719914B2 publication Critical patent/JPS5719914B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Television Systems (AREA)

Abstract

PURPOSE: To give addressing and display to one lateral line of the pattern information memorized in the main memory by using the bit clock pulse synchronized with the pulse cycle of the plural dots in the lateral direction of the pattern information at the X-address counter.
CONSTITUTION: Buffer memory 16 memorizes the character pattern information by the amount equivalent to one transmission unit, and transfer gate 18 reads out in sequence the character pattern information memorized in memory 16 in the longitudinal direction of the pattern information with every unit of the lateral plural dots to transfer the information selectively to main memory 21. The counter input value which is driven by the vertical synchronous signal and varies every field is given the initial setting via the signal shown by the display start position of the rateral direction of the screen in order to read out the character pattern information transferred and memorized in memory 21. After this, the addressing and display are given to one lateral line of the pattern information memorized in memory 21 via the bit clock pulse which is synchronized with the pulse cycle of the lateral plural dots of the pattern information at X-address counter 13.
COPYRIGHT: (C)1979,JPO&Japio
JP6216578A 1978-05-26 1978-05-26 Multi-character broadcast transmitter-receiver Granted JPS54154214A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6216578A JPS54154214A (en) 1978-05-26 1978-05-26 Multi-character broadcast transmitter-receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6216578A JPS54154214A (en) 1978-05-26 1978-05-26 Multi-character broadcast transmitter-receiver

Publications (2)

Publication Number Publication Date
JPS54154214A true JPS54154214A (en) 1979-12-05
JPS5719914B2 JPS5719914B2 (en) 1982-04-24

Family

ID=13192225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6216578A Granted JPS54154214A (en) 1978-05-26 1978-05-26 Multi-character broadcast transmitter-receiver

Country Status (1)

Country Link
JP (1) JPS54154214A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555572A (en) * 1978-06-29 1980-01-16 Matsushita Electric Ind Co Ltd Pattern information receiver
JPS555571A (en) * 1978-06-29 1980-01-16 Matsushita Electric Ind Co Ltd Receiver for pattern information

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555572A (en) * 1978-06-29 1980-01-16 Matsushita Electric Ind Co Ltd Pattern information receiver
JPS555571A (en) * 1978-06-29 1980-01-16 Matsushita Electric Ind Co Ltd Receiver for pattern information
JPS5746711B2 (en) * 1978-06-29 1982-10-05
JPS5747592B2 (en) * 1978-06-29 1982-10-09

Also Published As

Publication number Publication date
JPS5719914B2 (en) 1982-04-24

Similar Documents

Publication Publication Date Title
JPS5438724A (en) Display unit
JPS52116025A (en) Sectional display control system in display picture
JPS52143717A (en) Line display data synthesis hold circuit
JPS54154214A (en) Multi-character broadcast transmitter-receiver
JPS53123627A (en) Display unit
JPS5539934A (en) Display device
JPS5582389A (en) Scanning speed change method for printer
JPS54104244A (en) Picture memory unit
JPS5420617A (en) Picture input system
JPS54139431A (en) Crt display unit
JPS5248930A (en) Character display unit
JPS5433060A (en) Printing recorder
JPS5677979A (en) Magnetic bubble memory device
JPS53143132A (en) Display unit
JPS5463621A (en) Crt display system
JPS5420629A (en) Data reader
JPS5430735A (en) Input control system of character display
JPS539428A (en) Scanning type display unit
JPS53132228A (en) Display unit
JPS54152822A (en) Continuous display unit for trend graph
JPS5441625A (en) Transfer confirmation display system for picture information
JPS6412781A (en) Picture transmitting method
JPS5487120A (en) Picture processor
JPS5611534A (en) Direct memory access transfer control system
JPS5518113A (en) Picture display unit