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JPS54106774A - Phase synchronization loop - Google Patents

Phase synchronization loop

Info

Publication number
JPS54106774A
JPS54106774A JP1353278A JP1353278A JPS54106774A JP S54106774 A JPS54106774 A JP S54106774A JP 1353278 A JP1353278 A JP 1353278A JP 1353278 A JP1353278 A JP 1353278A JP S54106774 A JPS54106774 A JP S54106774A
Authority
JP
Japan
Prior art keywords
signal
filter
phase
output
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1353278A
Other languages
Japanese (ja)
Inventor
Toshio Yamagishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1353278A priority Critical patent/JPS54106774A/en
Publication of JPS54106774A publication Critical patent/JPS54106774A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To remove high-frequency components from a reference signal and eliminate its lag due to a filter, by inserting AC filters of equal characteristics into a phase reference circuit and a feedback circuit, respectively.
CONSTITUTION: The output e2 of a phase comparator (PHD) 1, which takes the exclusive OR of the rectangular-wave phase reference signal e0 with an output signal e7, is averaged by a loop filter 2 and then supplied to a voltage control oscillator (VCO) 3. The output of the oscillator 3 is detected through a frequency divider 4. A signal e4 which serves as a reference for such a system contains high- frequency components. These components are removed from the signal e4 by an AC filter 5. The signal e4 is shaped to a rectangular-wave signal by a comparator 6. The phase of the signal e4 is delayed by the AC filter. To compensate the phase delay, an AC filter 7 of the same frequency characteristics as the AC filter 5 and a comparator 8 are inserted into the feedback line of the output signal.
COPYRIGHT: (C)1979,JPO&Japio
JP1353278A 1978-02-10 1978-02-10 Phase synchronization loop Pending JPS54106774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1353278A JPS54106774A (en) 1978-02-10 1978-02-10 Phase synchronization loop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1353278A JPS54106774A (en) 1978-02-10 1978-02-10 Phase synchronization loop

Publications (1)

Publication Number Publication Date
JPS54106774A true JPS54106774A (en) 1979-08-22

Family

ID=11835761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1353278A Pending JPS54106774A (en) 1978-02-10 1978-02-10 Phase synchronization loop

Country Status (1)

Country Link
JP (1) JPS54106774A (en)

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