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JPS54103670A - Impurity diffusion method of semiconductor single crystal - Google Patents

Impurity diffusion method of semiconductor single crystal

Info

Publication number
JPS54103670A
JPS54103670A JP936278A JP936278A JPS54103670A JP S54103670 A JPS54103670 A JP S54103670A JP 936278 A JP936278 A JP 936278A JP 936278 A JP936278 A JP 936278A JP S54103670 A JPS54103670 A JP S54103670A
Authority
JP
Japan
Prior art keywords
diffusion
temperature
rapidly
ampoule
sec
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP936278A
Other languages
Japanese (ja)
Other versions
JPS5917528B2 (en
Inventor
Takeshi Kobayashi
Yoshifumi Takanashi
Shinichi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP936278A priority Critical patent/JPS5917528B2/en
Publication of JPS54103670A publication Critical patent/JPS54103670A/en
Publication of JPS5917528B2 publication Critical patent/JPS5917528B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE: To increase surface impurity concentration and make its diffusion depth extremely shallow by rapidly incrasing the temperature in ampouls, rapidly cooling the same to a specified temperature on the way and rapidly stopping the diffusion in making diffusion by a sealing tube method.
CONSTITUTION: A P-type InP substrate, ZnP and InP are sealed in a quartz ampoule. When the ampoule is inserted into a furnace which is kept at a temperature higher by 240°C than 660° necessary for diffusion, its temperature rises at about 11°C/sec. and reaches 660°C in about 60 seconds. At this time, the ampoule is taken out and is rapidly cooled down to room temperature, then the diffusion is stopped. Then, the depth of the diffusion layer stops at about 0.3μm and since the impurity Zn does not give any adverse influence to active layer InGaAsP, the surface concentration may be increased. The temperature rising of the ampolue is suitably at 5 to 20°C/sec.
COPYRIGHT: (C)1979,JPO&Japio
JP936278A 1978-02-01 1978-02-01 Impurity diffusion method for semiconductor single crystals Expired JPS5917528B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP936278A JPS5917528B2 (en) 1978-02-01 1978-02-01 Impurity diffusion method for semiconductor single crystals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP936278A JPS5917528B2 (en) 1978-02-01 1978-02-01 Impurity diffusion method for semiconductor single crystals

Publications (2)

Publication Number Publication Date
JPS54103670A true JPS54103670A (en) 1979-08-15
JPS5917528B2 JPS5917528B2 (en) 1984-04-21

Family

ID=11718354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP936278A Expired JPS5917528B2 (en) 1978-02-01 1978-02-01 Impurity diffusion method for semiconductor single crystals

Country Status (1)

Country Link
JP (1) JPS5917528B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8030188B2 (en) * 2008-12-05 2011-10-04 Electronics And Telecommunications Research Institute Methods of forming a compound semiconductor device including a diffusion region

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8030188B2 (en) * 2008-12-05 2011-10-04 Electronics And Telecommunications Research Institute Methods of forming a compound semiconductor device including a diffusion region

Also Published As

Publication number Publication date
JPS5917528B2 (en) 1984-04-21

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