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JPS5320825A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5320825A
JPS5320825A JP9484676A JP9484676A JPS5320825A JP S5320825 A JPS5320825 A JP S5320825A JP 9484676 A JP9484676 A JP 9484676A JP 9484676 A JP9484676 A JP 9484676A JP S5320825 A JPS5320825 A JP S5320825A
Authority
JP
Japan
Prior art keywords
control system
memory control
memory
aginst
acceleration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9484676A
Other languages
Japanese (ja)
Other versions
JPS5645225B2 (en
Inventor
Yuji Hiramitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9484676A priority Critical patent/JPS5320825A/en
Publication of JPS5320825A publication Critical patent/JPS5320825A/en
Publication of JPS5645225B2 publication Critical patent/JPS5645225B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a memory control system which enables a simultaneous and parallel reading and writing continuously aginst a memory over plural addresses with acceleration of the processing speed.
COPYRIGHT: (C)1978,JPO&Japio
JP9484676A 1976-08-11 1976-08-11 Memory control system Granted JPS5320825A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9484676A JPS5320825A (en) 1976-08-11 1976-08-11 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9484676A JPS5320825A (en) 1976-08-11 1976-08-11 Memory control system

Publications (2)

Publication Number Publication Date
JPS5320825A true JPS5320825A (en) 1978-02-25
JPS5645225B2 JPS5645225B2 (en) 1981-10-24

Family

ID=14121388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9484676A Granted JPS5320825A (en) 1976-08-11 1976-08-11 Memory control system

Country Status (1)

Country Link
JP (1) JPS5320825A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4477884A (en) * 1980-10-15 1984-10-16 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with improved data programming time
JPS617955A (en) * 1984-06-22 1986-01-14 Toshiba Corp Storage device
US4642797A (en) * 1983-11-10 1987-02-10 Monolithic Memories, Inc. High speed first-in-first-out memory
JPS6316334U (en) * 1986-07-17 1988-02-03

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4477884A (en) * 1980-10-15 1984-10-16 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with improved data programming time
US4642797A (en) * 1983-11-10 1987-02-10 Monolithic Memories, Inc. High speed first-in-first-out memory
JPS617955A (en) * 1984-06-22 1986-01-14 Toshiba Corp Storage device
JPS6316334U (en) * 1986-07-17 1988-02-03

Also Published As

Publication number Publication date
JPS5645225B2 (en) 1981-10-24

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