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JPS53104164A - Bump electrode production in semiconductor device - Google Patents

Bump electrode production in semiconductor device

Info

Publication number
JPS53104164A
JPS53104164A JP1822377A JP1822377A JPS53104164A JP S53104164 A JPS53104164 A JP S53104164A JP 1822377 A JP1822377 A JP 1822377A JP 1822377 A JP1822377 A JP 1822377A JP S53104164 A JPS53104164 A JP S53104164A
Authority
JP
Japan
Prior art keywords
bump electrode
semiconductor device
electrode production
production
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1822377A
Other languages
Japanese (ja)
Inventor
Hideo Tanbara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1822377A priority Critical patent/JPS53104164A/en
Publication of JPS53104164A publication Critical patent/JPS53104164A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To reduce a parasitic MOS capacity by silver-plating after providing a insulating film in forming a bump electrode.
COPYRIGHT: (C)1978,JPO&Japio
JP1822377A 1977-02-23 1977-02-23 Bump electrode production in semiconductor device Pending JPS53104164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1822377A JPS53104164A (en) 1977-02-23 1977-02-23 Bump electrode production in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1822377A JPS53104164A (en) 1977-02-23 1977-02-23 Bump electrode production in semiconductor device

Publications (1)

Publication Number Publication Date
JPS53104164A true JPS53104164A (en) 1978-09-11

Family

ID=11965635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1822377A Pending JPS53104164A (en) 1977-02-23 1977-02-23 Bump electrode production in semiconductor device

Country Status (1)

Country Link
JP (1) JPS53104164A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59222970A (en) * 1983-06-01 1984-12-14 Toshiba Corp PIN diode pellet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59222970A (en) * 1983-06-01 1984-12-14 Toshiba Corp PIN diode pellet

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