JPS5032957U - - Google Patents
Info
- Publication number
- JPS5032957U JPS5032957U JP8452173U JP8452173U JPS5032957U JP S5032957 U JPS5032957 U JP S5032957U JP 8452173 U JP8452173 U JP 8452173U JP 8452173 U JP8452173 U JP 8452173U JP S5032957 U JPS5032957 U JP S5032957U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8452173U JPS5032957U (en) | 1973-07-20 | 1973-07-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8452173U JPS5032957U (en) | 1973-07-20 | 1973-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5032957U true JPS5032957U (en) | 1975-04-10 |
Family
ID=28265752
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8452173U Pending JPS5032957U (en) | 1973-07-20 | 1973-07-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5032957U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6158199U (en) * | 1984-09-25 | 1986-04-18 | ||
| JP2018046186A (en) * | 2016-09-15 | 2018-03-22 | 株式会社デンソー | Semiconductor device and manufacturing method of the same |
-
1973
- 1973-07-20 JP JP8452173U patent/JPS5032957U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6158199U (en) * | 1984-09-25 | 1986-04-18 | ||
| JPH0356479Y2 (en) * | 1984-09-25 | 1991-12-18 | ||
| JP2018046186A (en) * | 2016-09-15 | 2018-03-22 | 株式会社デンソー | Semiconductor device and manufacturing method of the same |