JPH1197146A - Solder bump connection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ensure a highly accurate bump connection by forming a solder layer on a metal film for alignment with a good solder wettability which is formed with the center deviated and with the size larger than a substrate- electrode, whose center position and shape are almost the same as those of the metal film, on the substrate-electrode, positioning the solder layer in a face-to-face relation with another substrate-electrode, performing pressing for tentative fixing and allowing the solder layer to flow freely. SOLUTION: On a substrate-electrode 12 for alignment on a substrate 1 having a light guide path 2 formed, a solder bump 15 formed on a substrate- electrode 8 of LD4 is positioned, and after tentative fixing under pressure the solder layer is subjected to free flow. Since the electrode 12 has no wettability with the part except the substrate-electrode 8, all thereof is melted into the solder bump 15. Simultaneously, according to the self alignment, that is, the movement of the solder bump 15 onto the substrate-electrode 12, the LD4 moves so that positioning is made automatically, and for example, an active layer of the LD4 and a core 3 of the path 2 are positioned adjacently in a gapless manner substantially, thereby allowing easy mounting. At the time of positioning both electrodes, the margin of alignment is made large.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for connecting solder bumps with high precision and with less concern for damage, and more particularly, to an optical device such as an ultra-high-speed optical transmission module or an optical interconnection module. And a method of connecting electrodes when mounting on a substrate.

Conventionally, when mounting an optical device by bump connection, a method as shown in FIG. 1 has been used. FIG.
Is the core 3 of the optical waveguide 2 formed on the silicon substrate 1
This is an example in which optical coupling is performed between the substrate and the active layer 5 of the LD 4, in which a base electrode 7 on the silicon substrate 1 and a base electrode 8 on the LD are connected by a solder bump 6. As a method of bump connection, a solder layer is previously formed on the LD side or the substrate side, and the LD is formed at a position where the underlying electrodes substantially overlap each other.
In general, a bump is connected by temporarily reflowing the solder after pressure-fixing.

FIG. 2 shows an example of the configuration of the base electrode at this time.
On the silicon substrate 1, films of a Ti layer 9, a Pt layer 10 and an Au layer 11 are sequentially formed as circular base electrodes smaller than the solder bumps. FIG. 3 shows a state in which bumps are connected to the base electrodes formed in the same circular pattern in this manner. The Au layer 11 on the surface of the base electrode is melted into a solder bump when reflow is performed, and is connected to the bump via the Pt layer 10.

In such a conventional method, a base electrode is formed by laminating the same circular film, so that when the bump connection is made, the base electrode on the LD side and the base electrode on the substrate side can be precisely formed. After the alignment, the solder is reflowed to perform bump connection. Also, the core portion 3 of the optical waveguide 2 and L
In order to increase the optical coupling efficiency of D4 with the active layer 5, it is essential that both are brought close to each other to perform bump connection. For this reason, in the conventional method, in the alignment step, LD
In some cases, the active layer 5 and the core portion 3 of the optical waveguide come into contact with each other and break.

[0005]

SUMMARY OF THE INVENTION It is an object of the present invention to increase the alignment margin when aligning both electrodes when performing bump connection, and to achieve high-precision mounting when bump connection is completed. An object of the present invention is to provide a solder bump connection method that can be used.

[0006]

In order to achieve the above object, a method of connecting solder bumps according to the present invention, when connecting base electrodes formed on two surfaces to each other using solder bumps, is described. A step of forming a base electrode having substantially the same center position and shape, and having a pattern having a shape larger than the base electrode and offset from the base electrode on one of the base electrodes, and having wettability with solder; Forming an excellent matching metal film, forming a solder layer on one of the base electrodes or the matching metal film, and facing the solder layer to the other matching metal film or the base electrode. And a step of temporarily fixing by pressurizing and further reflowing the solder.

According to the method of the present invention, the solder is reflowed after the solder bumps are positioned and temporarily fixed by pressing in a region other than the base electrode on the substrate. Since the film has no wettability with parts other than the base electrode, in this step, the matching metal film is completely melted into the solder bumps, and at the same time, the so-called self-alignment action, that is, the molten solder bumps tend to move onto the base electrode. Therefore, the chip is moved and the alignment is performed automatically, so that, for example, the active layer of the LD and the core portion of the optical waveguide can be mounted in a close proximity with almost no gap.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. First, an embodiment of a method for forming a base electrode according to the present invention will be described with reference to FIG. For example, a pattern is formed on a substrate 1 such as a silicon substrate using a liquid resist 13 (for example, an AZ-based resist manufactured by Hoechst).
(a)), a Ti film 9 for a base electrode, Pt
The film 10 and the Au film 11 are sequentially laminated (FIG. 2 (b)). Thereafter, the metal film layer other than the base electrode portion is removed together with the resist by a lift-off technique (FIG. 2 (c)). A pattern is formed using a resist 13 '(for example, AZ-based resist from Hoechst), and an Au film is formed as a matching metal film by a vacuum evaporation method or the like (FIG. (D)). The Au film layer 14 other than the matching metal film portion is removed together with the resist to form the matching underlying electrode 12.
(Figure (e)).

Next, an embodiment of a process of forming a solder bump on a base electrode of an LD according to the present invention will be described with reference to FIG. A liquid resist is formed on the underlying electrode 8 on the LD 4.
A pattern is formed using 13 "(for example, AZ-based resist from Hoechst) (Fig. (A)), and a solder layer for bumps is formed by a vacuum deposition method or the like (Fig. (B)). By removing the solder layer 16 except for the bump portion together with the resist 13 ″, a solder bump 15 is formed (see FIG.
(c)).

Next, an embodiment of a step of connecting bumps according to the present invention will be described with reference to FIG. The matching base electrode of the base electrodes (Ti film 9, Pt film 10, Au film 11, and matching base electrode 12) formed on the silicon substrate 1 on which the optical waveguide 2 is formed through the process described with reference to FIG. On top of 12, the bump solder 15 formed through the process described in FIG. 6 is aligned and temporarily fixed by pressing (FIG. 6A), and then a reducing atmosphere such as hydrogen or the like. Reflow by heating using flux etc. and self-aligning to the predetermined electrode position
(Figure (b)).

In the above description of the embodiment, the Ti / Pt / Au film is used as the base electrode and the Au film is used as the matching base electrode. However, the adhesion to the substrate and the wettability with the solder are improved. The configuration of the metal film may be selected in consideration of the above, and is not limited to the electrode material of the above-described embodiment. In the above embodiment, the case where the solder layer is formed on the base electrode of the LD has been described. However, it is obvious that the same effect can be obtained by forming the solder layer on the matching base electrode on the substrate side. Further, in the above embodiment, the example in which the optical waveguide is formed on the silicon substrate is described. However, other configurations such as a configuration in which an optical fiber is embedded in a silicon substrate, a device in which an electro-optical element or an optical waveguide is incorporated, and the like are also applicable. Clearly applicable. Furthermore, in the above embodiment, an embodiment using an optical device has been described. However, the type of device is not limited, and it is apparent that the present invention can be applied to other devices such as an IC.

[0012]

As described above, according to the method of the present invention, since the alignment metal film is melted into the solder and is aligned by the self-alignment action, the active layer of the LD and the core of the optical waveguide are aligned. Also, in the case of combining the two, it can be easily mounted with a close configuration with almost no gap.

[Brief description of the drawings]

FIG. 1 is a view for explaining a conventional method of connecting solder bumps.

FIG. 2 is a diagram showing a configuration of a conventional base electrode.

FIG. 3 is a diagram illustrating a configuration of a conventional bump connection unit.

FIG. 4 is a view showing a configuration of a base electrode in the method of connecting solder bumps according to the present invention.

FIG. 5 is a diagram illustrating a step of forming a base electrode in the method of connecting solder bumps according to the present invention.

FIG. 6 is a diagram illustrating a solder bump forming step in the solder bump connection method of the present invention.

FIG. 7 is a diagram for explaining a solder bump connection step according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Optical waveguide 3 Core part 4 LD5 Active layer 6 Bump 7, 8 Base electrode 9 Ti film 10 Pt film 11, 12, 14 Au film 13 Resist 15 Solder bump 16 Solder layer

Claims (1)

[Claims] A step of forming base electrodes having substantially the same center position and shape when connecting the base electrodes formed on the two surfaces to each other by using solder bumps; Forming a matching metal film having a pattern larger than the base electrode and having a shape shifted from the center of the base electrode and having excellent wettability with solder; A step of forming a solder layer on the film, and a step of aligning the solder layer so as to face the other matching metal film or the underlying electrode, temporarily fixing by pressing, and further reflowing the solder. A method for connecting solder bumps.