JPH1152405A - Liquid crystal display element - Google Patents
Liquid crystal display elementInfo
- Publication number
- JPH1152405A JPH1152405A JP20470297A JP20470297A JPH1152405A JP H1152405 A JPH1152405 A JP H1152405A JP 20470297 A JP20470297 A JP 20470297A JP 20470297 A JP20470297 A JP 20470297A JP H1152405 A JPH1152405 A JP H1152405A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- lsi
- plating
- crystal display
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、液晶表示素子の
セルの周辺部にLSIを設置して、その配線部を金属メ
ッキまたは/および蒸着により金属で覆われているガラ
ス基板上にLSIチップをフェイスダウンボンディング
で実装する時において、LSIチップと配線部との確実
な電気的接触を実現する液晶表示素子に関する。BACKGROUND OF THE INVENTION The present invention relates to a method of mounting an LSI chip on a glass substrate having a wiring portion covered with metal by metal plating or / and vapor deposition by installing an LSI around a cell of a liquid crystal display element. The present invention relates to a liquid crystal display element that realizes reliable electrical contact between an LSI chip and a wiring portion when mounted by face-down bonding.
【0002】[0002]
【従来の技術】近年、液晶表示素子において、コスト、
工程数や信頼性等からガラス基板上に液晶駆動用LSI
チップを実装するCOG型(Chip On Glas
s)の液晶表示素子が多く用いられている。図1に液晶
表示素子の基本的な構成を示す。図1は、上下2枚のガ
ラス基板1の位置合せし、2枚のガラス基板の間にギャ
ップを設けてギャップに液晶4を封入し、周囲に樹脂等
のシール5で封止し、ガラス基板の表面には、ネサ膜や
ITO膜等の透明導電膜のパターン2、3を形成してい
る。2. Description of the Related Art In recent years, cost,
LSI for driving liquid crystal on a glass substrate due to the number of processes and reliability
COG type (Chip On Glass) for mounting a chip
The liquid crystal display element of s) is often used. FIG. 1 shows a basic configuration of a liquid crystal display element. FIG. 1 shows an alignment of two glass substrates 1 above and below, a gap is provided between the two glass substrates, a liquid crystal 4 is sealed in the gap, and the periphery is sealed with a seal 5 such as a resin. Are formed with transparent conductive patterns 2 and 3 such as a Nesa film and an ITO film.
【0003】さらに、液晶表示素子のセルの表面には、
偏光フィルタ7が貼られている。また、液晶駆動用LS
I8が外部配線部に設置されており、外部電極6から電
源と表示命令信号を取入れて、液晶表示素子用の信号を
表示部に供給する。なお、パターン3等の形成時に同時
に形成されたセル外部の部分を外部電極、配線部とす
る。Further, on the surface of the cell of the liquid crystal display element,
A polarizing filter 7 is attached. LS for driving liquid crystal
I8 is provided in the external wiring section, and takes in a power supply and a display command signal from the external electrode 6, and supplies a signal for the liquid crystal display element to the display section. The portions outside the cell formed simultaneously with the formation of the pattern 3 and the like are referred to as external electrodes and wiring portions.
【0004】図9に従来のCOG型液晶表示素子のセル
上に設置したLSI付近の断面図を示す。図9は、ガラ
ス基板1に設置されている外部電極6に施された金属メ
ッキ9は駆動用LSI8の直下の接続部まで覆ってい
る。また、外部電極6の全体を電気抵抗を下げる目的
で、例えば特開平4−170524のように、金属メッ
キ9を施したものもある。FIG. 9 is a sectional view showing the vicinity of an LSI installed on a cell of a conventional COG type liquid crystal display device. FIG. 9 shows that the metal plating 9 applied to the external electrode 6 provided on the glass substrate 1 covers the connection portion immediately below the driving LSI 8. In addition, there is a type in which the metal plating 9 is applied to the entire outer electrode 6 for the purpose of lowering the electric resistance, for example, as disclosed in JP-A-4-170524.
【0005】さらに、セルの周辺部に設置した駆動用L
SI8の外部導通部のバンプ10と外部電極6との間に
電気導伝性のある導通粒子11(フィラ)を分散した樹
脂を用いてフェイスダウンで圧着する。Further, a driving L provided at the periphery of the cell
The conductive particles 11 (filler) having electrical conductivity are pressed between the bumps 10 of the external conductive portion of the SI 8 and the external electrode 6 face down by using a resin in which the conductive particles 11 are dispersed.
【0006】次に、導通粒子11を介した導通を確認す
るために、導通粒子11が所定の量潰れて、接続が完全
であることを確認するために、駆動用LSI8を外部電
極6の金属メッキ9膜上に装着後に、ガラス側から光学
顕微鏡により圧着部の観察をする。また、駆動電源接続
等により表示検査をする。Next, in order to confirm that the conductive particles 11 are crushed by a predetermined amount and to confirm that the connection is complete, the driving LSI 8 is connected to the metal of the external electrode 6 in order to confirm the conduction through the conductive particles 11. After mounting on the plating 9 film, the crimped portion is observed from the glass side by an optical microscope. In addition, a display inspection is performed by connecting a driving power supply or the like.
【0007】[0007]
【発明が解決しようとする課題】フェイスダウンで圧着
によって、導通粒子の潰れが不十分で弱く接触している
と、経時的に接触が切れてしまうことがあるために、L
SIの圧着の条件出し、及び処理された製品の検査のた
めに圧着部を観察する。この時金属メッキ膜があると、
金属メッキ膜に遮られて目視や光学的観察等ができない
ため以下のような課題がある。If the conductive particles are insufficiently crushed by the face-down pressure bonding and are weakly in contact with each other, the contact may be broken with time.
Observe the crimping part for setting the crimping condition of the SI and inspecting the processed product. At this time, if there is a metal plating film,
Since it cannot be visually observed or optically observed because of being blocked by the metal plating film, there are the following problems.
【0008】ガラス基板上のLSI圧着部にまで金属メ
ッキ膜があると、圧着による導通粒子(フィラ)の潰れ
が所定量であるか、セルのガラス側(裏)から目視や光
学的な観察および検査等ができない課題がある。If a metal plating film is present up to the LSI crimping portion on the glass substrate, the collapse of the conductive particles (filler) due to the crimping is determined by a visual or optical observation from the glass side (back side) of the cell. There is a problem that inspection cannot be performed.
【0009】また、ガラス基板上のLSI圧着部にまで
金属メッキ膜があると、ガラス基板上のLSI圧着部に
LSIのバンプ部が均一な圧力でフィラと圧着されてい
るか、セルのガラス側(裏)から目視や光学的な観察お
よび検査等ができない課題がある。Further, if a metal plating film is provided up to the LSI crimping portion on the glass substrate, the bump portion of the LSI is crimped to the filler at a uniform pressure on the LSI crimping portion on the glass substrate or the cell side ( There is a problem that visual observation, optical observation, inspection and the like cannot be performed from the back).
【0010】さらに、ガラス基板上のLSI圧着部にま
で金属メッキ膜があると、LSIのバンプ部とガラス基
板上のLSI圧着部との位置ズレを、セルのガラス側
(裏)から目視や光学的な観察および検査等ができない
課題がある。Further, if a metal plating film is provided up to the LSI crimping portion on the glass substrate, the positional deviation between the LSI bump portion and the LSI crimping portion on the glass substrate can be visually or optically determined from the glass side (back side) of the cell. There is a problem that it is not possible to perform a specific observation and inspection.
【0011】[0011]
【課題を解決するための手段】前記課題を解決するため
請求項1に係る液晶表示素子は、セル端部に設けられた
外部電極、液晶密封空間内の表示電極、表示電極に連な
る配線部はいずれも透明導電膜で構成され、かつ、配線
部および外部電極は、それぞれのLSIとの接合部を除
いて、金属メッキまたは蒸着による金属層で覆われてい
ることを特徴とする。According to a first aspect of the present invention, there is provided a liquid crystal display device comprising: an external electrode provided at a cell end; a display electrode in a liquid crystal sealed space; and a wiring portion connected to the display electrode. Each is characterized by being formed of a transparent conductive film, and the wiring portion and the external electrode are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with each LSI.
【0012】請求項1に係る液晶表示素子は、セル端部
に設けられた外部電極、液晶密封空間内の表示電極、表
示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、配線部および外部電極は、それぞれのLSI
との接合部を除いて、金属メッキまたは蒸着による金属
層で覆われているので、セルのガラス側(裏)からLS
Iのバンプ部とガラス基板上のLSI圧着部との位置ズ
レや均一な圧着で導通粒子(フィラ)の潰れが所定量で
あるか無いかの観察および検査が可視的および光学的方
法により行うことができる。In the liquid crystal display element according to the present invention, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film. Section and external electrodes are each LSI
Except for the junction with, the cell is covered with a metal layer formed by metal plating or vapor deposition.
Observation and inspection by visual and optical methods to determine whether a predetermined amount of conductive particles (fillers) are crushed by misalignment between the bump portion of I and the LSI crimping portion on the glass substrate or by uniform crimping. Can be.
【0013】また、請求項2に係る液晶表示素子は、セ
ル端部に設けられた外部電極、液晶密封空間内の表示電
極、表示電極に連なる配線部はいずれも透明導電膜で構
成され、かつ、外部電極のうちの電源用、接地配線用お
よび昇圧配線用の電極のみに、LSIとの接合部を除い
て、金属メッキまたは蒸着による金属層で覆われている
ことを特徴とする。Further, in the liquid crystal display element according to the present invention, the external electrode provided at the end of the cell, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film, and Only the electrodes for the power supply, the ground wiring, and the boosting wiring among the external electrodes are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with the LSI.
【0014】請求項2に係る液晶表示素子は、セル端部
に設けられた外部電極、液晶密封空間内の表示電極、表
示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、外部電極のうちの電源用、接地配線用および
昇圧配線用の電極のみに、LSIとの接合部を除いて、
金属メッキまたは蒸着による金属層で覆われているの
で、セルのガラス側(裏)からLSIのバンプ部とガラ
ス基板上のLSI圧着部との位置ズレや均一な圧着で導
通粒子(フィラ)の潰れが所定量であるか無いかの観察
および検査ができるとともに、大きな電流が流せ、リー
ド線等の接続に機械的強度やハンダの濡性の改善を得る
ことができる。According to a second aspect of the present invention, in the liquid crystal display device, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film. Only the electrodes for the power supply, the ground wiring, and the boost wiring among the electrodes, except for the junction with the LSI,
Since it is covered with a metal layer formed by metal plating or vapor deposition, conductive particles (fillers) are crushed by misalignment of the bump portion of the LSI and the LSI crimping portion on the glass substrate from the glass side (back) of the cell or uniform crimping. Can be observed and inspected as to whether the amount is a predetermined amount or not, a large current can flow, and the mechanical strength and the solder wettability of the connection of the lead wire and the like can be improved.
【0015】[0015]
【発明の実施の形態】以下、この発明の実施の形態を添
付図面に基づいて説明する。なお、この発明は、COG
型の液晶表示素子において、セル上の配線部を金属メッ
キまたは/および蒸着により金属で覆い、且つLSIの
圧着部には、金属メッキまたは/および蒸着を施さない
で、セルのガラス側(裏)から圧着部を検査および観測
が可能な液晶表示素子を提供するものである。Embodiments of the present invention will be described below with reference to the accompanying drawings. Note that the present invention relates to COG
In the liquid crystal display element of the type, the wiring portion on the cell is covered with metal by metal plating or / and vapor deposition, and the crimping portion of the LSI is not subjected to metal plating or / and vapor deposition, and the glass side of the cell (back) The present invention provides a liquid crystal display device capable of inspecting and observing a pressure-bonded portion from the same.
【0016】図2に、この発明に係る液晶表示素子のL
SI装着部の断面図を示す。図2は、ガラス基板1に真
空蒸着、スパッタリング、イオンプレーティング、化学
蒸着(CVD)等と、それに続きエッチング(ウェッ
ト、ドライ)による方法で、酸化錫や酸化インジウムお
よび酸化インジウム錫等の化合物で出来た透明導電膜の
ネサ膜やITO膜等からなる表示パターンと外部電極6
を同時に形成し、駆動用LSI8のバンプ10部を圧着
する部分以外を金属メッキ9を施し、バンプ10と外部
電極6との間に電気導伝性のある導通粒子11(フィ
ラ)を分散した樹脂を用いてフェイスダウンで圧着する
構成である。FIG. 2 shows the L of the liquid crystal display device according to the present invention.
FIG. 3 shows a cross-sectional view of an SI mounting portion. FIG. 2 shows a method of vacuum deposition, sputtering, ion plating, chemical vapor deposition (CVD), etc., followed by etching (wet, dry) on a glass substrate 1 using a compound such as tin oxide, indium oxide, and indium tin oxide. The display pattern and external electrode 6 made of the formed transparent conductive film such as a Nesa film or an ITO film.
Are formed at the same time, metal plating 9 is applied to portions other than the portions where the bumps 10 of the driving LSI 8 are pressed, and conductive particles 11 (fillers) having electrical conductivity are dispersed between the bumps 10 and the external electrodes 6. This is a configuration in which the pressure bonding is performed face down using a.
【0017】ガラス基板1は、ガラス成分としてアルカ
リを含有しないソーダライムガラスを主成分とし、熱的
安定が良く歪点を高く設定し、熱膨張係数も常温から3
50°Cで46〜47(×10-7/°C)程度あり、ま
た溶解温度も1600〜1650°Cと高いものが用い
られる。さらに平坦度に対し、偏肉、反り、うねり、表
面粗さ等の少ない、また傷、ピット、汚れ等の点で高度
品位なガラスから成り、場合によっては、表面研磨を施
すものもある。The glass substrate 1 is composed mainly of soda lime glass containing no alkali as a glass component, has good thermal stability and a high strain point, and has a thermal expansion coefficient of 3 from normal temperature.
At 50 ° C., the temperature is about 46 to 47 (× 10 −7 / ° C.), and the melting temperature is as high as 1600 to 1650 ° C. Further, with respect to the flatness, the glass is made of high-quality glass with little unevenness, warpage, undulation, surface roughness, and the like, and has high quality in terms of scratches, pits, dirt, and the like.
【0018】表示パターンと外部電極6は、酸化錫や酸
化インジウムを主な成分とし、酸化インジウム錫(IT
O)酸化カドミウム錫等からなる化合物を真空蒸着や化
学蒸着で透明導電膜を形成し、その後エッチングを施し
断定形状の透明電極とする。The display pattern and the external electrode 6 are mainly composed of tin oxide or indium oxide, and are composed of indium tin oxide (IT).
O) A transparent conductive film is formed by vacuum evaporation or chemical vapor deposition of a compound made of cadmium tin oxide or the like, and then etched to form a transparent electrode having a predetermined shape.
【0019】金属メッキ9は、透明導電膜上に選択メッ
キによりニッケルを例えば500nm程度の厚さに施
し、さらにその表面に金メッキを例えば厚さ50nm程
度施す。また、ベアチップを装着するバンプ10部は、
金属メッキ9を施さずに、透明導電膜のままである。In the metal plating 9, nickel is applied to the transparent conductive film by selective plating to a thickness of, for example, about 500 nm, and gold plating is applied to the surface thereof, for example, to a thickness of about 50 nm. Also, 10 parts of the bump for mounting the bare chip,
The transparent conductive film remains as it is without applying the metal plating 9.
【0020】また、金属メッキ9を施す領域は、基本的
にはLSI8の導通部となるバンプ10部に掛からなけ
れが良いが、金属メッキ9が掛からない様に、金属メッ
キ9を施す領域をバンプ10部から30μm以上から
0.5mm以下離して所を金属メッキの境界部とする。The area where the metal plating 9 is to be applied should basically not be applied to the bump 10 serving as a conductive portion of the LSI 8, but the area where the metal plating 9 is applied should be bumped so that the metal plating 9 is not applied. A part separated from 10 parts by 30 μm or more and 0.5 mm or less is defined as a boundary of metal plating.
【0021】導通粒子11(フィラ)は、樹脂に5〜1
5μm程度の銀(Ag)の粒子からなる導通粒子を分散
したものである。この導通粒子11を外部電極6とLS
I8が対向するバンプ10部に設置する。The conductive particles 11 (filler) are formed by adding 5-1 to resin.
This is a dispersion of conductive particles composed of silver (Ag) particles of about 5 μm. The conductive particles 11 are connected to the external electrode 6 by LS.
I8 is installed on the 10 bumps facing each other.
【0022】さらに、LSI8を所定位置のバンプ10
部に置き、均一な圧力でフェイスダウンにより圧着を行
う。これにより、樹脂中のフィラが潰れて、フィラ同士
が面接触をして、導通性が得られる。Further, the LSI 8 is mounted on the bump 10 at a predetermined position.
And press-fit by face down with uniform pressure. As a result, the filler in the resin is crushed, and the fillers come into surface contact with each other, thereby obtaining conductivity.
【0023】次に、導通粒子11を介した導通を確認す
るために、導通粒子11が所定の量が潰れているかをガ
ラス側(裏)から圧着部を可視的、光学的方法により検
査観測し、導通粒子の潰れが所定量であるか無いか、さ
らにLSI8と圧着部とのバンプ部の位置ズレや導通粒
子が均一に潰れているかを確認する構成である。Next, in order to confirm conduction through the conductive particles 11, whether the conductive particles 11 are crushed by a predetermined amount is inspected and observed from the glass side (back side) of the crimped portion by a visual and optical method. In this configuration, it is checked whether the crushing of the conductive particles is a predetermined amount or not, and furthermore, whether the position of the bump portion between the LSI 8 and the pressure-bonding portion is misaligned or whether the conductive particles are crushed uniformly.
【0024】図3に本発明の液晶表示素子の主要処理工
程図を示す。図3のaは、パターニングされたITO膜
付き基板の状態を示す。ソーダライムガラス等からなる
厚さ1.1mm程度のフラットなガラス基板1にエッチ
ング等により酸化スズや酸化インジウム等で表示パター
ン領域と、表示部への配線および外部電極6等のパター
ンを抵抗30Ω/□程度のITO膜3による透明導電膜
を形成する。ただし、バンプ部10は、これら表示部へ
の配線部および外部電極6のパターンの一部であり、表
示領域には、液晶が密閉された空間が形成される。FIG. 3 shows a main processing step diagram of the liquid crystal display device of the present invention. FIG. 3A shows a state of the patterned substrate with the ITO film. A flat glass substrate 1 made of soda lime glass or the like and having a thickness of about 1.1 mm is formed by etching or the like using tin oxide, indium oxide, or the like to form a display pattern region, a wiring to a display portion, and a pattern such as an external electrode 6 having a resistance of 30Ω / A transparent conductive film of about □ of the ITO film 3 is formed. However, the bump portion 10 is a part of the pattern of the wiring portion to the display portion and the pattern of the external electrode 6, and a space where liquid crystal is sealed is formed in the display region.
【0025】図3のbは、フォトレジスト塗布の状態を
示す。また、この状態は、金属メッキ用(ニッケル用)
9−aマスクパターニングである。金属メッキの必要と
しない部分(液晶表示領域やバンプ部)をフォトレジス
トで覆う(コーティング)ために、ガラス基板1にフォ
トレジストをスピンナ等で2μm程度塗布(例えば、こ
こではネガタイプのフォトレジスト)する。FIG. 3B shows the state of photoresist coating. This state is for metal plating (for nickel)
This is 9-a mask patterning. In order to cover (coat) a portion that does not require metal plating (a liquid crystal display region or a bump portion) with a photoresist, a photoresist is applied to the glass substrate 1 by about 2 μm using a spinner or the like (eg, a negative type photoresist in this case). .
【0026】さらに、ステッパ等によって紫外線照射
で、金属メッキの必要としない部分のパターンを露光
(例えば、ここでは、積算光量100mJ/cm2)
し、露光された部分が不溶化となる。またさらに、フォ
トプロセス洗浄装置等の純水によるシャワーや超音波洗
浄等で汚物を除去し、エアーナイフ方式や熱風乾燥方式
等のエアーブロにより乾燥させて、液晶表示領域やバン
プ部にフォトレジストを残存させる。Further, a pattern of a portion that does not require metal plating is exposed to ultraviolet rays by a stepper or the like (for example, here, the integrated light amount is 100 mJ / cm 2 ).
Then, the exposed portion becomes insoluble. Furthermore, dirt is removed by showering with pure water or ultrasonic cleaning in a photo process cleaning device or the like, and is dried by air blow such as an air knife method or a hot air drying method, so that the photoresist remains on the liquid crystal display area and the bump portion. Let it.
【0027】図3のcは、金属メッキ(ニッケル)9−
aを施す状態を示す。図3のbによってフォトレジスト
が無い液晶表示パターンやバンプ部以外に金属メッキを
施すために、始めに表面の汚れの除去や脱脂等の目的の
ためアルカリ性の溶液でクリーニングを行い、次に塩酸
等の酸でアルカリ性を中和する。FIG. 3C shows a metal plating (nickel) 9-.
The state where a is applied is shown. According to FIG. 3B, in order to apply metal plating to portions other than the liquid crystal display pattern and the bump portion having no photoresist, first, cleaning is performed with an alkaline solution for the purpose of removing dirt on the surface or degreasing, and then hydrochloric acid or the like. Neutralize alkalinity with acid.
【0028】さらに、触媒化処理を行う。まず、キャタ
リストとして、塩化第一スズと塩化パラジウム等からな
る金属塩化物、および塩酸を同時に含んだ触媒化処理液
を室温〜40゜C程度で2〜3分間程浸漬する。Further, a catalytic treatment is performed. First, as a catalyst, a catalyzed treatment solution containing simultaneously a metal chloride composed of stannous chloride and palladium chloride and hydrochloric acid is immersed at room temperature to about 40 ° C. for about 2 to 3 minutes.
【0029】次に、キャタリストによる保護コロイドや
錯イオンを形成している触媒核をアクセレータ溶液で処
理し活性化させる。アクセレータ溶液としては、5〜1
0%程度の塩酸または硫酸等の酸を用いて、30〜50
゜C程度の温度で2〜5分程度で処理をする。Next, the catalyst nuclei forming the protective colloid and complex ions by the catalyst are treated with an accelerator solution to be activated. As the accelerator solution, 5-1
Using an acid such as hydrochloric acid or sulfuric acid of about 0%,
The treatment is performed at a temperature of about ゜ C for about 2 to 5 minutes.
【0030】さらに、ニッケルイオンを含む塩化ニッケ
ル溶液または硫酸ニッケル溶液のような化学ニッケルメ
ッキ液に室温〜30゜C程度の温度で、3〜5分間程度
浸して無電解ニッケルメッキを生成し、下地のニッケル
メッキ層9−aを形成する。Further, the substrate is immersed in a chemical nickel plating solution such as a nickel chloride solution or a nickel sulfate solution containing nickel ions at a temperature of room temperature to about 30 ° C. for about 3 to 5 minutes to form electroless nickel plating. To form a nickel plating layer 9-a.
【0031】図3のdは、フォトレジストを剥離した状
態を示す。図3のcで形成した無電解ニッケルメッキ用
のマスクパターンを洗剤や剥離剤等を用いてロールブラ
シやディスクブラシ等または超音波洗浄等でフォトレジ
ストを除去する。FIG. 3D shows a state in which the photoresist has been removed. The photoresist is removed from the mask pattern for electroless nickel plating formed in FIG. 3C by a roll brush, a disk brush, an ultrasonic cleaning, or the like using a detergent, a release agent, or the like.
【0033】図3のeは、金属メッキ(金メッキ)9−
bをニッケルメッキ9−a上に選択的に施した状態を示
す。図3のcの処理工程と同様に、始めに表面の汚れの
除去や脱脂等のためにアルカリ性の溶液でクリーニング
を行い、次に硫酸等の酸でアルカリ性を中和するととも
に、ニッケル表面を活性化させる。FIG. 3E shows metal plating (gold plating) 9-.
b shows a state where nickel is selectively applied on the nickel plating 9-a. Similar to the treatment step of FIG. 3C, first, the surface is cleaned with an alkaline solution for removing stains and degreasing, and then neutralized with an acid such as sulfuric acid to activate the nickel surface. To
【0034】さらに、メッキ層の厚さを50nm程度の
薄く形成するフラッシュ金による金メッキを行う。金イ
オンを含む塩化物溶液または硫酸塩溶液のような金属塩
からなる化学金メッキ液に室温程度で浸し、さらに金属
イオンの還元剤としてホルムアルデヒドやロッシェル塩
等で還元して無電解金メッキを生成し、下地のニッケル
メッキ層9−a上部に金メッキ層9−bを形成する。こ
れら、ニッケルメッキ層9−aと金メッキ層9−bとの
全体で金属メッキ9を形成する。Further, gold plating is performed using flash gold to form a thin plating layer having a thickness of about 50 nm. Immerse in a chemical gold plating solution composed of a metal salt such as a chloride solution or a sulfate solution containing gold ions at about room temperature, and further reduce with formaldehyde or Rochelle salt as a metal ion reducing agent to generate electroless gold plating, A gold plating layer 9-b is formed on the underlying nickel plating layer 9-a. The metal plating 9 is formed on the whole of the nickel plating layer 9-a and the gold plating layer 9-b.
【0035】図4および図5に、図3で説明した作成工
程による本発明の請求項1と請求項2に係るセル20の
ガラス基板1上の透明導電膜パターンと金属メッキパタ
ーン領域図を示す。図4は、本発明の請求項1に係る金
属メッキ9の領域図である。図5は、本発明の請求項2
に係る金属メッキ9の領域図である。FIGS. 4 and 5 show a transparent conductive film pattern and a metal plating pattern region on the glass substrate 1 of the cell 20 according to the first and second embodiments of the present invention according to the production process described with reference to FIG. . FIG. 4 is a region diagram of the metal plating 9 according to claim 1 of the present invention. FIG. 5 shows a second embodiment of the present invention.
FIG. 3 is a region diagram of metal plating 9 according to the first embodiment.
【0036】図4では、1はガラス基板、7は偏光フィ
ルタ、9は金属メッキ部、12はLSIのバンプに対応
する領域であり、バンプに対応する領域がITO膜等の
透明導電膜であるために、ベアチップであるLSIがL
SI圧着部に対しての位置ズレ、圧着部に均一な圧着力
で導通粒子(フィラ)が均一に潰れているか、さらに導
通粒子(フィラ)の潰れが所定の量に達しているか等を
セルのガラス側(裏)から観察および検査ができる。In FIG. 4, 1 is a glass substrate, 7 is a polarizing filter, 9 is a metal plated portion, 12 is a region corresponding to a bump of an LSI, and a region corresponding to the bump is a transparent conductive film such as an ITO film. Therefore, the bare chip LSI is L
Whether the conductive particles (filler) are uniformly crushed with a uniform pressing force on the crimping portion, and whether the crushing of the conductive particles (filler) has reached a predetermined amount, is determined by checking the cell position. Observation and inspection can be performed from the glass side (back).
【0037】さらに、図5では、図4における機能とと
もに、1はガラス基板、7は偏光フィルタ、12はLS
Iのバンプに対応する領域、13は電源線、14は接地
線からなり、13と14のみに金属メッキ9を施して、
大きな電流でも熱を発生せずに電流を流せるとともに、
リード線等の接続に機械的強度が得られ、またハンダの
濡性が良くなる様にした。Further, in FIG. 5, together with the functions in FIG. 4, 1 is a glass substrate, 7 is a polarizing filter, and 12 is LS.
A region corresponding to the bump I, 13 is a power line, 14 is a ground line, and metal plating 9 is applied only to 13 and 14,
Able to flow current without generating heat even with large current,
Mechanical strength was obtained for connection of lead wires and the like, and solder wettability was improved.
【0038】図6に図3に係るCOGの一実施の形態に
おける要部フローチャート図を示す。状態1は、ガラス
基板1に、エッチングにより酸化インジウムスズで表示
領域と、表示部への配線および外部電極6とのパターン
ITO膜3の透明導電膜を形成する。FIG. 6 is a flowchart showing the main part of an embodiment of the COG shown in FIG. In state 1, a transparent conductive film of the patterned ITO film 3 is formed on the glass substrate 1 by etching using indium tin oxide and a wiring to the display unit and the external electrode 6.
【0039】次に、状態2では、金属メッキの下層(地
メッキ)であるニッケルメッキ用9−aのマスクパター
ンをフォトレジストでマスキングする。金属メッキの必
要としない部分(液晶表示領域やバンプ部)をフォトレ
ジストで覆う(コーティング)。Next, in state 2, the mask pattern of the nickel plating 9-a, which is the lower layer (ground plating) of the metal plating, is masked with a photoresist. The portions that do not require metal plating (the liquid crystal display area and bumps) are covered (coated) with photoresist.
【0040】さらに、状態3では、金属メッキの下層
(地メッキ)であるニッケルメッキを外部から電流を流
すことなく、溶液中の金属イオンを還元折出させ被メッ
キ体の表面にメッキ層を析出させる無電解法でニッケル
メッキを施す。フォトレジストがない部分にニッケルメ
ッキが折出する。Further, in the state 3, the metal ion in the solution is reduced and precipitated by the nickel plating, which is the lower layer (ground plating) of the metal plating, without passing an electric current from the outside, and the plating layer is deposited on the surface of the body to be plated. Nickel plating by an electroless method. Nickel plating breaks out where there is no photoresist.
【0041】状態4は、先の状態2で形成した無電解ニ
ッケルメッキ用のマスクパターンを洗剤や剥離剤等を用
いてフォトレジストを剥離除去する。In state 4, the photoresist is peeled off the mask pattern for electroless nickel plating formed in state 2 using a detergent or a stripping agent.
【0042】状態5では、状態4でのフォトレジストの
残骸を熱でさらに除去するとともに、ガラス基板1の歪
等を無くし、ニッケルメッキ層の密着度を強固にすため
に250゜Cの温度で30分間エージングする。In state 5, the photoresist debris in state 4 is further removed by heat, and at the temperature of 250 ° C. in order to eliminate the distortion and the like of the glass substrate 1 and strengthen the adhesion of the nickel plating layer. Age for 30 minutes.
【0043】さらに、状態6では、再度、無電解メッキ
法によって金メッキ9−bを下地のニッケルメッキ層9
−a上に施し、ニッケルメッキ層9−aと金メッキ層9
−bとの全体で金属メッキ9を形成する。Further, in the state 6, the gold plating 9-b is again applied to the underlying nickel plating layer 9 by electroless plating.
-A, a nickel plating layer 9-a and a gold plating layer 9
-B to form the metal plating 9 as a whole.
【0044】状態7は、状態6までのガラス基板1の液
晶表示をするセグメント側表示の透明電極膜3と、これ
に対応するコモン側表示の透明電極膜を形成したガラス
基板2との2枚を位置合せして、その2枚のガラス基板
の間にギャップを設けて周囲に樹脂等のシール5で封止
(但し、液晶を注入する注入口には、未シール)する。The state 7 is a two-layer structure of the transparent electrode film 3 for segment side display for liquid crystal display of the glass substrate 1 up to the state 6 and the glass substrate 2 on which the corresponding transparent electrode film for common side display is formed. Are aligned, a gap is provided between the two glass substrates, and the periphery is sealed with a seal 5 made of resin or the like (however, an injection port for injecting liquid crystal is not sealed).
【0046】また、液晶注入装置等で、ガラス基板をチ
ャンバの中に入れ、真空ポンプにより排気を行い、排気
後に液晶が入った専用の液晶皿にガラス基板を浸けてセ
ルの中に液晶を注入させる。Further, a glass substrate is put into a chamber by a liquid crystal injection device or the like, and the chamber is evacuated by a vacuum pump. Let it.
【0047】さらに、ガラス基板のセル中に液晶が注入
されると、注入口を樹脂等で封止する。また、セルの上
部に入射光の偏光方向を一方向に限定する(液晶表示方
法によって、光に対して反射型や透過型、また偏光方向
に対する液晶自体のツィスト方法により異なる。)偏光
フィルタを貼りつける。Further, when the liquid crystal is injected into the cells of the glass substrate, the injection port is sealed with a resin or the like. In addition, a polarization filter for limiting the polarization direction of incident light to one direction (depending on the liquid crystal display method, reflection type or transmission type for light, or twisting method of the liquid crystal itself for polarization direction) is attached to the upper part of the cell. Put on.
【0048】状態8は、出来上がった液晶表示素子のバ
ンプ部に電気導伝性の良い銀粒子(フィラ)からなる導
通粒子11を分散した樹脂を用いてフェイスダウン圧着
する。In the state 8, the bumps of the completed liquid crystal display element are face-down bonded by using a resin in which conductive particles 11 made of silver particles (fillers) having good electric conductivity are dispersed.
【0049】この時、ベアチップであるLSIがLSI
圧着部に対し位置ズレを起こさない様に、LSI上部か
らフラットな板状圧着機(例えばボンダ)で導通粒子1
1(フィラ)が一定量潰れる様な均一な一定の圧力を加
える。圧着力や樹脂等によって、冷圧着、熱圧着(室温
150゜C)および加圧力(0.1〜1Kg)や加圧時
間(0.1〜60Sec)等ボンディングを色々変える
ことができる。また、同時にガラス基板とLSIとの間
は樹脂により接着される。At this time, the LSI which is a bare chip is
The conductive particles 1 are flattened from the top of the LSI with a flat plate-shaped crimping machine (for example, a bonder) so as not to displace the crimping portion.
A uniform pressure is applied so that 1 (filler) is crushed by a certain amount. Various bonding such as cold pressing, hot pressing (room temperature 150 ° C.), pressing force (0.1 to 1 kg), pressing time (0.1 to 60 sec), and the like can be changed depending on the pressing force and the resin. At the same time, the glass substrate and the LSI are bonded with a resin.
【0050】図7に図6の要部フローチャート中におけ
る無電解ニッケルメッキ部のフローを示す。状態3aで
は、金属メッキ9を施すために、表面の汚れの除去や脱
脂等のためにアルカリ性の溶液でクリーニングを行う。FIG. 7 shows the flow of the electroless nickel plating section in the flowchart of the main part of FIG. In the state 3a, in order to apply the metal plating 9, cleaning is performed with an alkaline solution for removing stains and degreasing the surface.
【0051】さらに状態3bでは、状態3aで行った処
理によるアルカリ性を塩酸等の酸で中和する。Further, in the state 3b, the alkalinity of the treatment performed in the state 3a is neutralized with an acid such as hydrochloric acid.
【0052】また状態3cは、触媒化処理の第一段階と
して、のキャタリスト処理を塩化第一スズと塩化パラジ
ウム等からなる金属塩化物と塩酸で室温〜40゜C程度
の温度で2〜3分間程浸漬す。In the state 3c, as a first step of the catalyzing treatment, the catalyst treatment is carried out with a metal chloride composed of stannous chloride and palladium chloride and hydrochloric acid at room temperature to about 40 ° C. for 2 to 3 times. Soak for about a minute.
【0053】さらに状態3dでは、キャタリスト処理に
よる保護コロイドや錯イオンを形成している触媒核を5
〜10%程度の塩酸または硫酸等の酸からなるアクセレ
ータ溶液で30〜50゜C程度の温度で2〜5分程度処
理し活性化させる。Further, in the state 3d, the catalyst nucleus forming the protective colloid or the complex ion by the catalyst treatment is reduced to 5%.
Activate by treating with an accelerator solution consisting of about 10 to 10% of an acid such as hydrochloric acid or sulfuric acid at a temperature of about 30 to 50 ° C. for about 2 to 5 minutes.
【0054】状態3eでは、無電解ニッケルメッキを生
成するために、ニッケルイオンを含む塩化ニッケル溶液
または硫酸ニッケル溶液のような化学ニッケルメッキ液
に室温〜30゜C程度の温度で3〜5分間程度浸す。こ
のように、無電解ニッケルメッキによって、金属メッキ
9の下地であるニッケルメッキを形成する。In state 3e, in order to generate electroless nickel plating, a chemical nickel plating solution such as a nickel chloride solution or a nickel sulfate solution containing nickel ions is applied at room temperature to about 30 ° C. for about 3 to 5 minutes. Soak. Thus, the nickel plating which is the base of the metal plating 9 is formed by the electroless nickel plating.
【0055】図8に図6の要部フローチャート図中にお
ける無電解金部のフロー図を示す。状態6aでは、金メ
ッキを施すために、始めにニッケルメッキ等、表面の汚
れの除去や脱脂等のためにアルカリ性の溶液でクリーニ
ングを行う。FIG. 8 shows a flow chart of the electroless gold part in the main part flowchart of FIG. In the state 6a, first, cleaning with an alkaline solution such as nickel plating or the like is performed to remove dirt or degrease the surface in order to apply gold plating.
【0056】状態6bでは、硫酸等の酸により、状態6
aでのアルカリ性を中和するとともに、ニッケル表面を
活性化させる。In the state 6b, an acid such as sulfuric acid is used to change the state 6b.
a. Neutralize the alkalinity in a and activate the nickel surface.
【0057】状態6cは、金イオンを含む塩化物溶液ま
たは硫酸塩溶液のような金属塩からなる化学金メッキ液
に室温程度で浸し、さらに金属イオンの還元剤としてホ
ルムアルデヒドやロッシェル塩等で還元して無電解金メ
ッキを生成する。The state 6c is obtained by immersing in a chemical gold plating solution comprising a metal salt such as a chloride solution or a sulfate solution containing a gold ion at about room temperature, and further reducing it with formaldehyde or Rochelle salt as a reducing agent of the metal ion. Produces electroless gold plating.
【0058】このように、無電解金メッキによって、ニ
ッケルメッキの上層を金メッキで形成する。図7で形成
した下地のニッケルメッキ層の上部に図8で形成した金
メッキ層によって、全体として金属メッキ9を形成す
る。As described above, the upper layer of nickel plating is formed by gold plating by electroless gold plating. The metal plating 9 is formed as a whole by the gold plating layer formed in FIG. 8 on the nickel plating layer of the base formed in FIG.
【0059】このように、本発明の液晶表示素子は、バ
ンプに対応する領域がITO膜等の透明導電膜で形成さ
れているのために、ベアチップのバンプ部に対して、位
置ズレや導通粒子(フィラ)が均一に潰れているか、さ
らに導通粒子(フィラ)の潰れが所定の量に達している
か等をセルのガラス側(裏)から観察および検査ができ
る。また、LSIへの電源配線と接地配線および昇圧用
配線に金属メッキを施したので、発熱せずに大きな電流
を流せ、リード線等の接続に機械的強度を増し、ハンダ
の濡れ性が改善できる。さらに、本発明は、ガラス基板
だけでなく、透明であれば樹脂フイルムを用いても良
い。As described above, in the liquid crystal display element of the present invention, since the regions corresponding to the bumps are formed of the transparent conductive film such as the ITO film, misalignment or conductive particles are not generated with respect to the bump portion of the bare chip. It is possible to observe and inspect whether the (filler) is uniformly crushed and whether the crushing of the conductive particles (filler) has reached a predetermined amount from the glass side (back side) of the cell. In addition, since metal plating is applied to the power supply wiring, the ground wiring, and the boosting wiring to the LSI, a large current can flow without generating heat, mechanical strength can be increased for connection of lead wires and the like, and solder wettability can be improved. . Further, the present invention may use not only a glass substrate but also a resin film as long as it is transparent.
【0060】[0060]
【発明の効果】以上のように、請求項1に係る液晶表示
素子は、セル端部に設けられた外部電極、液晶密封空間
内の表示電極、表示電極に連なる配線部はいずれも透明
導電膜で構成され、かつ、配線部および外部電極は、そ
れぞれのLSIとの接合部を除いて、金属メッキまたは
蒸着による金属層で覆われているので、セルのガラス側
(裏)からLSIのバンプ部とガラス基板上のLSI圧
着部との位置ズレのチェックや、導通粒子の潰れの均一
性や、導通粒子の潰れが所定量であるか無いかの観察お
よび検査をすることができるので、マウント後の不良を
少なく、リペア量とリペア工程とを少なくすることが出
来、コストおよび信頼性の向上が図れる。As described above, in the liquid crystal display device according to the first aspect, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all transparent conductive films. In addition, the wiring portion and the external electrode are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with each LSI. Therefore, the bump portion of the LSI is formed from the glass side (back side) of the cell. After the mounting, it is possible to check the positional deviation between the substrate and the LSI crimping part on the glass substrate, and to observe and inspect whether the crushing of the conductive particles is uniform or a predetermined amount. And the repair amount and the repair process can be reduced, and the cost and reliability can be improved.
【0061】また、請求項2に係る液晶表示素子は、セ
ル端部に設けられた外部電極、液晶密封空間内の表示電
極、表示電極に連なる配線部はいずれも透明導電膜で構
成され、かつ、外部電極のうちの電源用、接地配線用お
よび昇圧配線用の電極のみに、LSIとの接合部を除い
て、金属メッキまたは蒸着による金属層で覆われている
ので、セルのガラス側(裏)からLSIのバンプ部とガ
ラス基板上のLSI圧着部との位置ズレや均一な圧着で
導通粒子の潰れが所定量であるか無いかの観察および検
査ができるとともに、低抵抗化と電流容量が取れるの
で、発熱せずに大きな電流を流せ、リード線等の接続に
機械的強度を増すことができ、ハンダの濡れ性の改善を
得ることができるので、作業操作性や信頼性の向上が図
れる。Further, in the liquid crystal display element according to the present invention, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film, and Since only the electrodes for the power supply, the ground wiring, and the boost wiring among the external electrodes are covered with the metal layer formed by metal plating or vapor deposition except for the joint portion with the LSI, the glass side of the cell (the back side) ) Can observe and inspect whether or not the conductive particles are crushed by a predetermined amount by misalignment between the bump portion of the LSI and the LSI crimping portion on the glass substrate or by uniform crimping. As a result, a large current can flow without generating heat, mechanical strength can be increased for connection of lead wires and the like, and improvement in solder wettability can be obtained, thereby improving work operability and reliability. .
【0062】よって、液晶表示素子へのLSI等のベア
チップの実装時および/または実装後にベアチップとガ
ラス基板との接続部の観察が可能であり、且つLSI等
のベアチップへの電源や接地および昇圧用などの配線に
対して低抵抗化を図ることができる。Therefore, it is possible to observe the connection between the bare chip and the glass substrate during and / or after mounting the bare chip such as an LSI on the liquid crystal display element, and to supply power, ground and boost to the bare chip such as the LSI. It is possible to reduce the resistance of wiring such as.
【図1】液晶表示素子の基本的な構成図FIG. 1 is a basic configuration diagram of a liquid crystal display element.
【図2】発明に係る液晶表示素子のLSI装着部の断面
図FIG. 2 is a sectional view of an LSI mounting portion of the liquid crystal display element according to the invention.
【図3】本発明の液晶表示素子の主要処理工程図FIG. 3 is a view showing main processing steps of the liquid crystal display element of the present invention.
【図4】請求項1に係る金属メッキ9の領域図FIG. 4 is a region diagram of the metal plating 9 according to claim 1.
【図5】請求項2に係る金属メッキ9の領域図FIG. 5 is a region diagram of the metal plating 9 according to claim 2;
【図6】図3に係るCOGの一実施の形態おける要部フ
ローチャート図FIG. 6 is a flowchart of a main part in one embodiment of the COG according to FIG. 3;
【図7】図3に係るCOGの一実施の形態おけるニッケ
ルメッキの要部フロー図FIG. 7 is a flowchart of a main part of nickel plating in one embodiment of the COG according to FIG. 3;
【図8】図3に係るCOGの一実施の形態おける金メッ
キの要部フロー図FIG. 8 is a flowchart of a main part of gold plating in one embodiment of the COG according to FIG. 3;
【図9】従来のCOG型液晶表示素子のセル上に設置し
たLSI付近の断面図FIG. 9 is a cross-sectional view around an LSI installed on a cell of a conventional COG type liquid crystal display device.
1…ガラス基板、2…透明電極膜(コモン側)、3…透
明電極膜(表示側)、4…液晶、5…シール、6…外部
電極、7…偏向フィルタ、8…駆動用LSI、9…金属
メッキ、9a…ニッケルメッキ(無電解ニッケルメッ
キ)、9b…金メッキ(無電解金メッキ)、10…バン
プ、11…導通粒子(銀粒子)、12…フォトレジス
ト、13…電源線、14…接地線、20…セル。DESCRIPTION OF SYMBOLS 1 ... Glass substrate, 2 ... Transparent electrode film (common side), 3 ... Transparent electrode film (display side), 4 ... Liquid crystal, 5 ... Seal, 6 ... External electrode, 7 ... Deflection filter, 8 ... Driving LSI, 9 ... metal plating, 9a ... nickel plating (electroless nickel plating), 9b ... gold plating (electroless gold plating), 10 ... bumps, 11 ... conductive particles (silver particles), 12 ... photoresist, 13 ... power supply line, 14 ... grounding Line, 20 ... cell.
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成9年7月31日[Submission date] July 31, 1997
【手続補正1】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】全文[Correction target item name] Full text
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【書類名】 明細書[Document Name] Statement
【発明の名称】 液晶表示素子[Title of the Invention] Liquid crystal display device
【特許請求の範囲】[Claims]
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【0001】[0001]
【発明の属する技術分野】この発明は、液晶表示素子の
セルの周辺部にLSIを設置して、その配線部を金属メ
ッキまたは/および蒸着により金属で覆われているガラ
ス基板上にLSIチップをフェイスダウンボンディング
で実装する時において、LSIチップと配線部との確実
な電気的接触を実現する液晶表示素子に関する。BACKGROUND OF THE INVENTION The present invention relates to a method of mounting an LSI chip on a glass substrate having a wiring portion covered with metal by metal plating or / and vapor deposition by installing an LSI around a cell of a liquid crystal display element. The present invention relates to a liquid crystal display element that realizes reliable electrical contact between an LSI chip and a wiring portion when mounted by face-down bonding.
【0002】[0002]
【従来の技術】近年、液晶表示素子において、コスト、
工程数や信頼性等からガラス基板上に液晶駆動用LSI
チップを実装するCOG型(Chip On Glas
s)の液晶表示素子が多く用いられている。図1に液晶
表示素子の基本的な構成を示す。図1は、上下2枚のガ
ラス基板1の位置合せし、2枚のガラス基板の間にギャ
ップを設けてギャップに液晶4を封入し、周囲に樹脂等
のシール5で封止し、ガラス基板の表面には、ネサ膜や
ITO膜等の透明導電膜のパターン2、3を形成してい
る。2. Description of the Related Art In recent years, cost,
LSI for driving liquid crystal on a glass substrate due to the number of processes and reliability
COG type (Chip On Glass) for mounting a chip
The liquid crystal display element of s) is often used. FIG. 1 shows a basic configuration of a liquid crystal display element. FIG. 1 shows an alignment of two glass substrates 1 above and below, a gap is provided between the two glass substrates, a liquid crystal 4 is sealed in the gap, and the periphery is sealed with a seal 5 such as a resin. Are formed with transparent conductive patterns 2 and 3 such as a Nesa film and an ITO film.
【0003】さらに、液晶表示素子のセルの表面には、
偏光フィルタ7が貼られている。また、液晶駆動用LS
I8が外部配線部に設置されており、外部電極6から電
源と表示命令信号を取入れて、液晶表示素子用の信号を
表示部に供給する。なお、パターン3等の形成時に同時
に形成されたセル外部の部分を外部電極、配線部とす
る。Further, on the surface of the cell of the liquid crystal display element,
A polarizing filter 7 is attached. LS for driving liquid crystal
I8 is provided in the external wiring section, and takes in a power supply and a display command signal from the external electrode 6, and supplies a signal for the liquid crystal display element to the display section. The portions outside the cell formed simultaneously with the formation of the pattern 3 and the like are referred to as external electrodes and wiring portions.
【0004】図9に従来のCOG型液晶表示素子のセル
上に設置したLSI付近の断面図を示す。図9は、ガラ
ス基板1に設置されている外部電極6に施された金属メ
ッキ9は駆動用LSI8の直下の接続部まで覆ってい
る。また、外部電極6の全体を電気抵抗を下げる目的
で、例えば特開平4−170524のように、金属メッ
キ9を施したものもある。FIG. 9 is a sectional view showing the vicinity of an LSI installed on a cell of a conventional COG type liquid crystal display device. FIG. 9 shows that the metal plating 9 applied to the external electrode 6 provided on the glass substrate 1 covers the connection portion immediately below the driving LSI 8. In addition, there is a type in which the metal plating 9 is applied to the entire outer electrode 6 for the purpose of lowering the electric resistance, for example, as disclosed in JP-A-4-170524.
【0005】さらに、セルの周辺部に設置した駆動用L
SI8の外部導通部のバンプ10と外部電極6との間に
電気導伝性のある導通粒子11(フィラ)を分散した樹
脂を用いてフェイスダウンで圧着する。Further, a driving L provided at the periphery of the cell
The conductive particles 11 (filler) having electrical conductivity are pressed between the bumps 10 of the external conductive portion of the SI 8 and the external electrode 6 face down by using a resin in which the conductive particles 11 are dispersed.
【0006】次に、導通粒子11を介した導通を確認す
るために、導通粒子11が所定の量潰れて、接続が完全
であることを確認するために、駆動用LSI8を外部電
極6の金属メッキ9膜上に装着後に、ガラス側から光学
顕微鏡により圧着部の観察をする。また、駆動電源接続
等により表示検査をする。Next, in order to confirm that the conductive particles 11 are crushed by a predetermined amount and to confirm that the connection is complete, the driving LSI 8 is connected to the metal of the external electrode 6 in order to confirm the conduction through the conductive particles 11. After mounting on the plating 9 film, the crimped portion is observed from the glass side by an optical microscope. In addition, a display inspection is performed by connecting a driving power supply or the like.
【0007】[0007]
【発明が解決しようとする課題】フェイスダウンで圧着
によって、導通粒子の潰れが不十分で弱く接触している
と、経時的に接触が切れてしまうことがあるために、L
SIの圧着の条件出し、及び処理された製品の検査のた
めに圧着部を観察する。この時金属メッキ膜があると、
金属メッキ膜に遮られて目視や光学的観察等ができない
ため以下のような課題がある。If the conductive particles are insufficiently crushed by the face-down pressure bonding and are weakly in contact with each other, the contact may be broken with time.
Observe the crimping part for setting the crimping condition of the SI and inspecting the processed product. At this time, if there is a metal plating film,
Since it cannot be visually observed or optically observed because of being blocked by the metal plating film, there are the following problems.
【0008】ガラス基板上のLSI圧着部にまで金属メ
ッキ膜があると、圧着による導通粒子(フィラ)の潰れ
が所定量であるか、セルのガラス側(裏)から目視や光
学的な観察および検査等ができない課題がある。If a metal plating film is present up to the LSI crimping portion on the glass substrate, the collapse of the conductive particles (filler) due to the crimping is determined by a visual or optical observation from the glass side (back side) of the cell. There is a problem that inspection cannot be performed.
【0009】また、ガラス基板上のLSI圧着部にまで
金属メッキ膜があると、ガラス基板上のLSI圧着部に
LSIのバンプ部が均一な圧力でフィラと圧着されてい
るか、セルのガラス側(裏)から目視や光学的な観察お
よび検査等ができない課題がある。Further, if a metal plating film is provided up to the LSI crimping portion on the glass substrate, the bump portion of the LSI is crimped to the filler at a uniform pressure on the LSI crimping portion on the glass substrate or the cell side ( There is a problem that visual observation, optical observation, inspection and the like cannot be performed from the back).
【0010】さらに、ガラス基板上のLSI圧着部にま
で金属メッキ膜があると、LSIのバンプ部とガラス基
板上のLSI圧着部との位置ズレを、セルのガラス側
(裏)から目視や光学的な観察および検査等ができない
課題がある。Further, if a metal plating film is provided up to the LSI crimping portion on the glass substrate, the positional deviation between the LSI bump portion and the LSI crimping portion on the glass substrate can be visually or optically determined from the glass side (back side) of the cell. There is a problem that it is not possible to perform a specific observation and inspection.
【0011】[0011]
【課題を解決するための手段】前記課題を解決するため
請求項1に係る液晶表示素子は、セル端部に設けられた
外部電極、液晶密封空間内の表示電極、表示電極に連な
る配線部はいずれも透明導電膜で構成され、かつ、配線
部および外部電極は、それぞれのLSIとの接合部を除
いて、金属メッキまたは蒸着による金属層で覆われてい
ることを特徴とする。According to a first aspect of the present invention, there is provided a liquid crystal display device comprising: an external electrode provided at a cell end; a display electrode in a liquid crystal sealed space; and a wiring portion connected to the display electrode. Each is characterized by being formed of a transparent conductive film, and the wiring portion and the external electrode are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with each LSI.
【0012】請求項1に係る液晶表示素子は、セル端部
に設けられた外部電極、液晶密封空間内の表示電極、表
示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、配線部および外部電極は、それぞれのLSI
との接合部を除いて、金属メッキまたは蒸着による金属
層で覆われているので、セルのガラス側(裏)からLS
Iのバンプ部とガラス基板上のLSI圧着部との位置ズ
レや均一な圧着で導通粒子(フィラ)の潰れが所定量で
あるか無いかの観察および検査が可視的および光学的方
法により行うことができる。In the liquid crystal display element according to the present invention, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film. Section and external electrodes are each LSI
Except for the junction with, the cell is covered with a metal layer formed by metal plating or vapor deposition.
Observation and inspection by visual and optical methods to determine whether a predetermined amount of conductive particles (fillers) are crushed by misalignment between the bump portion of I and the LSI crimping portion on the glass substrate or by uniform crimping. Can be.
【0013】また、請求項2に係る液晶表示素子は、セ
ル端部に設けられた外部電極、液晶密封空間内の表示電
極、表示電極に連なる配線部はいずれも透明導電膜で構
成され、かつ、外部電極のうちの電源用、接地配線用お
よび昇圧配線用の電極のみに、LSIとの接合部を除い
て、金属メッキまたは蒸着による金属層で覆われている
ことを特徴とする。Further, in the liquid crystal display element according to the present invention, the external electrode provided at the end of the cell, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film, and Only the electrodes for the power supply, the ground wiring, and the boosting wiring among the external electrodes are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with the LSI.
【0014】請求項2に係る液晶表示素子は、セル端部
に設けられた外部電極、液晶密封空間内の表示電極、表
示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、外部電極のうちの電源用、接地配線用および
昇圧配線用の電極のみに、LSIとの接合部を除いて、
金属メッキまたは蒸着による金属層で覆われているの
で、セルのガラス側(裏)からLSIのバンプ部とガラ
ス基板上のLSI圧着部との位置ズレや均一な圧着で導
通粒子(フィラ)の潰れが所定量であるか無いかの観察
および検査ができるとともに、大きな電流が流せ、リー
ド線等の接続に機械的強度やハンダの濡性の改善を得る
ことができる。According to a second aspect of the present invention, in the liquid crystal display device, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film. Only the electrodes for the power supply, the ground wiring, and the boost wiring among the electrodes, except for the junction with the LSI,
Since it is covered with a metal layer formed by metal plating or vapor deposition, conductive particles (fillers) are crushed by misalignment of the bump portion of the LSI and the LSI crimping portion on the glass substrate from the glass side (back) of the cell or uniform crimping. Can be observed and inspected as to whether the amount is a predetermined amount or not, a large current can flow, and the mechanical strength and the solder wettability of the connection of the lead wire and the like can be improved.
【0015】[0015]
【発明の実施の形態】以下、この発明の実施の形態を添
付図面に基づいて説明する。なお、この発明は、COG
型の液晶表示素子において、セル上の配線部を金属メッ
キまたは/および蒸着により金属で覆い、且つLSIの
圧着部には、金属メッキまたは/および蒸着を施さない
で、セルのガラス側(裏)から圧着部を検査および観測
が可能な液晶表示素子を提供するものである。Embodiments of the present invention will be described below with reference to the accompanying drawings. Note that the present invention relates to COG
In the liquid crystal display element of the type, the wiring portion on the cell is covered with metal by metal plating or / and vapor deposition, and the crimping portion of the LSI is not subjected to metal plating or / and vapor deposition, and the glass side of the cell (back) The present invention provides a liquid crystal display device capable of inspecting and observing a pressure-bonded portion from the same.
【0016】図2に、この発明に係る液晶表示素子のL
SI装着部の断面図を示す。図2は、ガラス基板1に真
空蒸着、スパッタリング、イオンプレーティング、化学
蒸着(CVD)等と、それに続きエッチング(ウェッ
ト、ドライ)による方法で、酸化錫や酸化インジウムお
よび酸化インジウム錫等の化合物で出来た透明導電膜の
ネサ膜やITO膜等からなる表示パターンと外部電極6
を同時に形成し、駆動用LSI8のバンプ10部を圧着
する部分以外を金属メッキ9を施し、バンプ10と外部
電極6との間に電気導伝性のある導通粒子11(フィ
ラ)を分散した樹脂を用いてフェイスダウンで圧着する
構成である。FIG. 2 shows the L of the liquid crystal display device according to the present invention.
FIG. 3 shows a cross-sectional view of an SI mounting portion. FIG. 2 shows a method of vacuum deposition, sputtering, ion plating, chemical vapor deposition (CVD), etc., followed by etching (wet, dry) on a glass substrate 1 using a compound such as tin oxide, indium oxide, and indium tin oxide. The display pattern and external electrode 6 made of the formed transparent conductive film such as a Nesa film or an ITO film.
Are formed at the same time, metal plating 9 is applied to portions other than the portions where the bumps 10 of the driving LSI 8 are pressed, and conductive particles 11 (fillers) having electrical conductivity are dispersed between the bumps 10 and the external electrodes 6. This is a configuration in which the pressure bonding is performed face down using a.
【0017】ガラス基板1は、ガラス成分としてアルカ
リを含有しないソーダライムガラスを主成分とし、熱的
安定が良く歪点を高く設定し、熱膨張係数も常温から3
50°Cで46〜47(×10-7/°C)程度あり、ま
た溶解温度も1600〜1650°Cと高いものが用い
られる。さらに平坦度に対し、偏肉、反り、うねり、表
面粗さ等の少ない、また傷、ピット、汚れ等の点で高度
品位なガラスから成り、場合によっては、表面研磨を施
すものもある。The glass substrate 1 is composed mainly of soda lime glass containing no alkali as a glass component, has good thermal stability and a high strain point, and has a thermal expansion coefficient of 3 from normal temperature.
At 50 ° C., the temperature is about 46 to 47 (× 10 −7 / ° C.), and the melting temperature is as high as 1600 to 1650 ° C. Further, with respect to the flatness, the glass is made of high-quality glass with little unevenness, warpage, undulation, surface roughness, and the like, and has high quality in terms of scratches, pits, dirt, and the like.
【0018】表示パターンと外部電極6は、酸化錫や酸
化インジウムを主な成分とし、酸化インジウム錫(IT
O)酸化カドミウム錫等からなる化合物を真空蒸着や化
学蒸着で透明導電膜を形成し、その後エッチングを施し
断定形状の透明電極とする。The display pattern and the external electrode 6 are mainly composed of tin oxide or indium oxide, and are composed of indium tin oxide (IT).
O) A transparent conductive film is formed by vacuum evaporation or chemical vapor deposition of a compound made of cadmium tin oxide or the like, and then etched to form a transparent electrode having a predetermined shape.
【0019】金属メッキ9は、透明導電膜上に選択メッ
キによりニッケルを例えば500nm程度の厚さに施
し、さらにその表面に金メッキを例えば厚さ50nm程
度施す。また、ベアチップを装着するバンプ10部は、
金属メッキ9を施さずに、透明導電膜のままである。In the metal plating 9, nickel is applied to the transparent conductive film by selective plating to a thickness of, for example, about 500 nm, and gold plating is applied to the surface thereof, for example, to a thickness of about 50 nm. Also, 10 parts of the bump for mounting the bare chip,
The transparent conductive film remains as it is without applying the metal plating 9.
【0020】また、金属メッキ9を施す領域は、基本的
にはLSI8の導通部となるバンプ10部に掛からなけ
れが良いが、金属メッキ9が掛からない様に、金属メッ
キ9を施す領域をバンプ10部から30μm以上から
0.5mm以下離して所を金属メッキの境界部とする。The area where the metal plating 9 is to be applied should basically not be applied to the bump 10 serving as a conductive portion of the LSI 8, but the area where the metal plating 9 is applied should be bumped so that the metal plating 9 is not applied. A part separated from 10 parts by 30 μm or more and 0.5 mm or less is defined as a boundary of metal plating.
【0021】導通粒子11(フィラ)は、樹脂に5〜1
5μm程度の銀(Ag)の粒子からなる導通粒子を分散
したものである。この導通粒子11を外部電極6とLS
I8が対向するバンプ10部に設置する。The conductive particles 11 (filler) are formed by adding 5-1 to resin.
This is a dispersion of conductive particles composed of silver (Ag) particles of about 5 μm. The conductive particles 11 are connected to the external electrode 6 by LS.
I8 is installed on the 10 bumps facing each other.
【0022】さらに、LSI8を所定位置のバンプ10
部に置き、均一な圧力でフェイスダウンにより圧着を行
う。これにより、樹脂中のフィラが潰れて、フィラ同士
が面接触をして、導通性が得られる。Further, the LSI 8 is mounted on the bump 10 at a predetermined position.
And press-fit by face down with uniform pressure. As a result, the filler in the resin is crushed, and the fillers come into surface contact with each other, thereby obtaining conductivity.
【0023】次に、導通粒子11を介した導通を確認す
るために、導通粒子11が所定の量が潰れているかをガ
ラス側(裏)から圧着部を可視的、光学的方法により検
査観測し、導通粒子の潰れが所定量であるか無いか、さ
らにLSI8と圧着部とのバンプ部の位置ズレや導通粒
子が均一に潰れているかを確認する構成である。Next, in order to confirm conduction through the conductive particles 11, whether the conductive particles 11 are crushed by a predetermined amount is inspected and observed from the glass side (back side) of the crimped portion by a visual and optical method. In this configuration, it is checked whether the crushing of the conductive particles is a predetermined amount or not, and furthermore, whether the position of the bump portion between the LSI 8 and the pressure-bonding portion is misaligned or whether the conductive particles are crushed uniformly.
【0024】図3に本発明の液晶表示素子の主要処理工
程図を示す。図3のaは、パターニングされたITO膜
付き基板の状態を示す。ソーダライムガラス等からなる
厚さ1.1mm程度のフラットなガラス基板1にエッチ
ング等により酸化スズや酸化インジウム等で表示パター
ン領域と、表示部への配線および外部電極6等のパター
ンを抵抗30Ω/□程度のITO膜3による透明導電膜
を形成する。ただし、バンプ部10は、これら表示部へ
の配線部および外部電極6のパターンの一部であり、表
示領域には、液晶が密閉された空間が形成される。FIG. 3 shows a main processing step diagram of the liquid crystal display device of the present invention. FIG. 3A shows a state of the patterned substrate with the ITO film. A flat glass substrate 1 made of soda lime glass or the like and having a thickness of about 1.1 mm is formed by etching or the like using tin oxide, indium oxide, or the like to form a display pattern region, a wiring to a display portion, and a pattern such as an external electrode 6 having a resistance of 30Ω / A transparent conductive film of about □ of the ITO film 3 is formed. However, the bump portion 10 is a part of the pattern of the wiring portion to the display portion and the pattern of the external electrode 6, and a space where liquid crystal is sealed is formed in the display region.
【0025】図3のbは、フォトレジスト塗布の状態を
示す。また、この状態は、金属メッキ用(ニッケル用)
9−aマスクパターニングである。金属メッキの必要と
しない部分(液晶表示領域やバンプ部)をフォトレジス
トで覆う(コーティング)ために、ガラス基板1にフォ
トレジストをスピンナ等で2μm程度塗布(例えば、こ
こではネガタイプのフォトレジスト)する。FIG. 3B shows the state of photoresist coating. This state is for metal plating (for nickel)
This is 9-a mask patterning. In order to cover (coat) a portion that does not require metal plating (a liquid crystal display region or a bump portion) with a photoresist, a photoresist is applied to the glass substrate 1 by about 2 μm using a spinner or the like (eg, a negative type photoresist in this case). .
【0026】さらに、ステッパ等によって紫外線照射
で、金属メッキの必要としない部分のパターンを露光
(例えば、ここでは、積算光量100mJ/cm2)
し、露光された部分が不溶化となる。またさらに、フォ
トプロセス洗浄装置等の純水によるシャワーや超音波洗
浄等で汚物を除去し、エアーナイフ方式や熱風乾燥方式
等のエアーブロにより乾燥させて、液晶表示領域やバン
プ部にフォトレジストを残存させる。Further, a pattern of a portion that does not require metal plating is exposed to ultraviolet rays by a stepper or the like (for example, here, the integrated light amount is 100 mJ / cm 2 ).
Then, the exposed portion becomes insoluble. Furthermore, dirt is removed by showering with pure water or ultrasonic cleaning in a photo process cleaning device or the like, and is dried by air blow such as an air knife method or a hot air drying method, so that the photoresist remains on the liquid crystal display area and the bump portion. Let it.
【0027】図3のcは、金属メッキ(ニッケル)9−
aを施す状態を示す。図3のbによってフォトレジスト
が無い液晶表示パターンやバンプ部以外に金属メッキを
施すために、始めに表面の汚れの除去や脱脂等の目的の
ためアルカリ性の溶液でクリーニングを行い、次に塩酸
等の酸でアルカリ性を中和する。FIG. 3C shows a metal plating (nickel) 9-.
The state where a is applied is shown. According to FIG. 3B, in order to apply metal plating to portions other than the liquid crystal display pattern and the bump portion having no photoresist, first, cleaning is performed with an alkaline solution for the purpose of removing dirt on the surface or degreasing, and then hydrochloric acid or the like. Neutralize alkalinity with acid.
【0028】さらに、触媒化処理を行う。まず、キャタ
リストとして、塩化第一スズと塩化パラジウム等からな
る金属塩化物、および塩酸を同時に含んだ触媒化処理液
を室温〜40゜C程度で2〜3分間程浸漬する。Further, a catalytic treatment is performed. First, as a catalyst, a catalyzed treatment solution containing simultaneously a metal chloride composed of stannous chloride and palladium chloride and hydrochloric acid is immersed at room temperature to about 40 ° C. for about 2 to 3 minutes.
【0029】次に、キャタリストによる保護コロイドや
錯イオンを形成している触媒核をアクセレータ溶液で処
理し活性化させる。アクセレータ溶液としては、5〜1
0%程度の塩酸または硫酸等の酸を用いて、30〜50
゜C程度の温度で2〜5分程度で処理をする。Next, the catalyst nuclei forming the protective colloid and complex ions by the catalyst are treated with an accelerator solution to be activated. As the accelerator solution, 5-1
Using an acid such as hydrochloric acid or sulfuric acid of about 0%,
The treatment is performed at a temperature of about ゜ C for about 2 to 5 minutes.
【0030】さらに、ニッケルイオンを含む塩化ニッケ
ル溶液または硫酸ニッケル溶液のような化学ニッケルメ
ッキ液に室温〜30゜C程度の温度で、3〜5分間程度
浸して無電解ニッケルメッキを生成し、下地のニッケル
メッキ層9−aを形成する。Further, the substrate is immersed in a chemical nickel plating solution such as a nickel chloride solution or a nickel sulfate solution containing nickel ions at a temperature of room temperature to about 30 ° C. for about 3 to 5 minutes to form electroless nickel plating. To form a nickel plating layer 9-a.
【0031】図3のdは、フォトレジストを剥離した状
態を示す。図3のcで形成した無電解ニッケルメッキ用
のマスクパターンを洗剤や剥離剤等を用いてロールブラ
シやディスクブラシ等または超音波洗浄等でフォトレジ
ストを除去する。FIG. 3D shows a state in which the photoresist has been removed. The photoresist is removed from the mask pattern for electroless nickel plating formed in FIG. 3C by a roll brush, a disk brush, an ultrasonic cleaning, or the like using a detergent, a release agent, or the like.
【0032】図3のeは、金属メッキ(金メッキ)9−
bをニッケルメッキ9−a上に選択的に施した状態を示
す。図3のcの処理工程と同様に、始めに表面の汚れの
除去や脱脂等のためにアルカリ性の溶液でクリーニング
を行い、次に硫酸等の酸でアルカリ性を中和するととも
に、ニッケル表面を活性化させる。FIG. 3E shows a metal plating (gold plating) 9-.
b shows a state where nickel is selectively applied on the nickel plating 9-a. Similar to the treatment step of FIG. 3C, first, the surface is cleaned with an alkaline solution for removing stains and degreasing, and then neutralized with an acid such as sulfuric acid to activate the nickel surface. To
【0033】さらに、メッキ層の厚さを50nm程度の
薄く形成するフラッシュ金による金メッキを行う。金イ
オンを含む塩化物溶液または硫酸塩溶液のような金属塩
からなる化学金メッキ液に室温程度で浸し、さらに金属
イオンの還元剤としてホルムアルデヒドやロッシェル塩
等で還元して無電解金メッキを生成し、下地のニッケル
メッキ層9−a上部に金メッキ層9−bを形成する。こ
れら、ニッケルメッキ層9−aと金メッキ層9−bとの
全体で金属メッキ9を形成する。Further, gold plating is performed using flash gold to form a thin plating layer having a thickness of about 50 nm. Immerse in a chemical gold plating solution composed of a metal salt such as a chloride solution or a sulfate solution containing gold ions at about room temperature, and further reduce with formaldehyde or Rochelle salt as a metal ion reducing agent to generate electroless gold plating, A gold plating layer 9-b is formed on the underlying nickel plating layer 9-a. The metal plating 9 is formed on the whole of the nickel plating layer 9-a and the gold plating layer 9-b.
【0034】図4および図5に、図3で説明した作成工
程による本発明の請求項1と請求項2に係るセル20の
ガラス基板1上の透明導電膜パターンと金属メッキパタ
ーン領域図を示す。図4は、本発明の請求項1に係る金
属メッキ9の領域図である。図5は、本発明の請求項2
に係る金属メッキ9の領域図である。FIGS. 4 and 5 show a transparent conductive film pattern and a metal plating pattern region on the glass substrate 1 of the cell 20 according to the first and second aspects of the present invention according to the production process described with reference to FIG. . FIG. 4 is a region diagram of the metal plating 9 according to claim 1 of the present invention. FIG. 5 shows a second embodiment of the present invention.
FIG. 3 is a region diagram of metal plating 9 according to the first embodiment.
【0035】図4では、1はガラス基板、7は偏光フィ
ルタ、9は金属メッキ部、12はLSIのバンプに対応
する領域であり、バンプに対応する領域がITO膜等の
透明導電膜であるために、ベアチップであるLSIがL
SI圧着部に対しての位置ズレ、圧着部に均一な圧着力
で導通粒子(フィラ)が均一に潰れているか、さらに導
通粒子(フィラ)の潰れが所定の量に達しているか等を
セルのガラス側(裏)から観察および検査ができる。In FIG. 4, 1 is a glass substrate, 7 is a polarizing filter, 9 is a metal plated portion, 12 is a region corresponding to a bump of an LSI, and a region corresponding to the bump is a transparent conductive film such as an ITO film. Therefore, the bare chip LSI is L
Whether the conductive particles (filler) are uniformly crushed with a uniform pressing force on the crimping portion, and whether the crushing of the conductive particles (filler) has reached a predetermined amount, is determined by checking the cell position. Observation and inspection can be performed from the glass side (back).
【0036】さらに、図5では、図4における機能とと
もに、1はガラス基板、7は偏光フィルタ、12はLS
Iのバンプに対応する領域、13は電源線、14は接地
線からなり、13と14のみに金属メッキ9を施して、
大きな電流でも熱を発生せずに電流を流せるとともに、
リード線等の接続に機械的強度が得られ、またハンダの
濡性が良くなる様にした。Further, in FIG. 5, together with the functions in FIG. 4, 1 is a glass substrate, 7 is a polarizing filter, and 12 is LS.
A region corresponding to the bump I, 13 is a power line, 14 is a ground line, and metal plating 9 is applied only to 13 and 14,
Able to flow current without generating heat even with large current,
Mechanical strength was obtained for connection of lead wires and the like, and solder wettability was improved.
【0037】図6に図3に係るCOGの一実施の形態に
おける要部フローチャート図を示す。状態1は、ガラス
基板1に、エッチングにより酸化インジウムスズで表示
領域と、表示部への配線および外部電極6とのパターン
ITO膜3の透明導電膜を形成する。FIG. 6 is a flowchart showing the main part of an embodiment of the COG shown in FIG. In state 1, a transparent conductive film of the patterned ITO film 3 is formed on the glass substrate 1 by etching using indium tin oxide and a wiring to the display unit and the external electrode 6.
【0038】次に、状態2では、金属メッキの下層(地
メッキ)であるニッケルメッキ用9−aのマスクパター
ンをフォトレジストでマスキングする。金属メッキの必
要としない部分(液晶表示領域やバンプ部)をフォトレ
ジストで覆う(コーティング)。Next, in state 2, the mask pattern of 9-a for nickel plating, which is the lower layer (ground plating) of the metal plating, is masked with a photoresist. The portions that do not require metal plating (the liquid crystal display area and bumps) are covered (coated) with photoresist.
【0039】さらに、状態3では、金属メッキの下層
(地メッキ)であるニッケルメッキを外部から電流を流
すことなく、溶液中の金属イオンを還元折出させ被メッ
キ体の表面にメッキ層を析出させる無電解法でニッケル
メッキを施す。フォトレジストがない部分にニッケルメ
ッキが折出する。Further, in the state 3, the metal ions in the solution are reduced and precipitated by the nickel plating, which is the lower layer (ground plating) of the metal plating, without passing an electric current from the outside, and the plating layer is deposited on the surface of the body to be plated. Nickel plating by an electroless method. Nickel plating breaks out where there is no photoresist.
【0040】状態4は、先の状態2で形成した無電解ニ
ッケルメッキ用のマスクパターンを洗剤や剥離剤等を用
いてフォトレジストを剥離除去する。In state 4, the photoresist is peeled off the mask pattern for electroless nickel plating formed in state 2 using a detergent or a stripping agent.
【0041】状態5では、状態4でのフォトレジストの
残骸を熱でさらに除去するとともに、ガラス基板1の歪
等を無くし、ニッケルメッキ層の密着度を強固にすため
に250゜Cの温度で30分間エージングする。In state 5, the photoresist debris in state 4 is further removed by heat, and at the temperature of 250 ° C. in order to eliminate the distortion and the like of the glass substrate 1 and strengthen the adhesion of the nickel plating layer. Age for 30 minutes.
【0042】さらに、状態6では、再度、無電解メッキ
法によって金メッキ9−bを下地のニッケルメッキ層9
−a上に施し、ニッケルメッキ層9−aと金メッキ層9
−bとの全体で金属メッキ9を形成する。Further, in the state 6, the gold plating 9-b is again applied to the underlying nickel plating layer 9 by the electroless plating method.
-A, a nickel plating layer 9-a and a gold plating layer 9
-B to form the metal plating 9 as a whole.
【0043】状態7は、状態6までのガラス基板1の液
晶表示をするセグメント側表示の透明電極膜3と、これ
に対応するコモン側表示の透明電極膜を形成したガラス
基板2との2枚を位置合せして、その2枚のガラス基板
の間にギャップを設けて周囲に樹脂等のシール5で封止
(但し、液晶を注入する注入口には、未シール)する。The state 7 is a two-layer structure of the transparent electrode film 3 of the segment side for liquid crystal display of the glass substrate 1 up to the state 6 and the glass substrate 2 on which the corresponding transparent electrode film of the common side display is formed. Are aligned, a gap is provided between the two glass substrates, and the periphery is sealed with a seal 5 made of resin or the like (however, an injection port for injecting liquid crystal is not sealed).
【0044】また、液晶注入装置等で、ガラス基板をチ
ャンバの中に入れ、真空ポンプにより排気を行い、排気
後に液晶が入った専用の液晶皿にガラス基板を浸けてセ
ルの中に液晶を注入させる。Further, a glass substrate is put into a chamber by a liquid crystal injection device or the like, evacuated by a vacuum pump, and after evacuating, the glass substrate is immersed in a dedicated liquid crystal dish containing liquid crystal, and the liquid crystal is injected into the cell. Let it.
【0045】さらに、ガラス基板のセル中に液晶が注入
されると、注入口を樹脂等で封止する。また、セルの上
部に入射光の偏光方向を一方向に限定する(液晶表示方
法によって、光に対して反射型や透過型、また偏光方向
に対する液晶自体のツィスト方法により異なる。)偏光
フィルタを貼りつける。Further, when the liquid crystal is injected into the cells of the glass substrate, the injection port is sealed with a resin or the like. In addition, a polarization filter for limiting the polarization direction of incident light to one direction (depending on the liquid crystal display method, reflection type or transmission type for light, or twisting method of the liquid crystal itself for polarization direction) is attached to the upper part of the cell. Put on.
【0046】状態8は、出来上がった液晶表示素子のバ
ンプ部に電気導伝性の良い銀粒子(フィラ)からなる導
通粒子11を分散した樹脂を用いてフェイスダウン圧着
する。In state 8, the bumps of the completed liquid crystal display element are face-down pressed using a resin in which conductive particles 11 made of silver particles (fillers) having good electrical conductivity are dispersed.
【0047】この時、ベアチップであるLSIがLSI
圧着部に対し位置ズレを起こさない様に、LSI上部か
らフラットな板状圧着機(例えばボンダ)で導通粒子1
1(フィラ)が一定量潰れる様な均一な一定の圧力を加
える。圧着力や樹脂等によって、冷圧着、熱圧着(室温
150゜C)および加圧力(0.1〜1Kg)や加圧時
間(0.1〜60Sec)等ボンディングを色々変える
ことができる。また、同時にガラス基板とLSIとの間
は樹脂により接着される。At this time, the LSI which is a bare chip is
The conductive particles 1 are flattened from the top of the LSI with a flat plate-shaped crimping machine (for example, a bonder) so as not to displace the crimping portion.
A uniform pressure is applied so that 1 (filler) is crushed by a certain amount. Various bonding such as cold pressing, hot pressing (room temperature 150 ° C.), pressing force (0.1 to 1 kg), pressing time (0.1 to 60 sec), and the like can be changed depending on the pressing force and the resin. At the same time, the glass substrate and the LSI are bonded with a resin.
【0048】図7に図6の要部フローチャート中におけ
る無電解ニッケルメッキ部のフローを示す。状態3aで
は、金属メッキ9を施すために、表面の汚れの除去や脱
脂等のためにアルカリ性の溶液でクリーニングを行う。FIG. 7 shows the flow of the electroless nickel plating section in the flowchart of the main part of FIG. In the state 3a, in order to apply the metal plating 9, cleaning is performed with an alkaline solution for removing stains and degreasing the surface.
【0049】さらに状態3bでは、状態3aで行った処
理によるアルカリ性を塩酸等の酸で中和する。Further, in the state 3b, the alkalinity of the treatment performed in the state 3a is neutralized with an acid such as hydrochloric acid.
【0050】また状態3cは、触媒化処理の第一段階と
して、のキャタリスト処理を塩化第一スズと塩化パラジ
ウム等からなる金属塩化物と塩酸で室温〜40゜C程度
の温度で2〜3分間程浸漬す。In the state 3c, as a first step of the catalyzing treatment, the catalyst treatment is carried out with a metal chloride composed of stannous chloride and palladium chloride and hydrochloric acid at a temperature of about room temperature to about 40 ° C. for 2 to 3 hours. Soak for about a minute.
【0051】さらに状態3dでは、キャタリスト処理に
よる保護コロイドや錯イオンを形成している触媒核を5
〜10%程度の塩酸または硫酸等の酸からなるアクセレ
ータ溶液で30〜50゜C程度の温度で2〜5分程度処
理し活性化させる。Further, in the state 3d, the catalyst nuclei forming the protective colloid and the complex ion by the catalyst treatment are removed by 5%.
Activate by treating with an accelerator solution consisting of about 10 to 10% of an acid such as hydrochloric acid or sulfuric acid at a temperature of about 30 to 50 ° C for about 2 to 5 minutes.
【0052】状態3eでは、無電解ニッケルメッキを生
成するために、ニッケルイオンを含む塩化ニッケル溶液
または硫酸ニッケル溶液のような化学ニッケルメッキ液
に室温〜30゜C程度の温度で3〜5分間程度浸す。こ
のように、無電解ニッケルメッキによって、金属メッキ
9の下地であるニッケルメッキを形成する。In state 3e, a chemical nickel plating solution such as a nickel chloride solution or a nickel sulfate solution containing nickel ions is formed at room temperature to about 30 ° C. for about 3 to 5 minutes in order to generate electroless nickel plating. Soak. Thus, the nickel plating which is the base of the metal plating 9 is formed by the electroless nickel plating.
【0053】図8に図6の要部フローチャート図中にお
ける無電解金部のフロー図を示す。状態6aでは、金メ
ッキを施すために、始めにニッケルメッキ等、表面の汚
れの除去や脱脂等のためにアルカリ性の溶液でクリーニ
ングを行う。FIG. 8 shows a flow chart of the electroless gold part in the flowchart of the main part of FIG. In the state 6a, first, cleaning with an alkaline solution such as nickel plating or the like is performed to remove dirt or degrease the surface in order to apply gold plating.
【0054】状態6bでは、硫酸等の酸により、状態6
aでのアルカリ性を中和するとともに、ニッケル表面を
活性化させる。In the state 6b, the acid in the state 6
a. Neutralize the alkalinity in a and activate the nickel surface.
【0055】状態6cは、金イオンを含む塩化物溶液ま
たは硫酸塩溶液のような金属塩からなる化学金メッキ液
に室温程度で浸し、さらに金属イオンの還元剤としてホ
ルムアルデヒドやロッシェル塩等で還元して無電解金メ
ッキを生成する。The state 6c is obtained by immersing in a chemical gold plating solution composed of a metal salt such as a chloride solution or a sulfate solution containing gold ions at about room temperature, and further reducing with formaldehyde or Rochelle salt as a metal ion reducing agent. Produces electroless gold plating.
【0056】このように、無電解金メッキによって、ニ
ッケルメッキの上層を金メッキで形成する。図7で形成
した下地のニッケルメッキ層の上部に図8で形成した金
メッキ層によって、全体として金属メッキ9を形成す
る。As described above, the upper layer of nickel plating is formed by gold plating by electroless gold plating. The metal plating 9 is formed as a whole by the gold plating layer formed in FIG. 8 on the nickel plating layer of the base formed in FIG.
【0057】このように、本発明の液晶表示素子は、バ
ンプに対応する領域がITO膜等の透明導電膜で形成さ
れているのために、ベアチップのバンプ部に対して、位
置ズレや導通粒子(フィラ)が均一に潰れているか、さ
らに導通粒子(フィラ)の潰れが所定の量に達している
か等をセルのガラス側(裏)から観察および検査ができ
る。As described above, in the liquid crystal display element of the present invention, since the region corresponding to the bump is formed of the transparent conductive film such as the ITO film, the position shift and the conductive particles are not performed with respect to the bump portion of the bare chip. It is possible to observe and inspect whether the (filler) is uniformly crushed and whether the crushing of the conductive particles (filler) has reached a predetermined amount from the glass side (back side) of the cell.
【0058】また、LSIへの電源配線と接地配線およ
び昇圧用配線に金属メッキを施したので、発熱せずに大
きな電流を流せ、リード線等の接続に機械的強度を増
し、ハンダの濡れ性が改善できる。さらに、本発明は、
ガラス基板だけでなく、透明であれば樹脂フイルムを用
いても良い。Further, since metal plating is applied to the power supply wiring, the ground wiring, and the boosting wiring to the LSI, a large current can be passed without generating heat, the mechanical strength for connecting lead wires and the like can be increased, and solder wettability can be improved. Can be improved. Further, the present invention provides
In addition to the glass substrate, a resin film may be used if it is transparent.
【0059】[0059]
【発明の効果】以上のように、請求項1に係る液晶表示
素子は、セル端部に設けられた外部電極、液晶密封空間
内の表示電極、表示電極に連なる配線部はいずれも透明
導電膜で構成され、かつ、配線部および外部電極は、そ
れぞれのLSIとの接合部を除いて、金属メッキまたは
蒸着による金属層で覆われているので、セルのガラス側
(裏)からLSIのバンプ部とガラス基板上のLSI圧
着部との位置ズレのチェックや、導通粒子の潰れの均一
性や、導通粒子の潰れが所定量であるか無いかの観察お
よび検査をすることができるので、マウント後の不良を
少なく、リペア量とリペア工程とを少なくすることが出
来、コストおよび信頼性の向上が図れる。As described above, in the liquid crystal display device according to the first aspect, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all transparent conductive films. In addition, the wiring portion and the external electrode are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with each LSI. Therefore, the bump portion of the LSI is formed from the glass side (back side) of the cell. After the mounting, it is possible to check the positional deviation between the substrate and the LSI crimping part on the glass substrate, and to observe and inspect whether the crushing of the conductive particles is uniform or a predetermined amount. And the repair amount and the repair process can be reduced, and the cost and reliability can be improved.
【0060】また、請求項2に係る液晶表示素子は、セ
ル端部に設けられた外部電極、液晶密封空間内の表示電
極、表示電極に連なる配線部はいずれも透明導電膜で構
成され、かつ、外部電極のうちの電源用、接地配線用お
よび昇圧配線用の電極のみに、LSIとの接合部を除い
て、金属メッキまたは蒸着による金属層で覆われている
ので、セルのガラス側(裏)からLSIのバンプ部とガ
ラス基板上のLSI圧着部との位置ズレや均一な圧着で
導通粒子の潰れが所定量であるか無いかの観察および検
査ができるとともに、低抵抗化と電流容量が取れるの
で、発熱せずに大きな電流を流せ、リード線等の接続に
機械的強度を増すことができ、ハンダの濡れ性の改善を
得ることができるので、作業操作性や信頼性の向上が図
れる。Further, in the liquid crystal display element according to the present invention, the external electrode provided at the cell end, the display electrode in the liquid crystal sealed space, and the wiring portion connected to the display electrode are all formed of a transparent conductive film, and Since only the electrodes for the power supply, the ground wiring, and the boost wiring among the external electrodes are covered with the metal layer formed by metal plating or vapor deposition except for the joint portion with the LSI, the glass side of the cell (the back side) ) Can observe and inspect whether or not the conductive particles are crushed by a predetermined amount by misalignment between the bump portion of the LSI and the LSI crimping portion on the glass substrate or by uniform crimping. As a result, a large current can flow without generating heat, mechanical strength can be increased for connection of lead wires and the like, and improvement in solder wettability can be obtained, thereby improving work operability and reliability. .
【0061】よって、液晶表示素子へのLSI等のベア
チップの実装時および/または実装後にベアチップとガ
ラス基板との接続部の観察が可能であり、且つLSI等
のベアチップへの電源や接地および昇圧用などの配線に
対して低抵抗化を図ることができる。Therefore, it is possible to observe the connection between the bare chip and the glass substrate during and / or after mounting the bare chip such as an LSI on the liquid crystal display element, and to supply power, ground and boost to the bare chip such as the LSI. It is possible to reduce the resistance of wiring such as.
【図面の簡単な説明】[Brief description of the drawings]
【図1】液晶表示素子の基本的な構成図FIG. 1 is a basic configuration diagram of a liquid crystal display element.
【図2】発明に係る液晶表示素子のLSI装着部の断面
図FIG. 2 is a sectional view of an LSI mounting portion of the liquid crystal display element according to the invention.
【図3】本発明の液晶表示素子の主要処理工程図FIG. 3 is a view showing main processing steps of the liquid crystal display element of the present invention.
【図4】請求項1に係る金属メッキ9の領域図FIG. 4 is a region diagram of the metal plating 9 according to claim 1.
【図5】請求項2に係る金属メッキ9の領域図FIG. 5 is a region diagram of the metal plating 9 according to claim 2;
【図6】図3に係るCOGの一実施の形態おける要部フ
ローチャート図FIG. 6 is a flowchart of a main part in one embodiment of the COG according to FIG. 3;
【図7】図3に係るCOGの一実施の形態おけるニッケ
ルメッキの要部フロー図FIG. 7 is a flowchart of a main part of nickel plating in one embodiment of the COG according to FIG. 3;
【図8】図3に係るCOGの一実施の形態おける金メッ
キの要部フロー図FIG. 8 is a flowchart of a main part of gold plating in one embodiment of the COG according to FIG. 3;
【図9】従来のCOG型液晶表示素子のセル上に設置し
たLSI付近の断面図FIG. 9 is a cross-sectional view around an LSI installed on a cell of a conventional COG type liquid crystal display device.
【符号の説明】 1…ガラス基板、2…透明電極膜(コモン側)、3…透
明電極膜(表示側)、4…液晶、5…シール、6…外部
電極、7…偏向フィルタ、8…駆動用LSI、9…金属
メッキ、9a…ニッケルメッキ(無電解ニッケルメッ
キ)、9b…金メッキ(無電解金メッキ)、10…バン
プ、11…導通粒子(銀粒子)、12…フォトレジス
ト、13…電源線、14…接地線、20…セル。[Description of References] 1 ... Glass substrate, 2 ... Transparent electrode film (common side), 3 ... Transparent electrode film (display side), 4 ... Liquid crystal, 5 ... Seal, 6 ... External electrode, 7 ... Deflection filter, 8 ... Driving LSI, 9: metal plating, 9a: nickel plating (electroless nickel plating), 9b: gold plating (electroless gold plating), 10: bump, 11: conductive particles (silver particles), 12: photoresist, 13: power supply Line, 14 ... ground line, 20 ... cell.
Claims (2)
せるCOG型の液晶表示素子において、前記セル端部に
設けられた外部電極、液晶密封空間内の表示電極、前記
表示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、前記配線部および外部電極は、それぞれの前
記LSIとの接合部を除いて、金属メッキまたは蒸着に
よる金属層で覆われていることを特徴とする液晶表示素
子。1. A COG-type liquid crystal display element in which an LSI is installed and driven around a cell, an external electrode provided at an end of the cell, a display electrode in a liquid crystal sealed space, and a wiring connected to the display electrode. Each of the portions is formed of a transparent conductive film, and the wiring portion and the external electrode are covered with a metal layer formed by metal plating or vapor deposition except for a joint portion with each of the LSIs. Liquid crystal display element.
せるCOG型の液晶表示素子において、前記セル端部に
設けられた外部電極、液晶密封空間内の表示電極、前記
表示電極に連なる配線部はいずれも透明導電膜で構成さ
れ、かつ、外部電極のうちの電源用、接地配線用および
昇圧配線用の電極のみに、前記LSIとの接合部を除い
て、金属メッキまたは蒸着による金属層で覆われている
ことを特徴とする液晶表示素子。2. A COG-type liquid crystal display device in which an LSI is installed and driven around a cell, an external electrode provided at an end of the cell, a display electrode in a liquid crystal sealed space, and a wiring connected to the display electrode. Each part is formed of a transparent conductive film, and only the electrodes for the power supply, the ground wiring, and the boost wiring among the external electrodes, except for the junction with the LSI, are formed by metal plating or vapor deposition. A liquid crystal display device characterized by being covered with a liquid crystal display.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20470297A JPH1152405A (en) | 1997-07-30 | 1997-07-30 | Liquid crystal display element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20470297A JPH1152405A (en) | 1997-07-30 | 1997-07-30 | Liquid crystal display element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1152405A true JPH1152405A (en) | 1999-02-26 |
Family
ID=16494906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20470297A Pending JPH1152405A (en) | 1997-07-30 | 1997-07-30 | Liquid crystal display element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH1152405A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003255849A (en) * | 2002-02-28 | 2003-09-10 | Rohm Co Ltd | Flat panel display |
JP2003255381A (en) * | 2001-12-28 | 2003-09-10 | Advanced Display Inc | Image display device and manufacturing method therefor |
US6809390B2 (en) | 2000-11-30 | 2004-10-26 | Seiko Epson Corporation | Semiconductor chip mounting substrate, electrooptical device, liquid-crystal device, electroluminescent device, and electronic equipment |
JP2005242017A (en) * | 2004-02-26 | 2005-09-08 | Optrex Corp | Liquid crystal panel and liquid crystal display device |
US7206056B2 (en) | 2003-04-18 | 2007-04-17 | Advanced Display Inc. | Display device having a terminal that has a transparent film on top of a high resistance conductive film |
JP2008242249A (en) * | 2007-03-28 | 2008-10-09 | Kyodo Printing Co Ltd | Flexible display |
-
1997
- 1997-07-30 JP JP20470297A patent/JPH1152405A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6809390B2 (en) | 2000-11-30 | 2004-10-26 | Seiko Epson Corporation | Semiconductor chip mounting substrate, electrooptical device, liquid-crystal device, electroluminescent device, and electronic equipment |
JP2003255381A (en) * | 2001-12-28 | 2003-09-10 | Advanced Display Inc | Image display device and manufacturing method therefor |
US7286202B2 (en) | 2001-12-28 | 2007-10-23 | Kabushiki Kaisha Advanced Display | Image display and manufacturing method thereof having particular internal wiring structure |
JP2003255849A (en) * | 2002-02-28 | 2003-09-10 | Rohm Co Ltd | Flat panel display |
US7206056B2 (en) | 2003-04-18 | 2007-04-17 | Advanced Display Inc. | Display device having a terminal that has a transparent film on top of a high resistance conductive film |
JP2005242017A (en) * | 2004-02-26 | 2005-09-08 | Optrex Corp | Liquid crystal panel and liquid crystal display device |
JP2008242249A (en) * | 2007-03-28 | 2008-10-09 | Kyodo Printing Co Ltd | Flexible display |
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