JPH11204677A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, having high reliability in bonding portion where the semiconductor device is bonded to a base substrate through flip-chip bonding and a manufacture thereof. SOLUTION: Electrodes 11 are arranged at four corners on the main surface of a semiconductor chip 10 and a low elastic layer 20 having opening above the electrodes 11 is placed on the main surface of the semiconductor chip 10. A metal wiring 31 comprising a pad 30 on the semiconductor chip 10 and a land 32 on the low elastic layer 20 and bonded to the electrodes 11 is mounted on the semiconductor chip 10. Each metal wiring 31 functions as an external electrode terminal, and a solder resist 50 is arranged between the metal wirings 31. Since the metal wiring 31 bonding the upper surface of the low elastic layer 20 to the main surface of the semiconductor chip 10 which is different in level from the low elastic layer 20 is used as the external electrode terminal, a wide and thick fillet, such as solder or the like, is formed between semiconductor chip 10 and the connecting terminal of the base substrate to improve the reliability of a bonded portion.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device incorporating a semiconductor element such as a transistor and a method of manufacturing the same, and more particularly to an improvement in the structure of a wiring portion.

[0002]

2. Description of the Related Art In recent years, when mounting a semiconductor chip on a printed circuit board or the like, instead of performing bonding wires, the semiconductor chip is mounted on a mother board such as a printed circuit board with the main surface of the semiconductor chip facing downward. There is known a technique called flip-chip mounting in which external electrode terminals and connection terminals of a motherboard such as a printed board are directly connected via bumps or the like.

FIG. 10 is a plan view showing a general structure of a semiconductor device suitable for performing such flip-chip mounting, and FIG. 11 is a sectional view taken along line XI-XI in FIG.

As shown in FIGS. 10 and 11, an electrode 202 is provided on a main surface of a semiconductor chip 201.
On a main surface of the semiconductor chip 201, a metal wiring 203 connected to the electrode 202 is formed. Further, a passivation film 204 that covers a portion of the main surface of the semiconductor chip 201 that is not covered with the metal wiring 203 and the metal wiring 203 is formed. In addition, a portion of the metal wiring 203 exposed in the opening of the passivation film 204 functions as an external electrode terminal.

FIG. 12 is a sectional view showing a state where the semiconductor device is flip-chip mounted on a printed circuit board 250. As shown in the figure, the connection terminals 251 on the printed circuit board 250 and the metal wirings 20 on the semiconductor chip 201
The semiconductor chip 201 is mounted on the printed circuit board 250 with the solder bumps 252 interposed therebetween in a state where the portion serving as the external electrode terminal of No. 3 faces.

As described above, by directly connecting the portion of the metal wiring 203 serving as the external electrode terminal to the connection terminal 251 of the printed circuit board 250 via the solder bump 252, the wire bonding step is not required and the process is simplified. And to improve the reliability of the connection state.

[0007]

However, in the above-mentioned conventional semiconductor device, there is a problem that the reliability of the connection portion by the solder bump or the like is not always sufficient after the connection by the solder bump or the like. The cause is
The connection area between the portion serving as the external electrode terminal on the semiconductor chip side and the connection terminal on the motherboard side is inherently small, and the contact area is further reduced when the positions of the two are shifted during mounting.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide means for increasing the connection strength between a semiconductor chip and a mother board at the time of flip-chip mounting by using means for increasing the connection strength. And to provide a highly reliable semiconductor device and a method of manufacturing the same.

[0009]

Means for Solving the Problems To achieve the above-mentioned object, a means taken by the present invention is to provide two regions having a height difference on a semiconductor chip and further provide a metal wiring extending over these two regions. By using this metal wiring as an external electrode terminal, the state of formation of a bonding metal such as solder can be improved, thereby improving reliability.

According to a first aspect of the present invention, there is provided a semiconductor device having a plurality of electrodes on a main surface and a height difference provided on the main surface side of the semiconductor chip. And a plurality of metal wirings formed so as to straddle the two regions of the semiconductor chip and connected to the respective electrodes on the semiconductor chip. It is configured to be able to function as.

With this, when the semiconductor device is mounted on the motherboard, if a conductive member such as solder is interposed between the metal wiring of the semiconductor device and the connection terminal of the motherboard, the entire metal wiring becomes external. Since it has a structure that can function as an electrode terminal, the range in which a conductive member such as solder is formed is widened, and a wide connection portion is secured even if the mounting position during flip chip mounting is slightly shifted. Further, since a fillet such as solder is formed over two regions having a height difference of the metal wiring, at least a part of the conductive member always becomes thick, and when the conductive member is formed only thin as a whole, In comparison, sufficient bonding strength can be reliably obtained. Also,
Since the bonding strength is high, there is an advantage that the reliability is improved even if the semiconductor device is subjected to thermal stress due to a mismatch in thermal expansion coefficient between the semiconductor device and the mother substrate due to a heat cycle or the like.

Further, since the bonding area between the electrode and the conductive member is large, the function of self-alignment between the metal wiring functioning as an external electrode terminal and the connection terminal of the mother board, particularly during mounting, due to the surface tension of the solder, is a conventional one. Higher than.

According to a second aspect of the present invention, in the semiconductor device of the first aspect, it is preferable that each of the metal wirings is formed in a wide area including a periphery of each of the electrodes of the semiconductor chip.

Thus, the area occupied by the metal wiring can be ensured as large as possible.

According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, an insulating film formed on a main surface of the semiconductor chip and having an opening above each electrode of the semiconductor chip is further provided. It is preferable that the two regions having the height difference are provided on the upper surface of the insulating film and the main surface of the semiconductor chip.

Thus, the reliability of the connection portion is further improved because the insulating film serves as a buffer for an impact force and a thermal stress when the semiconductor chip is mounted.

According to a fourth aspect of the present invention, in the semiconductor device of the third aspect, the insulating film preferably has a wedge-shaped inclined portion at a boundary with the semiconductor chip.

As a result, since there is no acute angle portion in the metal wiring, a highly reliable metal wiring with less stress concentration can be obtained.

According to a fifth aspect of the present invention, in the semiconductor device according to the third or fourth aspect, a passivation film is formed on the semiconductor chip, and the two regions having the height difference are formed by the insulating region. It can exist on the upper surface of the film and the upper surface of the passivation film.

As a result, members such as transistors in the semiconductor chip can be surely protected from entry of moisture and the like, and a more reliable semiconductor device can be obtained.

According to a sixth aspect of the present invention, in the semiconductor device according to any one of the third to fifth aspects, the insulating film may have a stepped shape.

Accordingly, when the semiconductor device is flip-chip mounted as described above, fillets of solder or the like are formed in multiple stages, so that the reliability of the connection portion is further improved.

According to a seventh aspect of the present invention, in the semiconductor device according to any one of the first to sixth aspects, the periphery of the semiconductor chip on the main surface side is chamfered. The above-mentioned metal wiring can be made to exist also on the part where it was set.

Thus, when the semiconductor device is flip-chip mounted, a fillet of solder or the like is formed widely over the chamfered portion. In addition, the presence of the thick fillet on the outer peripheral portion of the semiconductor chip greatly enhances the reliability of the connection.

According to an eighth aspect of the present invention, in the semiconductor device according to any one of the first to seventh aspects, when the semiconductor chip has a rectangular planar shape, the electrode is connected to the semiconductor chip. The metal wirings may be four metal wirings connected to the respective electrodes, being arranged at four corners of the semiconductor chip.

Thus, a highly reliable semiconductor device suitable for flip-chip mounting, in which four wide metal wirings can function as external electrode terminals, respectively, can be obtained.

According to a ninth aspect of the present invention, in the semiconductor device according to any one of the first to seventh aspects, when the semiconductor chip has a rectangular planar shape, the electrode is connected to the semiconductor chip. Alternatively, the same number of metal wirings as the electrodes may be formed at four corners and sides of the semiconductor chip.

As a result, a semiconductor device having a structure suitable for increasing the number of pins and high-density mounting and having a highly reliable connection portion can be obtained.

According to a tenth aspect of the present invention, in the semiconductor device according to any one of the first to ninth aspects, any one of the metal wirings has a shape of another metal wiring. Preferably, it is different.

Thus, since the pin number can be identified by utilizing the difference in the shape of the metal wiring, the correspondence between the connection terminal of the mother board and the external electrode terminal on the semiconductor chip side can be quickly recognized when the semiconductor device is mounted. Can be.

As described in claim 11, in the semiconductor device according to any one of claims 1 to 10,
It is preferable that a resist member having a property of repelling a conductive material for electrically connecting each metal wiring and a connection terminal of an external device is interposed between the metal wirings.

Thus, a short circuit between metal wirings caused by the presence of a conductive material film such as solder between the wiring metals can be reliably prevented.

According to a twelfth aspect of the present invention, in the semiconductor device according to any one of the third to sixth aspects, the insulating film is preferably made of a resin material having a low elastic modulus.

Thus, when an impact force or thermal stress acts on the metal wiring, the insulating film functions as a buffer, so that the reliability of the metal wiring is further improved.

According to a second aspect of the present invention, there is provided a semiconductor device comprising:
A semiconductor chip, two regions having a height difference provided in the semiconductor chip, and a metal wiring formed so as to straddle the two regions of the semiconductor chip, The entire metal wiring is configured to function as an external electrode terminal.

Thus, similar to the first semiconductor device,
As a result, a highly reliable semiconductor device can be obtained at the connection portion when flip-chip mounting is performed.

According to a fourteenth aspect of the present invention, in a method of manufacturing a semiconductor device, an insulating material film is formed on a main surface of a semiconductor chip having a plurality of electrodes provided on the main surface. Patterning the insulating material film to form an insulating film having an opening above each of the electrodes; and forming a portion of the main surface of the semiconductor chip which is not covered with the insulating film and a portion of the insulating film. Depositing a metal film thereon, and patterning the metal film to form a metal wiring connected to the electrode over the insulating film from the main surface of the semiconductor chip.

According to this method, the semiconductor device of claim 3 is easily formed.

According to a fifteenth aspect, in the method of manufacturing a semiconductor device according to the fourteenth aspect, in the step of forming the insulating material film, it is preferable to form an insulating material film made of a resin material. .

According to this method, when the semiconductor device is mounted, the impact force and the thermal stress acting between the metal wiring of the semiconductor chip and the connection terminal of the mother board can be effectively reduced, and the metal wiring can be effectively removed. Damage can be reliably prevented.

According to a sixteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifteenth aspect, in the step of forming the insulating material film, the insulating material having a stepped shape is formed by applying a resin material a plurality of times. A material film can be formed.

According to this method, an insulating film having a stepped shape is finally obtained, so that a fillet of solder or the like is formed in multiple stages at the time of mounting the semiconductor device. Obtainable.

According to a seventeenth aspect, in the method of manufacturing a semiconductor device according to any one of the fourteenth to sixteenth aspects, the main surface of the semiconductor chip is provided before the step of forming the metal wiring. The method further includes a step of chamfering a peripheral portion of the metal film, and in the step of forming the metal film, a metal film over the chamfered portion can be formed.

According to this method, a highly reliable semiconductor device in which a fillet of solder or the like is formed over the chamfered portion when the semiconductor device is mounted can be obtained.

In the method for manufacturing a semiconductor device according to the seventeenth aspect, the step of chamfering the peripheral portion on the main surface side of the semiconductor chip includes the step of chamfering the wafer before the semiconductor chip is cut out. It may be performed in a state, or as described in claim 19, after the semiconductor chip is cut out from a wafer.

[0046]

Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment First, the structure of a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a perspective view of the semiconductor device according to the first embodiment, and FIG. 2 is a cross-sectional view taken along line II-II of FIG.

In FIGS. 1 and 2, reference numeral 10 denotes a semiconductor chip having a semiconductor integrated circuit including semiconductor elements such as transistors inside. This semiconductor chip 1
The electrodes 11 of the semiconductor chip 10 are provided at the four corners of the 0 main surface as shown by broken lines in the figure. However, the main surface of the semiconductor chip 10 is almost entirely covered with the passivation film 12 except for the portion where the electrode 11 is formed. In addition, on the main surface of the semiconductor chip 10, a low elastic layer 20 made of an insulating material having a low elastic modulus is provided in a region other than the peripheral portion, and the low elastic layer 20 is formed around the semiconductor chip 10. The portion has a wedge-shaped inclined portion. Then, four metal wirings formed so as to divide the region on the semiconductor chip 10 excluding the central cross-shaped region into four parts over the low elastic modulus layer 20 and the respective electrodes 11 on the semiconductor chip 10. 31 are provided. The metal wiring 31 includes a land 32 formed on the low elastic modulus layer 20 and functioning as an external electrode terminal, and a pad 30 on the semiconductor chip 10 and connected to the electrode 11. Then, the four metal wirings 31 are formed on the low elastic modulus layer 20 and the semiconductor chip 10.
Between them, a solder resist 50 having a property of repelling solder is interposed.

FIG. 3 is a sectional view showing a state where the semiconductor device is mounted on a printed circuit board. As shown in the figure, a metal wiring 31 serving as an external electrode terminal of the semiconductor chip 10;
When solder is interposed between the connection terminals on the printed circuit board, the solder flows not only on the lands 32 of the metal wiring 31 but also on the pads 30, and a solder fillet over a wide area between the connection terminals on the printed circuit board side is formed. It is formed. In particular, the solder is surely formed thick in the portion of the pad 30.

According to the semiconductor device of this embodiment, since the entire metal wiring 31 is configured to function as an external electrode terminal, the connection with the connection terminal of the mother board such as a printed board can be easily and firmly made. It is. For example, when performing the connection by soldering, the structure is such that the metal wiring 31 on the semiconductor chip 10 side and the connection terminal on the printed board side are strongly connected in a wide range by the solder flowing not only on the land 32 but also on the pad 30. Become. In particular, since a thick solder fillet is surely formed in the portion of the pad 30, it is possible to avoid a situation where only a thin solder fillet is present as a whole, and the reliability of a connection portion between the two is enhanced.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS. FIGS. 4A to 4E are cross-sectional views showing manufacturing steps for realizing the structure of the semiconductor device shown in FIGS.

First, as shown in FIG. 4A, the semiconductor chips 10 formed on the main surface
The insulating material film 21 is formed by applying a photosensitive insulating material on the electrode 11 and the passivation film 12 and drying the applied insulating material.

Next, as shown in FIG. 4B, the dried insulating material film 21 is sequentially exposed and developed,
A low elastic modulus layer 20 having an opening above the electrode 11 of the semiconductor chip 10 is formed. In this case, for example, the cross-sectional shape of the low elastic modulus layer 20 at the opening is formed not in a direction perpendicular to the main surface of the semiconductor chip 10 but in a tapered shape by using scattered light instead of parallel light in the exposure. As the insulating material, for example, a polymer having a low elastic modulus and an insulating property such as polyimide, epoxy or the like having a low elastic modulus may be used.

Next, as shown in FIG. 4C, on the main surface of the semiconductor chip 10, for example, Ti / Ti is deposited by a vacuum evaporation method, a sputtering method, a CVD method or an electroless plating method.
After forming the metal thin film layer made of Cu, the metal thin film layer is patterned. Thus, a wiring pattern including four metal wirings 31 is formed on the main surface side of the semiconductor chip 10.

The patterning is performed as follows.
A photoresist is applied on the metal thin film layer, the surface of the low elasticity layer 20 is focused and exposed, and the photoresist other than the predetermined pattern portion is cured by the exposure. Remove. As described above, by exposing the surface of the low elastic modulus layer 20 to focus, it is also possible to form a fine metal wiring different from the shape of the present embodiment on the low elastic modulus layer 20. Further, the portion of the pad 30 which is not on the low elastic modulus layer 20 can be exposed at the same time, and the number of steps can be reduced.

Thereafter, a metal layer having a large thickness, for example, made of Cu is formed on the pattern portion by using electrolytic plating, and then the photoresist is melted and removed. Thereafter, a predetermined wiring pattern is formed by immersing the metal thin film layer in an etchant and leaving the metal layer having a large thickness.

A metal film is deposited on the entire surface, a resist is applied thereon, and a resist for an etching mask is formed on a predetermined pattern portion using photolithography technology. May be etched to form a wiring pattern.

Next, as shown in FIG. 4D, after a photosensitive solder resist is applied over the entire semiconductor chip, the metal wiring 3 is formed using photolithography.
Solder resist 5 so that only part 1 is exposed.
0 is formed. The metal wiring 31 including the lands 32 and the pads 30 is protected from the molten solder by the solder resist 50.

According to the method of manufacturing a semiconductor device of the present embodiment, a wiring consisting of four metal wirings 31 occupying a large area is formed in a region on the semiconductor chip 10 except for a cross-shaped portion covered with a solder resist. A pattern can be easily formed.

In the description of this embodiment, the insulating material film 21 having photosensitivity is formed by coating in order to form the low elastic modulus layer 20, but the invention is not limited to this. Alternatively, an insulating material having photosensitivity may be used. In this case, it is sufficient that the electrode 11 of the semiconductor chip 10 can be exposed by exposing and developing after bonding a film-shaped insulating material onto the semiconductor chip 10.

When forming the low elastic modulus layer 20, the insulating material may be applied twice to provide the stepped low elastic modulus layer 20. The thickness of the low elastic modulus layer 20 is 10 to 2
It is preferably in the range of 00 μm. In the case of such a thickness range, a solder fillet is formed as shown in FIG. 3, and a strong connection is made.

Further, an insulating material having no photosensitivity can be used. In this case, the electrodes 11 of the semiconductor chip 10 can be exposed by mechanical processing such as laser or plasma or chemical processing such as etching. In this case, the insulating material may be an inorganic insulating material such as a silicon oxide film instead of the resin material.

Although Ti / Cu is used as the metal thin film layer, Cr, W, Cu, Ni or the like may be used instead.

(Second Embodiment) Next, a semiconductor device according to a second embodiment will be described with reference to FIG. FIG. 5 is a cross-sectional view of the semiconductor device according to the present embodiment.

In FIG. 5, the same members as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. 2, and the description thereof is omitted.

As shown in FIG. 5, in the present embodiment, the chamfered portion 10
a is provided, and the metal wiring 31 is
The feature is that it is formed up to a. That is, when the semiconductor chip is mounted on the printed circuit board as shown in FIG. 3, the solder fillet is formed over the metal wiring 31 on the chamfered portion 10a. As described above, since the thick solder fillet is reliably present on the outer peripheral portion of the semiconductor chip, a stronger connection than in the first embodiment can be achieved, for example, the joining force against bending stress is increased.

The chamfered portion 1 of the semiconductor chip 10
As a method of forming Oa, it is preferable to form a concave portion along a scribe line by etching and scribing in a wafer state. However, the wafer may be divided into semiconductor chips by dicing, and then the chamfered portions 10a and the metal wires 31 may be formed for each semiconductor chip.

(Third Embodiment) Next, a third embodiment will be described with reference to FIGS. FIG.
7 and FIG. 7 are plan views of a semiconductor device according to a structural example of the present embodiment. In FIG. 6 and FIG.
The same reference numerals as in FIG. 1 denote the same members as in the first embodiment, and a description thereof will be omitted. In the present embodiment, the cross-sectional structure of the semiconductor device is substantially the same as that of the semiconductor device according to the first embodiment, so that the illustration is omitted.

FIG. 6 is a plan view showing a first structural example of the present embodiment. As shown in the figure, the wiring pattern of the present embodiment is common to the wiring pattern of the semiconductor device of the first embodiment in that it has metal wirings 31 arranged at four corners of the semiconductor chip 10. However, in the present embodiment, of the four metal wires 31, only the metal wire 31A serving as the first pin shown in the upper left of the figure is larger than the other metal wires 31. Conversely, only the first metal wiring 31A may be made smaller than the other metal wirings 31.

FIG. 7 is a plan view showing a second structural example of the present embodiment. As shown in the figure, the wiring pattern of the present embodiment is common to the wiring pattern of the semiconductor device of the first embodiment in that it has metal wirings 31 arranged at four corners of the semiconductor chip 10. However, in the present embodiment, a cutout portion 34 is provided at a corner on the center side only in the metal wire 31A serving as the first pin shown in the upper left of the figure among the four metal wires 31. Note that, in place of the cutout portion 34, a shape feature such as rounding can be provided.

According to the semiconductor device of this embodiment, when there are a plurality of metal wirings 31 arranged symmetrically on the semiconductor chip 10 as described above, a large number of metal wirings 31 are provided.
By changing the shape of the other metal wiring 31 in a broad sense, for example, by changing the size of only one metal wiring 31A serving as the first pin or adding a feature in shape, each metal wiring of the semiconductor chip 10 is formed. The wiring pattern can have a function of easily identifying the pin number corresponding to 31.

(Fourth Embodiment) Next, a fourth embodiment will be described with reference to FIG. FIG. 8 is a plan view of the semiconductor device according to the present embodiment. In FIG. 8, the same members as those in the first embodiment are denoted by the same reference numerals as those in FIG. 1, and description thereof is omitted. Note that, in the present embodiment, the cross-sectional structure of the semiconductor device is the first structure.
Since it is almost the same as the semiconductor device in the embodiment,
Illustration is omitted.

As shown in the figure, the wiring pattern in the present embodiment is composed of a total of nine metal wirings 31 connected to a total of nine electrodes 11 arranged at the four corners and four sides of the semiconductor chip 10. This is a point having a wiring pattern. Note that also in the present embodiment, the nine metal wires 31
Among them, only the metal wiring 31A shown at the upper left in the figure has a rounded portion 35 for identifying the pin number at the corner on the center side.

According to the present embodiment, by arranging more metal wirings, it is possible to increase the density of the semiconductor elements in the semiconductor device.

(Other Embodiments) In each of the above embodiments, by forming a low elastic modulus layer on a semiconductor chip, two regions having a height difference between the upper surface of the low elastic modulus layer and the main surface of the semiconductor chip. However, two regions having a height difference may be provided on the main surface of the semiconductor chip by directly etching the semiconductor substrate.

In each of the above embodiments, since the electrode is arranged near the outer periphery of the semiconductor chip, the opening of the low-modulus layer is provided on the outer periphery of the semiconductor device. It is not limited to the form. For example, in the case where the electrode is arranged at the center of the semiconductor chip, the opening of the low-modulus layer is formed at the center. Also in this case, the fillet of solder or the like is widely formed at the time of flip-chip mounting and is surely formed thick at the pad portion, so that the above-described effects can be exhibited.
Even in this case, the outer peripheral side of the semiconductor chip in the low elastic modulus layer is opened, and the metal wiring is formed over the outer peripheral side of the main surface of the semiconductor chip. Reliability can be further improved.

In each of the above embodiments, only the case where the end face of the opening of the low elastic modulus layer, that is, the boundary portion with the semiconductor chip is inclined, the present invention is limited to such an embodiment. is not. FIGS. 9A to 9D show specific examples of the shape of the boundary portion of the low elastic modulus layer 20 on the semiconductor substrate 10, in which a curved inclined portion, a linear inclined portion, and a corner portion are acute angles in this order. FIG. 9 is a cross-sectional view showing the shapes of a low elastic modulus layer 20 and a metal wiring 31 when a typical step portion and a rounded corner portion are provided. However, in the figure,
Reference numeral 12 denotes a passivation film.

[0078]

According to the first to thirteenth aspects, in the semiconductor device, two regions having a height difference are provided on the main surface side of the semiconductor chip, and a metal wiring is provided over the two regions.
Since the entire metal wiring can function as an external electrode terminal, when the semiconductor device is mounted on the motherboard, a fillet such as solder is formed to be wide and thick across two regions having a height difference of the metal wiring. Thereby, the reliability of the connection portion can be improved.

The structure of these semiconductor devices is described in claim 14
To 19 can be easily realized.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor device according to a first embodiment.

FIG. 2 is a sectional view taken along line II-II shown in FIG.

FIG. 3 is a cross-sectional view illustrating a state where the semiconductor device according to the first embodiment is flip-chip mounted on a motherboard.

FIG. 4 is a cross-sectional view illustrating a manufacturing step of the semiconductor device according to the first embodiment;

FIG. 5 is a cross-sectional view of a semiconductor device having a chamfer according to a second embodiment.

FIG. 6 is a plan view of a four-terminal semiconductor device according to a third embodiment in which only the metal wiring corresponding to the first pin is enlarged.

FIG. 7 is a plan view of a four-terminal semiconductor device according to a fourth embodiment in which a notch is provided only in a metal wiring corresponding to a first pin.

FIG. 8 is a plan view of a nine-terminal semiconductor device according to a fifth embodiment in which electrodes and metal wires are provided at corners and sides.

FIG. 9 is a cross-sectional view showing a specific example of the shape of the boundary of the low elastic modulus film.

FIG. 10 is a plan view showing a general structure of a semiconductor device for performing conventional flip-chip mounting.

11 is a cross-sectional view of the semiconductor device taken along line XI-XI shown in FIG.

FIG. 12 is a cross-sectional view showing a state where a conventional semiconductor device is flip-chip mounted on a motherboard.

[Explanation of symbols]

 Reference Signs List 10 semiconductor chip 10a chamfered portion 11 electrode 20 low elastic modulus layer 30 pad 31 wiring 32 land 34 cutout portion 35 rounded portion 50 solder resist

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Takahiro Kumakawa 1-1, Komachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation

Claims (19)

[Claims] 1. A semiconductor chip having a plurality of electrodes on a main surface thereof, two regions having a height difference provided on a main surface side of the semiconductor chip, and straddling the two regions of the semiconductor chip. And a plurality of metal wirings respectively formed on the semiconductor chip and connected to the respective electrodes on the semiconductor chip, wherein the whole of each metal wiring is configured to function as an external electrode terminal. 2. The semiconductor device according to claim 1, wherein each of the metal wirings is formed in a wide area including a periphery of each of the electrodes of the semiconductor chip. 3. The semiconductor device according to claim 1, further comprising: an insulating film formed on a main surface of the semiconductor chip and opening above each electrode of the semiconductor chip, wherein the insulating film has a height difference. The semiconductor device is characterized in that the two regions are present on an upper surface of the insulating film and a main surface of the semiconductor chip. 4. The semiconductor device according to claim 3, wherein the insulating film has a wedge-shaped inclined portion at a boundary with the semiconductor chip. 5. The semiconductor device according to claim 3, wherein a passivation film for protecting elements in the semiconductor chip is formed on the semiconductor chip, and the two regions having a difference in height are formed. A semiconductor device is present on an upper surface of the insulating film and an upper surface of the passivation film. 6. The semiconductor device according to claim 3, wherein the insulating film has a stepped shape. 7. The semiconductor device according to claim 1, wherein a peripheral portion on a main surface side of the semiconductor chip is chamfered, and the chamfered portion is also formed on the chamfered portion. A semiconductor device comprising the metal wiring. 8. The semiconductor device according to claim 1, wherein said semiconductor chip has a rectangular planar shape, and said electrodes are arranged at four corners of said semiconductor chip. A semiconductor device, wherein the metal wires are four metal wires connected to the respective electrodes. 9. The semiconductor device according to claim 1, wherein the semiconductor chip has a rectangular planar shape, and the electrodes are arranged at four corners and sides of the semiconductor chip. Wherein the same number of metal wirings as the electrodes are formed. 10. The semiconductor device according to claim 1, wherein a shape of one of the metal wires is different from a shape of another metal wire. A semiconductor device characterized by the above-mentioned. 11. The semiconductor device according to claim 1, wherein each of the metal wirings is electrically connected to a connection terminal of an external device between the metal wirings. And a resist member having the property of repelling said conductive material. 12. The semiconductor device according to claim 3, wherein said insulating film is made of a resin material having a low elastic modulus. 13. A semiconductor chip comprising: a semiconductor chip; two regions having a height difference provided on the semiconductor chip; and a metal wiring formed so as to extend over the two regions of the semiconductor chip. Is configured to function as an external electrode terminal. 14. A step of forming an insulating material film on a main surface of a semiconductor chip provided with a plurality of electrodes on the main surface, and patterning the insulating material film to open an opening above each of the electrodes. And forming a metal film over the entire surface of the semiconductor chip, patterning the metal film, and connecting a metal wiring connected to the electrode from the main surface of the semiconductor chip to the insulating film. Forming a semiconductor device. 15. The method of manufacturing a semiconductor device according to claim 14, wherein, in the step of forming the insulating material film, an insulating material film made of a resin material is formed. 16. The method for manufacturing a semiconductor device according to claim 15, wherein in the step of forming the insulating material film, the step of forming the insulating material film having a stepped shape by applying a resin material a plurality of times. A method for manufacturing a semiconductor device. 17. The method for manufacturing a semiconductor device according to claim 14, wherein a peripheral portion on a main surface side of the semiconductor chip is chamfered before the step of forming the metal wiring. A method for manufacturing a semiconductor device, further comprising the step of: forming a metal film over the chamfered portion in the step of forming the metal film. 18. The method of manufacturing a semiconductor device according to claim 17, wherein the step of chamfering the peripheral portion on the main surface side of the semiconductor chip is performed in a state of the wafer before the semiconductor chip is cut out. Manufacturing method of a semiconductor device. 19. The method of manufacturing a semiconductor device according to claim 17, wherein the step of chamfering a peripheral portion on the main surface side of the semiconductor chip is performed after cutting the semiconductor chip from a wafer. Device manufacturing method.