JPH1115545A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device low in power consumption, low in voltage level and reduced in the variation of reference voltage to the variation of power voltage. SOLUTION: In a reference voltage generation circuit, the gates are connected to each other between a p-channel FET 6 connected to an inverter and an n-channel FET 7. At the same time, the short circuits are secured between the gates and drains of both FET 6 and 7. The inverter and a constant current circuit 8 are placed in series between a high potential part 4 receiving the power voltage VDD and a ground part 5. The source voltage of the FET 7 is outputted via an output terminal 3 as the low potential reference voltage of an internal circuit. The potential difference between the voltage VDD, i.e., the high potential reference voltage of the internal circuit and the low potential reference voltage Vout is kept at the sum of thresholds of both FET 6 and 7 or higher. Thus, a potential difference is always secured for operations of both p-channel and n-channel FRTs which are contained in the internal circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a reference voltage generating circuit for generating a high-potential-side reference voltage or a low-potential-side reference voltage for operating a transistor in an internal circuit.

[0002]

2. Description of the Related Art Conventionally, a bias circuit using an n-channel field effect transistor has been used as an example of a reference voltage supply circuit for supplying a low-potential reference voltage for driving a transistor provided in an internal circuit of a semiconductor device. It has been known. Hereinafter, an example of a reference voltage generation circuit provided in a conventional semiconductor device will be described.

FIG. 8 is an electric circuit diagram showing a configuration of a bias circuit using an n-channel field effect transistor used as a reference voltage generation circuit of a conventional semiconductor device.
In the figure, 1 is a p-channel field effect transistor,
2 is an n-channel field effect transistor, 3 is a reference voltage output terminal, 4 is a high potential portion for supplying a power supply voltage V _DD ,
Reference numeral 5 denotes a ground unit for supplying the ground potential V _SS . The gate of the p-channel field-effect transistor 1 is connected to the ground 5,
The source is connected to the high potential section 4 and the drain is connected to the drain of the n-channel field effect transistor 2.
The gate of the n-channel field effect transistor 2 is short-circuited to the drain at the node N0, and the source is connected to the ground portion 5. Further, the p-channel and n
The drains of the channel field effect transistors 1 and 2 are connected to a reference voltage output terminal 3 via a node N0. The operation of the semiconductor device configured as described above will be described below.

In FIG. 8, a p-channel field effect transistor 1 operates as a constant current circuit when its gate is supplied with a ground potential V _SS from a ground portion 5. n
The channel field effect transistor 2 functions as a resistor because its gate and drain are short-circuited. That is, when a reference current flows from p-channel field effect transistor 1, a constant voltage is generated between node N0 and ground portion 5, and reference voltage _Vout is output from reference voltage output terminal 3.

A reference voltage _Vout output from the bias circuit shown in FIG. 8 is used as a low-voltage reference voltage for driving a transistor of the internal circuit, and an external power supply _VDD is used as a reference voltage between the high-potential reference voltage of the internal circuit and It is configured to be.

[0006]

In recent years, with the miniaturization and battery use of various types of electric equipment intended for portable use, semiconductor devices mounted on various kinds of portable electric equipment have been reduced in power consumption and voltage. Is required. Regarding the internal circuit where transistors operating at such low voltage are arranged,
Since the width of the operating voltage required to avoid a malfunction is extremely narrow, a very accurate voltage is required as the reference voltage.

However, when the reference voltage generating circuit constituted by the above-mentioned conventional bias circuit is provided in a low-voltage operation type semiconductor device, there are the following problems. In general, a reference voltage V _out that is output even if the voltage V _DD of the high potential section 4 fluctuates.
Although the p-channel field-effect transistor 1 is configured to be used in a saturation region so as not to vary as much as possible, if the channel length of the field-effect transistor becomes short,
In the voltage-current characteristics, the inclination of the characteristic line with respect to the horizontal direction increases in the saturation region. In addition, when the voltage V _DD decreases as the voltage of the semiconductor device decreases, the voltage may approach the unsaturated region or include a part of the unsaturated region. As a result, the power supply voltage V _DD supplied from the reference voltage high potential section 4
When the current i fluctuates due to the above, the output reference voltage V _out
Fluctuates, and it becomes impossible to stably supply a reference voltage required for the operation of the transistor in the digital internal circuit.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a reference voltage generation circuit for supplying a reference voltage to an internal circuit of a semiconductor device, which is capable of responding to a power supply voltage that varies over a wide range. By taking measures to stably generate a reference voltage that can secure a potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage necessary for smooth operation of the transistors in the internal circuit, low power consumption and low voltage The purpose of the present invention is to provide a semiconductor device.

[0009]

In order to achieve the above-mentioned object, the means taken by the present invention employs an inverter for generating a reference voltage, and uses a p-channel field effect transistor and an n-channel field effect transistor. The present invention is configured to ensure a potential difference obtained by adding both threshold values between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit.

Specifically, means for a semiconductor device having the reference voltage generating circuit according to the first to tenth aspects is taken.

According to a first aspect of the present invention, there is provided a first semiconductor device, comprising: a high potential portion receiving a power supply voltage;
A ground portion connected to the ground, an internal circuit provided between the high-potential portion and the ground portion and including a plurality of transistors, and a reference voltage generating circuit for generating a low-potential-side reference voltage of the internal circuit Wherein the reference voltage generation circuit is connected to form an inverter, the gates are connected to each other, and the gate-drain is short-circuited, and n
A channel field-effect transistor, and a constant current circuit interposed between the source of the n-channel field-effect transistor and the ground for flowing a constant current to the p-channel and n-channel field-effect transistors. ing. The output voltage from the source of the n-channel field-effect transistor is used as a low-potential-side reference voltage of the internal circuit, while the voltage of the high-potential portion is used as a high-potential-side reference voltage of the internal circuit. ing.

Thus, even if the power supply voltage supplied from the high-potential portion fluctuates, the voltage of the high-potential portion serving as the high-potential-side reference voltage of the internal circuit and the p-channel field-effect transistor serving as the low-potential-side reference voltage Is always ensured to be equal to or greater than the sum of the threshold voltages of both the p-channel and n-channel field effect transistors. Therefore, it is possible to stably obtain a low-potential-side reference voltage that is minimum necessary for operating the p-channel and n-channel field-effect transistors of the internal circuit that operates using the voltage of the high-potential portion as the high-potential-side reference voltage.

According to a second aspect of the present invention, there is provided a second semiconductor device, comprising: a high potential portion receiving a power supply voltage;
A ground portion connected to the ground, an internal circuit provided between the high potential portion and the ground portion and including a plurality of transistors, and a reference voltage for generating a high potential side reference voltage of the internal circuit. A reference voltage generation circuit, wherein the reference voltage generation circuit is connected to form an inverter, the gates are connected to each other, and the gate-drain is short-circuited. A transistor and an n-channel field-effect transistor, and the p-channel field-effect transistor and n interposed between a source of the p-channel field-effect transistor and the high potential portion.
A constant current circuit for supplying a constant current to the channel field effect transistor. The output voltage from the source of the p-channel field-effect transistor is used as a high-potential-side reference voltage of the internal circuit, while the voltage of the ground portion is used as a low-potential-side reference voltage of the internal circuit. I have.

Thus, even if the power supply voltage supplied from the high-potential portion fluctuates, the voltage of the p-channel field-effect transistor serving as the high-potential-side reference voltage of the internal circuit and the voltage of the ground portion serving as the low-potential-side reference voltage Is ensured to be equal to or greater than the sum of the threshold voltages of both the p-channel and n-channel field effect transistors. Therefore, p of the internal circuit operating as the low-potential-side reference voltage using the voltage of the grounding portion
It is possible to stably obtain the minimum reference voltage required for operating the channel and n-channel field-effect transistors.

According to a third aspect of the present invention, in the first or second aspect, the constant current circuit comprises a current mirror circuit and a field effect transistor for supplying a reference current to the current mirror circuit. be able to.

As described in claim 4, in claim 3, it is preferable that the constant current circuit further includes a band gap circuit for controlling a gate voltage of the field effect transistor.

Thus, in the constant current circuit, the output voltage of the bandgap circuit can be kept constant regardless of the fluctuation of the power supply voltage, so that the reference current formed by the field effect transistor is also constant, The current of the current circuit becomes more stable and constant. Therefore, the high-potential-side reference voltage or the low-potential-side reference voltage of the internal circuit generated by the reference voltage generation circuit can be more reliably stabilized with respect to a wide range of power supply voltages.

According to a fifth aspect of the present invention, in the first aspect, an output from the source of the n-channel field-effect transistor is provided between the source of the n-channel field-effect transistor and the internal circuit. It is preferable to further include a voltage follower circuit for converting a voltage to a low impedance.

Thus, in addition to the function of the first aspect, the reference voltage generating circuit can have the current supply capability required for the operation of many transistors in the internal circuit.

According to a sixth aspect of the present invention, in the first aspect, an output from the source of the n-channel field-effect transistor is provided between the source of the n-channel field-effect transistor and the internal circuit. A non-inverting amplifier for dividing the voltage may be further provided.

Thus, the reference voltage generating circuit is provided with a current supply capability necessary to drive a large number of transistors, and by adjusting the voltage dividing ratio, the high potential side reference voltage of the internal circuit and the low potential It is possible to set the fluctuation range of the potential difference between the side reference voltages to a desired value. For example, by appropriately setting the voltage division ratio, the fluctuation of the power supply voltage in the high-potential portion allows the power supply voltage, which is the high-potential-side reference voltage of the internal circuit, and the output voltage of the non-inverting amplifier, which is the low-potential-side reference voltage, to change. Between the potential differences can be suppressed. Further, depending on the setting of the voltage dividing ratio, when the power supply voltage fluctuates to the high potential side, the potential difference becomes small and the amount of current consumption decreases, and when the power supply voltage fluctuates to the low potential side, the potential difference becomes large and the internal circuit becomes large. It is also possible to perform control such that a decrease in the operation speed of the transistor is suppressed.

According to a third aspect of the present invention, there is provided a semiconductor device comprising: a high potential portion receiving a power supply voltage;
A ground portion connected to the ground, an internal circuit provided between the high potential portion and the ground portion and including a plurality of transistors, and a reference voltage for generating a high potential side reference voltage of the internal circuit. A reference voltage generation circuit, wherein the reference voltage generation circuit is connected to form an inverter, the gates are connected to each other, and the gate-drain is short-circuited. A transistor and an n-channel field-effect transistor, and a constant-current circuit interposed between the source of the n-channel field-effect transistor and the ground for flowing a constant current to the p-channel and n-channel field-effect transistors And the n-channel field-effect transistor interposed between the source of the n-channel field-effect transistor and the internal circuit. And an inverting amplifier for dividing the output voltage from the source. The output voltage of the inverting amplifier is used as a high-potential-side reference voltage of the internal circuit, and the voltage of the ground portion is used as a low-potential-side reference voltage of the internal circuit.

With this arrangement, the output voltage of the non-inverting amplifier is used as the high-potential-side reference voltage of the internal circuit.
The same function as the seventh aspect is obtained.

According to the present invention, the output from the source of the p-channel field-effect transistor is provided between the source of the p-channel field-effect transistor and the internal circuit. A voltage follower circuit for converting a voltage to a low impedance can be further provided.

Thus, in addition to the function of the second aspect, the reference voltage generating circuit can have the current supply capability necessary for the operation of the transistor in the internal circuit.

According to a ninth aspect, in the second aspect, the output from the source of the p-channel field-effect transistor is provided between the source of the p-channel field-effect transistor and the internal circuit. A non-inverting amplifier for dividing the voltage may be further provided.

This allows the reference voltage generation circuit to have a current supply capability necessary to drive a large number of transistors, and adjusts the voltage division ratio to control the high-potential-side reference voltage-low potential of the internal circuit against fluctuations in the power supply voltage. It is possible to set the fluctuation range of the potential difference between the side reference voltages to a desired value. For example, by appropriately setting the voltage dividing ratio, the output voltage of the non-inverting amplifier, which is the high-potential-side reference voltage of the internal circuit, and the grounding portion, which is the low-potential-side reference voltage, can be changed with respect to fluctuations in the power supply voltage of the high-potential portion. It is possible to suppress the fluctuation width of the potential difference between the voltage and the voltage. Further, depending on the setting of the voltage dividing ratio, when the power supply voltage fluctuates to the high potential side, the potential difference becomes small and the amount of current consumption decreases, and when the power supply voltage fluctuates to the low potential side, the potential difference becomes large and the internal circuit becomes large. It is also possible to perform control such that a decrease in the operation speed of the transistor is suppressed.

According to a fourth aspect of the present invention, there is provided a semiconductor device comprising:
And a high-potential portion receiving a power supply voltage, a ground portion connected to the ground, and an internal circuit including a plurality of transistors disposed between the high-potential portion and the ground portion. A reference voltage generation circuit for generating a low-potential-side reference voltage of the internal circuit, wherein the reference voltage generation circuit is connected so as to constitute an inverter, and the gates of each other are connected to each other. A p-channel field-effect transistor and an n-channel field-effect transistor connected to each other and having a gate and a drain short-circuited; and the p-channel field-effect transistor interposed between a source of the p-channel field-effect transistor and the ground. Transistor and n
A constant current circuit for supplying a constant current to the channel field effect transistor; and a constant current circuit interposed between the source of the p channel field effect transistor and the internal circuit, for dividing an output voltage from the source of the p channel field effect transistor. And an inverting amplifier for compression. The output voltage of the inverting amplifier is used as a low-potential-side reference voltage of the internal circuit, while the voltage of the high-potential portion is used as a high-potential-side reference voltage of the internal circuit.

Thus, the same operation as in the ninth aspect can be obtained in the case where the output voltage of the inverting amplifier is used as the low potential side reference voltage of the internal circuit.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

(First Embodiment) First, a first embodiment will be described.

FIG. 1 is an electric circuit diagram showing a configuration of a reference voltage generation circuit provided in a semiconductor device according to the first embodiment of the present invention. In the figure, reference numeral 6 denotes a first p-channel field-effect transistor, 7 denotes a first n-channel field-effect transistor, 8 denotes a constant current circuit, and 9 denotes a capacitor for removing a power supply ripple and the like. Reference numeral 3 denotes a reference voltage output terminal, 4 denotes a high potential portion, and 5 denotes a ground portion. These members are the same as those in the configuration of the above-described reference voltage supply circuit according to the conventional example. The first p-channel field-effect transistor 6 and the first n-channel field-effect transistor 7 are connected by an inverter, and their drains and gates are connected at nodes N1 and N2, respectively. Short-circuited. That is, the input and output of the inverter are short-circuited, and the constant current circuit 8 allows only a constant current to flow.

The operation of the semiconductor device of the present embodiment configured as described above will be described below.

The first p-channel field-effect transistor 6 and the first n-channel field-effect transistor 7, which are connected so as to form an inverter and whose gate and drain are short-circuited, are connected by a constant current circuit 8. When a constant current i flows, a gate-source voltage V _GS V _GS = {I _DS · (2 / β) · (L / W)} + V _th (1) expressed by the following equation (1) is obtained. Occur. Where V _th is the threshold voltage, I _DS is the drain-source current (= i), β / 2 is the current mobility, L
Represents a channel length, and W represents a channel width. Also,
The above equation (1) is calculated by the following equation (2) for calculating the drain-source saturation current _{ID: ID} = (β / 2) · (W / L) · (V _GS −V _th ) ² ( 2) is an equation obtained by _modifying the equation with respect to the gate-source voltage V _GS . However, in each of the above equations, the gate insulating film capacitance Cox
Is ignored as a constant.

[0035] That is, when a constant current flows i to the constant current circuit 8, an inverter gate - as source voltage V _GS, depending on the transistor size, a constant voltage to the threshold voltage V _th alpha (alpha is the formula (1 ) Is generated by adding the component (1) on the right side of (1). Therefore, the high potential portion 4 and the first
Of the first p-channel and n-channel field-effect transistors 6 and 7 (threshold voltage V _th +
α) is added to generate a potential difference. Therefore, from the reference voltage output terminal 3 connected to the node N3 via the node N4, the value obtained by adding the (threshold voltage V _th + α) of both the transistors 6 and 7 to the potential of the high potential portion 4 Thus, a constant voltage V _{out which} is lower by only the same is output. The output voltage _Vout is used as a low-potential-side reference voltage of the internal circuit, and the voltage _VDD of the high-potential section 4 is used as a high-potential-side reference potential of the internal circuit.

As described above, according to the present embodiment, the reference current i is supplied to the first p-channel and n-channel field-effect transistors 6 and 7 which are connected to form an inverter and whose gate and drain are short-circuited. And the source of the first p-channel field-effect transistor 6 is connected to the high potential section 4, and the voltage V _{out obtained} by adding the gate-source voltage V _GS of the first p-channel and n-channel field-effect transistors 6 and 7. When the output voltage V _out is used as the low-potential-side reference voltage of the internal circuit and the voltage V _DD of the high-potential section 4 is used as the high-potential-side reference voltage, the power supply voltage V supplied from the high-potential section 4 _{Even if DD} fluctuates, the potential difference between the power supply voltage V _DD and the output voltage Vout serving as the low-potential-side reference voltage is always ensured by (threshold voltage + α) of the transistors 6 and 7. Since the threshold voltages of both the p-channel field-effect transistor 6 and the n-channel field-effect transistor 7 are taken into account, the potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit is reduced. Voltage required to operate the p-channel and n-channel field-effect transistors of the present invention is always secured. Therefore, the p channel and n of the CMOS internal digital circuit operating with the power supply voltage V _DD of the high potential section 4 as the high potential side reference voltage.
It is possible to stably obtain a low-potential-side reference voltage required at least for operating the channel field-effect transistor.

Further, since the operating voltage of the internal circuit can be made lower than the power supply voltage of the high potential section 4, the current consumption can be reduced.

Further, since the constant current circuit 8 is provided inside the semiconductor device, it is not necessary to supply a reference voltage for operating the internal circuit from the outside, and the power supply voltage V _DD can be reduced by the value shown in the above equation (1). it is possible to obtain a stable reference voltage for a wide range of power supply voltage until the summed voltage of the source voltage V _GS - 1 of p-channel and gate of n-channel field effect transistors 6 and 7.

As shown in equation (1), it is possible to set the gate-source voltage almost equal to the threshold value by setting the transistor size.

(Second Embodiment) Next, a second embodiment will be described with reference to FIG.

FIG. 2 is an electric circuit diagram showing a configuration of a reference voltage generation circuit provided in a semiconductor device according to the second embodiment. As shown in the figure, basic circuit elements in the present embodiment are the same as those of the reference voltage generation circuit in the first embodiment shown in FIG. However, in the present embodiment, the source of the first n-channel field-effect transistor 7 is connected to the ground 5, and the constant current circuit 8 is connected between the source of the first p-channel field-effect transistor 6 and the high potential section 4. The first p-channel field effect transistor 6
Is different from the first embodiment in that the node N3 connected to the source of the first embodiment is connected to the reference voltage output terminal 3 via the node N4.

The operation of the reference voltage generation circuit according to the present embodiment having the above configuration will be described below.

The basic operation of the inverter in this embodiment is the same as that of the first embodiment. However, in this embodiment, the reference point of the potential difference secured by the inverter is not the high potential section 4 but the ground section 5. It is. Therefore, from the reference voltage output terminal 3 connected to the node N3, a voltage V _{out obtained} by adding (threshold voltage + α) of both the first p-channel and n-channel field effect transistors 6 and 7 to the ground potential V _SS . Is output. And this output voltage V _out
Are used as the high-potential-side reference voltage of the internal circuit, and the ground potential V _SS of the ground unit 5 is used as the low-potential-side reference voltage of the internal circuit.

As described above, according to the present embodiment, in the internal circuit, the ground potential V _SS is used as the low potential side reference voltage, and the output voltage Vout from the reference voltage generation circuit is used as the high potential side reference voltage. In this case, the same effect as that of the first embodiment can be obtained, and the minimum required for operating the p-channel and n-channel field effect transistors of the digital internal circuit having the CMOS structure with respect to the fluctuation of the power supply voltage can be obtained. The potential-side reference voltage can be stably obtained.

Third Embodiment Next, a third embodiment will be described with reference to FIG.

FIG. 3 is an electric circuit diagram showing a configuration of a reference voltage generation circuit provided in a semiconductor device according to the third embodiment. The reference voltage generation circuit in the present embodiment specifically shows an example of the configuration of the constant current circuit 8 in the first embodiment. In the figure, reference numerals 10 and 11 denote second and third n-channel field-effect transistors in a current mirror configuration, and reference numeral 12 denotes a second p-channel field-effect transistor for forming a reference current i.
The second and third n-channel field effect transistors 1
0, 11 and second p-channel field effect transistor 1
2 constitutes a constant current circuit 8. Other circuit elements are the same as those of the reference voltage generation circuit in the first embodiment shown in FIG.

The operation of the reference voltage generation circuit according to the present embodiment configured as described above will be described below.

Second p-channel field effect transistor 1
The gate of the second p-channel field-effect transistor 2 is connected to the ground portion 5 to be at the ground potential V _SS , and the reference current i flows through the second p-channel field-effect transistor 12. Further, the gate and drain of the third n-channel field effect transistor 11 are short-circuited,
A second n-channel field-effect transistor 10 having a current mirror configuration is provided for the third n-channel field-effect transistor 11. The reference current i is supplied to the third n-channel field effect transistor 11.
And a reference current i to be supplied to the first p-channel and n-channel field effect transistors 6 and 7 is formed. The operation after the formation of the reference current i is the same as in the first embodiment.

As described above, according to the present embodiment, the same effect as that of the first embodiment can be obtained based on the high potential section 4 and the CMOS operating based on the high potential section 4
It is possible to stably obtain the minimum reference voltage required as an operation power supply for the digital internal circuit having the configuration.

When the power supply voltage V _DD fluctuates, the second
The reference current i formed by the p-channel field-effect transistor 12 fluctuates, but the two transistors 6 and 7 forming the inverter having the configuration of the first embodiment described above.
Is secured as a potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit.
A reference voltage for accurately operating the channel and n-channel field effect transistors can be stably obtained.

The second and third n-channel field effect transistors 1 provided in the constant current circuit 8 of the present embodiment
0, 11 and second p-channel field effect transistor 12
Are formed by the opposite p-channel and n-channel field-effect transistors, respectively, whereby the constant current circuit 8 according to the second embodiment can be specifically configured. In that case, the output voltage V from the reference voltage generation circuit
While using _out as the high-potential-side reference voltage of the internal circuit,
The same effects as in the present embodiment can be obtained.

(Fourth Embodiment) Next, a fourth embodiment will be described with reference to FIG.

FIG. 4 is an electric circuit diagram showing a configuration of a reference voltage generation circuit provided in a semiconductor device according to the fourth embodiment. 3, reference numeral 13 denotes a bandgap reference circuit for applying a predetermined constant voltage to the gate of the second p-channel field-effect transistor 12, and other circuit elements are circuit elements in the reference voltage generation circuit shown in FIG. Is the same as

The operation of the reference voltage generating circuit according to the present embodiment having the above configuration will be described below.

Second p-channel field effect transistor 1
2 is a band gap reference circuit 1
The reference current i is formed by applying the constant voltage output from the reference 3. The operation after the formation of the reference current i is the same as that of the third embodiment.

As described above, according to the present embodiment, in addition to the same effects as those of the first embodiment, the same effects as those of the third embodiment can be obtained based on the high potential portion 4. Further, since the output voltage of the bandgap reference circuit 13 becomes constant regardless of the fluctuation of the power supply voltage V _DD , the reference current i formed by the second p-channel field-effect transistor 12 also becomes more stable and constant. The output voltage of the reference voltage output terminal 3 can be further stabilized with respect to a wide range of power supply voltage.

Also, first p-channel and n-channel field effect transistors 6, 7 connected in advance to form an inverter and having a gate and a drain short-circuited.
And the reference current i to be supplied is represented by CM
By setting the minimum potential reference voltage required to operate the OS internal digital internal circuit to the minimum, it is possible to reduce the variation in current consumption over a wide range of power supply voltage V _DD , and maintain a stable circuit. Operation can be enabled.

It should be noted that the second and third n-channel field effect transistors 10 and 11 and the second p-channel field effect transistor 12 of the present embodiment are constituted by opposite p-channel and n-channel field effect transistors, respectively. Thus, a circuit in which the constant current circuit 8 of the second embodiment is specifically configured can be obtained. In that case, the output voltage V
While using _out as the high-potential-side reference voltage of the internal circuit,
The same effects as in the present embodiment can be obtained.

(Fifth Embodiment) Next, a fifth embodiment will be described with reference to FIG.

FIG. 5 is an electric circuit diagram showing a configuration of a reference voltage generation circuit provided in a semiconductor device according to the fifth embodiment. In the figure, reference numeral 14 denotes a voltage follower circuit connected between the source of the first n-channel field-effect transistor 7 of the first embodiment and the reference voltage output terminal 3, and the other circuit elements are shown in FIG. Are the same as the circuit elements of the reference voltage generation circuit of the first embodiment shown in FIG.

The operation of the semiconductor device according to the present embodiment having the above configuration will be described below.

The basic operation of the reference voltage generation circuit of the present embodiment is the same as the operation of the reference voltage generation circuit of the first embodiment, but is generated by the reference voltage generation circuit of the first embodiment. The output voltage V _out by itself does not always involve a large current for operating many transistors. Therefore, in the present embodiment, a current follow-up operation is performed by interposing a voltage follower circuit 14 in front of the reference voltage output terminal 3 of the circuit shown in FIG. The output of the voltage follower circuit 14 is output to the internal circuit via the reference voltage output terminal 3, and the output voltage _Vout is used as a low-potential-side reference voltage for operating the transistors of the internal circuit. ing.

As described above, according to the present embodiment, the first
It is possible to obtain sufficient current supply capability as an operating voltage source of a digital internal circuit by performing current amplification by the action of the voltage follower circuit 14 and performing low impedance conversion. Can be.

In the second embodiment, the voltage follower circuit 14 may be connected to the reference voltage output terminal 3 and the output may be output to the internal circuit via the reference voltage output terminal 3. . In this case, the same effect as that of the present embodiment can be obtained while using the output voltage V _out as the high-potential-side reference voltage of the internal circuit.

(Sixth Embodiment) Next, a sixth embodiment will be described with reference to FIGS. 6 (a) and 6 (b).

FIG. 6A is an electric circuit diagram of a reference voltage generation circuit provided in a semiconductor device according to the sixth embodiment. As shown in FIG.
In the first embodiment shown in FIG. 1, an operational amplifier 15 is interposed in front of the reference voltage output terminal 3 of the reference voltage generation circuit. The non-inverting signal input terminal of the operational amplifier 15 is connected to the reference voltage output terminal 3, and the output of the operational amplifier 15 is fed back to the inverting signal input terminal via the resistor 16, and the resistor 17 is A non-inverting amplifier is connected between the inverting input terminal of the operational amplifier 15 and the reference point 18, and the output of the non-inverting amplifier is a reference voltage output terminal 3. However, the potential at the reference point 18 is （(= VDD / 2) of the difference between the potential V _DD of the high potential portion 4 and the potential V _SS of the ground portion 5. In order to realize such a potential, for example, as shown in FIG. 6B, two resistors 19 and 20 having the same resistance value are connected in series between the high potential portion 4 and the ground portion 5. And each resistor 1
One part between 9 and 20 may be set as the reference point 18.

The other circuit elements are the same as the circuit elements of the reference voltage generation circuit in the first embodiment shown in FIG. The potential at the reference point 18 is set to V _DD / 2 as shown in FIG. 6B.

The operation of the reference voltage generation circuit of the present embodiment configured as described above will be described below.

The node N of the reference voltage generation circuit of the present embodiment
The basic operation up to generation of the voltage No. 4 is the same as in the first embodiment. However, the output voltage V _out from the reference voltage generation circuit of the first embodiment does not involve a sufficient current by itself. Therefore, in the present embodiment, a non-inverting amplifier is connected to a stage preceding the reference voltage output terminal 3 to perform a current amplifying operation and convert to a low impedance.
Then, the output of the non-inverting amplifier is output to the internal circuit via the reference voltage output terminal 3, and is used as a low potential side reference voltage of the internal circuit.

Further, the voltage formed at the source of the first n-channel field effect transistor 7 is amplified to an arbitrary voltage with reference to the potential of the reference point 18 according to the set values of the resistances of the resistors 16 and 17. You. Operational amplifier 15 and resistor 1
Table in the gain of the noninverting amplifier and G _1, the gain G ₁ is represented by the following formula _{(3) G 1 = V OUT1} / V IN1 = (R 16 + R 17) / R 17 (3) consists of 6, 17 Is done. Here, V _IN1 indicates the voltage formed at the node N4, V _OUT1 indicates the output voltage of the reference voltage output terminal 3, R ₁₆ indicates the resistance of the resistor 16, and R ₁₇ indicates the resistance of the resistor 17. Therefore, the voltage V _out obtained by amplifying the difference between the potential VDD / 2 potential V _OUT1 and the reference point 18 of the node N4 by the gain G ₁ is output from the reference voltage output terminal 3. The voltage output from the reference voltage output terminal 3 is used as a low-potential-side reference voltage of the internal circuit. The high-potential-side reference voltage of the internal circuit is the potential V _DD of the high-potential section 4.

As described above, according to the present embodiment, the first
In addition to being able to obtain the same effects as the embodiment,
Current amplification and low-impedance conversion are performed by the action of a non-inverting amplifier composed of an operational amplifier 15 and resistors 16 and 17, and the potential V _DD / 2 of the reference point 18 is set by setting the values of the resistors 16 and 17. Can be set to a predetermined value.

For example, the potential V _DD of the high potential portion 4 is 5 V
And the potential at the reference point 18 is V _DD / 2, the gain G ₁ is 2,
Assuming that the potential of the node N4 is 3 V (the voltage drop by the inverter is 2 V), the potential of the reference voltage output terminal 3 is calculated by the following equation: V _out = (3-2.5) × 2 + 2.5 = 3.5 (V) is calculated. At this time, since the high-potential-side reference voltage of the internal circuit is 5 V and the low-potential-side reference voltage is 3.5 V, the potential difference between the reference voltages is 1.5 V.

On the other hand, the potential V _DD of the high potential
Assuming that the potential of the node N4 has become V, the potential of the node N4 becomes 1 V,
Since the potential at the reference point 18 becomes 1.5 V and the gain G ₁ does not change, the output voltage V from the reference voltage output terminal 3 is output.
_out is calculated as follows: V _out = (1−1.5) × 2 + 1.5 = 0.5 (V) At this time, since the high-potential-side reference voltage of the internal circuit is 3 V and the low-potential-side reference voltage is 0.5 V, the potential difference between the reference voltages is 2.0 V.

That is, even if the potential V _DD of the high potential portion 4 fluctuates by 2 V, the potential difference between the high and low reference voltages of the internal circuit is 0.5 V
Only fluctuates. As described above, the non-inverting amplifier including the operational amplifier 15 and the resistors 16 and 17 of the present embodiment is
It acts on the fluctuation of the voltage of the high-potential section 4 in the direction of reducing the fluctuation of the potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit.

Further, when the potential V _DD of the high potential portion 4 changes to a high level, the potential difference between the high potential side reference voltage and the low potential side reference voltage of the internal circuit is reduced (1.5 V). Consumes less current. On the other hand, when the potential V _DD of the high potential portion 4 changes low, the potential difference between the high potential side reference voltage and the low potential side reference voltage of the internal circuit increases (2.
0V), the current consumption of the internal circuit is maintained or increased, and as a result, the reduction in the operating speed of the transistor in the internal circuit at low voltage is improved.

The voltage output from the reference voltage output terminal 3 of this embodiment is effective when used as an operating voltage of a digital internal circuit or a reference voltage of another circuit. Also,
In the second embodiment, a non-inverting amplifier comprising an operational amplifier 15 and resistors 16 and 17 is connected to the reference voltage output terminal 3 and the output of the non-inverting amplifier is used as the reference voltage output terminal 3. Needless to say, the same effect as described above can be obtained.

(Seventh Embodiment) Next, a seventh embodiment will be described with reference to FIG.

FIG. 7 is an electric circuit diagram of a reference voltage generation circuit provided in a semiconductor device according to the seventh embodiment.
The basic configuration of the reference voltage generation circuit shown in FIG.
This is the same as the configuration of the circuit shown in FIG. However, in the reference voltage generation circuit of the present embodiment, the non-inverting input terminal of the operational amplifier 15 is connected to the reference point 18 and the operational amplifier 1
5, a resistor 17 is connected between the inverting input terminal 5 and the source of the first n-channel field effect transistor 7,
The difference from the sixth embodiment is that the operational amplifier 15 and the resistors 16 and 17 constitute an inverting amplifier.

The operation of the reference voltage generation circuit according to the present embodiment configured as described above will be described below.

The basic operation of the reference voltage generation circuit according to the present embodiment up to generation of the voltage of the node N4 is the same as that of the sixth embodiment. However, in this embodiment, the voltage of the node N4 is equal to the voltage of the operational amplifier 15 and the resistor 16,
The inversion amplifier 17 inverts and amplifies the potential with reference to the potential at the reference point 18. That is, assuming that the gain of the inverting amplifier composed of the operational amplifier 15 and the resistors 16 and 17 is G ₂ , the gain G ₂ is given by the following equation (4): G ₂ = V _OUT2 / V _IN2 = −R ₁₆ / R ₁₇ (4) is represented by Here, V _IN2 is the voltage formed at the node N4, V _OUT2 is the output voltage of the reference voltage output terminal 3, R ₁₆ is the resistance of the resistor 16, and R ₁₇ is the resistance of the resistor 17. Therefore, the potential V _{OUT2 of the} node N4 and the reference point 18
Of the difference between the potential VDD / 2 by the gain G ₂ voltage inverting amplifier is output from the reference voltage output terminal 3. The voltage output from the reference voltage output terminal 3 is used as a high-potential-side reference voltage of the internal circuit. Originally, the potential of the node N4 is a voltage generated with reference to the potential V _DD of the high potential portion 4, but the output voltage V _out is obtained by inverting the voltage of the node N4 with reference to the potential V _DD / 2 of the reference point 18. The output voltage _Vout is
Of it it becomes possible to replace such a reference voltage to ensure a potential difference with respect to the potential V _SS. Therefore, the low-potential-side reference voltage of the internal circuit is the potential V _SS of the ground section 5.

According to the present embodiment, the same effects as those of the second embodiment can be obtained. In addition, the current amplifier is further operated by the operation of the inverting amplifier composed of the operational amplifier 15 and the resistors 16 and 17. And a low-impedance conversion to obtain an output voltage _Vout obtained by arbitrarily inverting the voltage formed at the node N4 with reference to the reference point 18 by the set values of the resistances of the resistors 16 and 17. .

For example, the potential V _DD of the high potential portion 4 is 5 V
And the potential at the reference point 18 is V _DD / 2, and the gain G ₂ is -1.
Assuming that the potential of the node N4 is 3 V (the voltage drop by the inverter is 2 V), the reference voltage output terminal 3
Is calculated as follows: V _out = (3-2.5) × (−1) + 2.5 = 2.0 (V) At this time, since the high-potential-side reference voltage of the internal circuit is 2.0 V and the low-potential-side reference voltage is 0 V, the potential difference between the reference voltages is 2.0 V.

On the other hand, the potential V _DD of the high potential
Assuming that the potential of the node N4 has become V, the potential of the node N4 becomes 1 V,
The potential of the reference point 18 is 1.5V, the the gain G ₂ is not changed, the output voltage V _out of _the reference voltage output terminal 3, the following equation _{V out = (1-1.5) × (} -1) +1 .5 = 2.0 (V). At this time, since the high-potential-side reference voltage of the internal circuit is 2.0 V and the low-potential-side reference voltage is 0 V, the potential difference between the reference voltages is 2.0 V.

That is, even if the potential V _DD of the high potential section 4 fluctuates by 2 V, the difference between the high and low reference voltages of the internal circuit does not fluctuate.
As described above, the operational amplifier 15 and the resistor 1
The inverting amplifier constituted by 6 and 17 acts in the direction of reducing the fluctuation of the potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit with respect to the fluctuation of the voltage of the high potential section 4.

Further, by appropriately setting the amplification factor of the inverting amplifier (for example, about -1.5), when the potential V _DD of the high potential section 4 changes to a high level, the high potential side reference voltage and the low potential side reference voltage of the internal circuit are changed. The potential difference with the voltage becomes small (1.5
V) to reduce the current consumption of the internal circuit, and when the potential V _DD of the high-potential section 4 changes low, the potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit is reduced. As a result, the current consumption of the internal circuit is maintained or increased by changing it to be larger (2.0 V). As a result, the operation speed of the transistor in the internal circuit at a low voltage can be easily reduced. it can.

The output voltage V _out of the reference voltage generation circuit according to the present embodiment is effective when used as an operation voltage of a digital internal circuit or a reference voltage of another circuit.

In the second embodiment, a circuit in which an operational amplifier 15 and an inverting amplifier composed of resistors 16 and 17 are connected to the reference voltage output terminal 3 and the output of which is the reference voltage output terminal 3 is also used. Needless to say, the same effects as in the present embodiment can be obtained.

[0088]

As described above, according to claims 1 and 2,
In a reference voltage generating circuit for generating a high-potential-side or low-potential-side reference voltage of an internal circuit of a semiconductor device, a p-channel and n-channel field-effect transistor in which gates are connected and a gate and a drain are short-circuited is provided. Further, a constant current circuit is provided between the inverter and the high potential portion or the ground portion, and the voltage between the inverter and the constant current circuit is used as the high potential side or low potential side reference voltage of the internal circuit. Therefore, the potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit is ensured to be equal to or greater than the sum of the threshold values of both the p-channel and n-channel field-effect transistors in the internal circuit. It is possible to stably obtain the minimum reference voltage required for operating the p-channel and n-channel field effect transistors of the internal circuit. , It is possible to provide low-power and low-voltage semiconductor device.

According to the third and fourth aspects, since the constant current circuit is constituted by using the current mirror circuit, a stable current can be obtained with respect to the fluctuation of the power supply voltage.

According to the fifth or eighth aspect, the voltage follower circuit for converting the output to a low impedance before outputting the reference voltage generated by the reference voltage generation circuit to the internal circuit is provided. Can be provided with a current supply capability for driving the transistors of the internal circuit.

According to the sixth, seventh, ninth or tenth aspect, the non-inverting amplifier or the inverting amplifier for dividing the output before outputting the reference voltage generated by the reference voltage generating circuit to the internal circuit is provided. The potential difference between the high-potential-side reference voltage and the low-potential-side reference voltage of the internal circuit with respect to fluctuations in the power supply voltage can be arbitrarily adjusted. Deterioration of operation can be effectively prevented.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram of a reference voltage generation circuit for supplying a low-potential-side reference voltage to an internal circuit according to a first embodiment.

FIG. 2 is an electric circuit diagram of a reference voltage generation circuit for supplying a high-potential-side reference voltage to an internal circuit according to a second embodiment.

FIG. 3 is an electric circuit diagram of a reference voltage generation circuit that includes a constant current circuit having a current mirror configuration and supplies a low-potential-side reference voltage to an internal circuit according to a third embodiment.

FIG. 4 is an electric circuit diagram of a reference voltage generating circuit for providing a low-potential-side reference voltage to an internal circuit by attaching a band gap reference circuit to a constant current circuit having a current mirror configuration according to a fourth embodiment.

FIG. 5 is an electric circuit diagram of a reference voltage generating circuit provided with a voltage follower circuit for supplying a low-impedance-converted low-potential-side reference voltage to an internal circuit according to a fifth embodiment.

FIG. 6 is an electric circuit diagram of a reference voltage generation circuit provided with a non-inverting amplifier for supplying a divided low-potential-side reference voltage to an internal circuit according to a sixth embodiment.

FIG. 7 is an electric circuit diagram of a reference voltage generation circuit provided with an inverting amplifier for supplying a divided high-potential-side reference voltage to an internal circuit according to a seventh embodiment.

FIG. 8 is an electric circuit diagram of a reference voltage generation circuit provided in a conventional semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 3 reference voltage output terminal 4 high-potential section 5 ground section 6 first p-channel field-effect transistor 7 first n-channel field-effect transistor 8 constant-current circuit 9 capacitor 10 second n-channel field-effect transistor 11 third n Channel field-effect transistor 12 Second p-channel field-effect transistor 13 Band gap reference circuit 14 Voltage follower circuit 15 Operational amplifier 16 Resistor 17 Resistor 18 Reference point 19 Resistor 20 Resistor

Claims (10)

[Claims] An internal circuit including a high-potential portion for receiving a power supply voltage, a ground portion connected to the ground, a plurality of transistors interposed between the high-potential portion and the ground portion; A reference voltage generation circuit for generating a low-potential-side reference voltage of the circuit, wherein the reference voltage generation circuit is connected to form an inverter, and their gates are connected to each other; A p-channel field-effect transistor and an n-channel field-effect transistor having a gate and a drain short-circuited; and the p-channel field-effect transistor and n interposed between the source of the n-channel field-effect transistor and the ground. A constant current circuit for causing a constant current to flow through the channel field effect transistor, and an output voltage from a source of the n channel field effect transistor. While using the low potential side reference voltage of the serial internal circuit, a semiconductor device characterized by being configured the voltage of the high potential portion as used in the high-potential-side reference voltage of the internal circuit. 2. An internal circuit comprising: a high-potential portion receiving a power supply voltage; a ground portion connected to the ground; a plurality of transistors disposed between the high-potential portion and the ground portion; A reference voltage generation circuit for generating a high-potential-side reference voltage of the circuit, wherein the reference voltage generation circuit is connected to form an inverter, and their gates are connected to each other; A p-channel field-effect transistor and an n-channel field-effect transistor having a gate and a drain short-circuited; and the p-channel field-effect transistor interposed between a source of the p-channel field-effect transistor and the high potential portion. a constant current circuit for causing a constant current to flow through the n-channel field-effect transistor; While used in the high-potential side reference voltage of the circuit, the semiconductor device characterized by being configured the potential of the ground portion as used in the low-potential reference voltage of the internal circuit. 3. The semiconductor device according to claim 1, wherein the constant current circuit includes a current mirror circuit, and a field-effect transistor for supplying a reference current to the current mirror circuit. Semiconductor device. 4. The semiconductor device according to claim 3, wherein said constant current circuit further includes a bandgap circuit for controlling a gate voltage of said field effect transistor. 5. The semiconductor device according to claim 1, wherein an output voltage from the source of the n-channel field-effect transistor is provided between the source of the n-channel field-effect transistor and the internal circuit and has a low impedance. A semiconductor device further comprising a voltage follower circuit for converting the voltage into a voltage. 6. The semiconductor device according to claim 1, which is interposed between a source of said n-channel field-effect transistor and said internal circuit and divides an output voltage from a source of said n-channel field-effect transistor. Semiconductor device further comprising a non-inverting amplifier. 7. An internal circuit comprising a high-potential portion receiving a power supply voltage, a ground portion connected to the ground, a plurality of transistors interposed between the high-potential portion and the ground portion, and A reference voltage generation circuit for generating a high-potential-side reference voltage of the circuit, wherein the reference voltage generation circuit is connected to form an inverter, and their gates are connected to each other; A p-channel field-effect transistor and an n-channel field-effect transistor having a gate and a drain short-circuited; and the p-channel field-effect transistor and n interposed between the source of the n-channel field-effect transistor and the ground. A constant current circuit for causing a constant current to flow through the channel field effect transistor; and between the source of the n-channel field effect transistor and the internal circuit. An inverting amplifier for dividing an output voltage from the source of the n-channel field-effect transistor. The output voltage of the inverting amplifier is used as a high-potential-side reference voltage of the internal circuit. A semiconductor device configured to use a voltage as a low-potential-side reference voltage of the internal circuit. 8. The semiconductor device according to claim 2, wherein the output voltage from the source of the p-channel field-effect transistor is provided between the source of the p-channel field-effect transistor and the internal circuit and has a low impedance. A semiconductor device further comprising a voltage follower circuit for converting the voltage into a voltage. 9. The semiconductor device according to claim 2, which is interposed between a source of said p-channel field-effect transistor and said internal circuit, and divides an output voltage from a source of said p-channel field-effect transistor. Semiconductor device further comprising a non-inverting amplifier. 10. An internal circuit comprising a high-potential portion receiving a power supply voltage, a ground portion connected to the ground, a plurality of transistors interposed between the high-potential portion and the ground portion, and A reference voltage generation circuit for generating a low-potential-side reference voltage of the circuit, wherein the reference voltage generation circuit is connected to form an inverter, and their gates are connected to each other; A p-channel field-effect transistor and an n-channel field-effect transistor having a gate and a drain short-circuited; and the p-channel field-effect transistor and n interposed between the source of the p-channel field-effect transistor and the ground. A constant current circuit for supplying a constant current to the channel field-effect transistor; and between a source of the p-channel field-effect transistor and the internal circuit. An inverting amplifier for dividing an output voltage from a source of the p-channel field-effect transistor, wherein the output voltage of the inverting amplifier is used as a low-potential-side reference voltage of the internal circuit, while the high-potential A semiconductor device configured to use a voltage of the unit as a high-potential-side reference voltage of the internal circuit.