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JPH11135450A - Method for manufacturing silicon carbide semiconductor device - Google Patents

Method for manufacturing silicon carbide semiconductor device

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Publication number
JPH11135450A
JPH11135450A JP9293720A JP29372097A JPH11135450A JP H11135450 A JPH11135450 A JP H11135450A JP 9293720 A JP9293720 A JP 9293720A JP 29372097 A JP29372097 A JP 29372097A JP H11135450 A JPH11135450 A JP H11135450A
Authority
JP
Japan
Prior art keywords
annealing
silicon carbide
semiconductor device
carbide semiconductor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9293720A
Other languages
Japanese (ja)
Other versions
JP3944970B2 (en
Inventor
Takashi Tsuji
崇 辻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
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Filing date
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Priority to JP29372097A priority Critical patent/JP3944970B2/en
Publication of JPH11135450A publication Critical patent/JPH11135450A/en
Application granted granted Critical
Publication of JP3944970B2 publication Critical patent/JP3944970B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

(57)【要約】 【課題】炭化けい素半導体素子製造のため、イオン注入
をおこない、更にダメージ回復と不純物活性化のため1
500℃以上のアニールをおこなう際の、炭化けい素基
板表面の粗面化による素子特性の劣化を防止する。 【解決手段】(1)アニール後に、例えば水素希釈の塩
酸ガスのようなエッチングガスにより基板表面をエッチ
ングし、平滑化する。(2)アニール前に、例えばアル
ミナのようなアニール温度で安定な薄膜を積層し、アニ
ール後にその薄膜を除去して、初期の表面粗さを保つ。
(57) [Summary] [Implementation] Ion implantation is performed to manufacture a silicon carbide semiconductor device.
This prevents deterioration of device characteristics due to roughening of the surface of the silicon carbide substrate during annealing at 500 ° C. or more. (1) After annealing, the substrate surface is etched and smoothed by an etching gas such as a hydrogen-diluted hydrochloric acid gas. (2) Before annealing, a thin film stable at an annealing temperature such as alumina is laminated, and the thin film is removed after annealing to maintain the initial surface roughness.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は炭化けい素からなる
半導体素子の製造方法に関する。
The present invention relates to a method for manufacturing a semiconductor device made of silicon carbide.

【0002】[0002]

【従来の技術】高周波、大電力の制御を目的として、シ
リコン(以下Siと記す)を用いた電力用半導体素子
(以下パワーデバイスと称する)では、各種の工夫によ
り高性能化が進められている。しかし、パワーデバイス
は高温や放射線等の存在下で使用されることもあり、そ
のような条件下ではSiのパワーデバイスは使用できな
いことがある。
2. Description of the Related Art For the purpose of controlling high frequency and high power, a power semiconductor device (hereinafter referred to as a power device) using silicon (hereinafter referred to as Si) has been improved in performance by various means. . However, the power device may be used in the presence of high temperature or radiation, and under such conditions, the Si power device may not be used.

【0003】また、Siのパワーデバイスより更に高性
能のものを求める声に対して、新しい材料の適用が検討
されている。本提案でとりあげる炭化けい素(以下Si
Cと記す)は広い禁制帯幅(4H型で3.26eV、6
H型で3.02eV)をもつため、高温での電気伝導度
の制御性に優れ、動作上限温度を高くできる。またSi
より約1桁高い絶縁破壊電圧をもつため、オン抵抗を低
減でき、定常状態でのパワーロスを低減できて、高耐圧
素子への適用が可能である。さらに、SiCはSiの約
2倍の電子飽和ドリフト速度をもつので、高周波大電力
制御にも適する。このようなSiCの長所を生かすこと
ができれば、パワーデバイスの飛躍的な特性向上が実現
できると考えられ、現在、MOSFETやダイオード等
が試作されている。
Further, in response to a demand for a device having a higher performance than a Si power device, application of a new material is being studied. Silicon carbide (hereinafter referred to as Si)
The width of the forbidden band (referred to as C) is 3.26 eV for 4H type, 6
Since the H-type has 3.02 eV), the controllability of the electrical conductivity at a high temperature is excellent, and the maximum operating temperature can be increased. Also Si
Since it has a dielectric breakdown voltage that is about one digit higher than that, the on-resistance can be reduced, the power loss in a steady state can be reduced, and application to a high breakdown voltage element is possible. Further, since SiC has an electron saturation drift speed about twice as high as that of Si, it is also suitable for high frequency high power control. If such advantages of SiC can be utilized, it is considered that the characteristics of power devices can be dramatically improved, and MOSFETs, diodes, and the like are currently being prototyped.

【0004】しかし、このようなSiCの優れた物性を
パワーデバイスに応用するためには、Siのプロセス技
術並みに洗練された要素技術が必要となる。すなわち、
SiC基板の表面を鏡面に仕上げた後、SiC薄膜をエ
ピタキシャル成長させたり、その過程でドナーやアクセ
プターをドーピングしたり、金属膜や酸化膜を形成する
等のプロセス技術の確立が必要である。
[0004] However, in order to apply such excellent physical properties of SiC to power devices, element technologies as sophisticated as Si process technologies are required. That is,
After finishing the surface of the SiC substrate to a mirror surface, it is necessary to establish a process technology such as epitaxially growing a SiC thin film, doping a donor or an acceptor in the process, or forming a metal film or an oxide film.

【0005】最も重要なプロセス技術の一つとして、不
純物導入による選択的な不純物領域形成技術がある。そ
の方法には、熱拡散法とイオン注入法がある。Si半導
体素子で広く用いられている熱拡散法は、SiCでは不
純物の拡散係数が非常に小さいために適用が困難であ
る。そのためSiCでは主としてイオン注入が用いられ
る。
One of the most important process techniques is a technique for selectively forming impurity regions by introducing impurities. The method includes a thermal diffusion method and an ion implantation method. The thermal diffusion method widely used for Si semiconductor elements is difficult to apply in SiC because the diffusion coefficient of impurities is very small. Therefore, ion implantation is mainly used in SiC.

【0006】しかし、イオン注入では、結晶にダメージ
が生じる、このダメージの回復と、注入した不純物の活
性化のため、通常1500℃前後の高温中で熱処理する
(以下アニールと呼ぶ)。その結果、ダメージの回復と
ともに不純物の活性化率は向上し、不純物領域の形成が
できる。炭化けい素のイオン注入においては、注入した
不純物の活性化率を向上させるために、800〜900
℃の高温でのイオン注入がおこなわれるが、なお活性化
は十分でなく、より高温でのアニールが必要である。
However, in the ion implantation, a crystal is damaged. In order to recover the damage and activate the implanted impurities, a heat treatment is usually performed at a high temperature of about 1500 ° C. (hereinafter referred to as annealing). As a result, the activation rate of the impurity is improved with the recovery of the damage, and the impurity region can be formed. In the ion implantation of silicon carbide, 800 to 900 to improve the activation rate of the implanted impurities.
Although ion implantation is performed at a high temperature of ℃, activation is still insufficient, and annealing at a higher temperature is required.

【0007】[0007]

【発明が解決しようとする課題】しかし、さらに活性化
率の増大をはかるため、1500℃以上のアニールを行
うと、SiC結晶表面に[1,1,−2,0]方向に走
る凹凸が生じる。そしてこの凹凸はアニール温度を高く
するほど大きくなる。例えば、真空中1500℃のアニ
ールで、表面粗さが平均振幅で約95nmであるのに対
し、1600℃のアニールでは、約200nmになる。
この凹凸は、高温領域においてはSiの蒸気圧が高くな
り表面脱離を生じることによって発生すると考えられ
る。アルゴン中でも、真空中ほどではないが、1500
℃で約55nmになる。
However, when annealing is performed at 1500 ° C. or higher to further increase the activation rate, irregularities running in the [1,1, −2,0] direction occur on the surface of the SiC crystal. . These irregularities increase as the annealing temperature increases. For example, while annealing at 1500 ° C. in vacuum has a surface roughness of about 95 nm in average amplitude, annealing at 1600 ° C. results in about 200 nm.
It is considered that the unevenness is generated by increasing the vapor pressure of Si in the high temperature region and causing surface desorption. Even in argon, although not as much as in vacuum, 1500
It becomes about 55 nm at ° C.

【0008】その結果、表面近傍の移動度が低下した
り、接触抵抗の増大を招いたりするという問題が発生す
る。特に、MOSFETでは、表面近傍に誘起した層で
のキャリアの輸送が重要であり、表面近傍の移動度は表
面状態により大きな影響を受ける。上記の問題点に鑑み
本発明の目的は、イオン注入後に高温でのアニールを行
っても表面が平滑であり、特性の低下を招くことの無い
炭化けい素半導体素子の製造方法を提供することにあ
る。
As a result, there arises a problem that the mobility near the surface is reduced and the contact resistance is increased. In particular, in a MOSFET, carrier transport in a layer induced near the surface is important, and mobility near the surface is greatly affected by the surface state. In view of the above problems, an object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device which has a smooth surface even when annealing at a high temperature after ion implantation and does not cause deterioration in characteristics. is there.

【0009】[0009]

【課題を解決するための手段】上記の課題を解決するた
め本発明は、炭化けい素基板にイオン注入を行い、高温
でアニールを実施する炭化けい素半導体素子の製造方法
において、アニール後に基板表面を平滑化するものとす
る。そのようにすれば、平滑な表面をもつ炭化けい素半
導体素子が得られる。
According to the present invention, there is provided a method of manufacturing a silicon carbide semiconductor device in which ions are implanted into a silicon carbide substrate and annealing is performed at a high temperature. Is smoothed. By doing so, a silicon carbide semiconductor device having a smooth surface can be obtained.

【0010】特に、基板表面を平滑化する工程として、
アニール後に塩酸(HCl)ガスを含むガスのようなエ
ッチングガスによりエッチングするものとする。そのよ
うにすれば、凸部においてはHCl分子が飛来する確率
が高くなるためエッチングレートが大きくなり、凹部に
おいてはHCl分子が飛来する確率が低いためエッチン
グレートが小さいため、平滑化がおこなわれ、炭化けい
素基板に機械的研磨のような応力を残すこともない。
In particular, as a step of smoothing the substrate surface,
After the annealing, etching is performed using an etching gas such as a gas containing hydrochloric acid (HCl) gas. By doing so, the etching rate is increased because the probability of HCl molecules flying in the convex portions is high, and the etching rate is small in the concave portions because the probability of HCl molecules flying is low, so that smoothing is performed. It does not leave stress such as mechanical polishing on the silicon carbide substrate.

【0011】別の方法として、アニール前に基板表面に
例えばアルミナのようなアニール温度で昇華しない薄膜
を積層し、アニール後にその薄膜を除去してもよい。ア
ルミナのような高温で安定な物質で覆ってアニールすれ
ば、Si原子の表面からの蒸発が抑制されて、アニール
時の表面の粗面化が避けられるので、平滑な表面が保た
れる。
As another method, a thin film that does not sublime at an annealing temperature such as alumina may be laminated on the substrate surface before annealing, and the thin film may be removed after annealing. When annealing is performed by covering with a high-temperature stable substance such as alumina, evaporation of Si atoms from the surface is suppressed, and surface roughening during annealing is avoided, so that a smooth surface is maintained.

【0012】また、イオン注入前に基板表面にアニール
温度で昇華しない薄膜を積層し、イオン注入およびアニ
ールを経た後、その薄膜を除去しても良い。
Further, a thin film which does not sublime at the annealing temperature may be laminated on the substrate surface before the ion implantation, and after the ion implantation and annealing, the thin film may be removed.

【0013】[0013]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

[実施例1]図1(a)〜(c)は本発明による炭化け
い素半導体素子の製造工程順に示した主な工程ごとの断
面図である。(0001)面から少し傾けた主面をもつ
n型4H−SiCウェハ1を用意し、約10μmのエピ
タキシャル層2を成長させた。初期の表面粗さは、平均
振幅で約20nmである。このSiCウェハに、900
℃で加速電圧180keV、100keV、50ke
V、総ドーズ量5×1013cm-2の条件でアルミニウム
(Al)のイオン注入を行った[図1(a)]。イオン
注入層3の深さは約0.5μmであり、ほぼ平坦な不純
物プロフィルとなる。
[Embodiment 1] FIGS. 1A to 1C are cross-sectional views showing main steps in the order of manufacturing steps of a silicon carbide semiconductor device according to the present invention. An n-type 4H-SiC wafer 1 having a main surface slightly inclined from the (0001) plane was prepared, and an epitaxial layer 2 of about 10 μm was grown. The initial surface roughness is about 20 nm on average amplitude. On this SiC wafer, 900
At 180 ° C, 100 keV, 50 ke
V, ions of aluminum (Al) were implanted under the conditions of a total dose of 5 × 10 13 cm −2 [FIG. 1 (a)]. The depth of the ion-implanted layer 3 is about 0.5 μm, which results in a substantially flat impurity profile.

【0014】次に、このウェハを真空中において160
0℃で30分間アニールを行った[同図(b)]。この
後、表面粗さは約200nmであった。その後、この表
面を水素(H2 )希釈の1%HClガス中において13
00℃、5分間、エッチングを行った[同図(c)]。
その結果、表面粗さが約40nmに減少した。なお、表
面粗さは、いずれも走査トンネル顕微鏡の観測結果から
算出した。
Next, the wafer is placed in a vacuum at 160
Annealing was performed at 0 ° C. for 30 minutes [FIG. Thereafter, the surface roughness was about 200 nm. Then, the surface was placed in 1% HCl gas diluted with hydrogen (H 2 ) for 13 minutes.
Etching was performed at 00 ° C. for 5 minutes [FIG.
As a result, the surface roughness was reduced to about 40 nm. In addition, the surface roughness was calculated from the observation result of the scanning tunnel microscope.

【0015】この試料について、van der Pauw 法によ
りキャリアの移動度を評価した。すなわち、試料のエピ
タキシャル層上の四隅に、金属マスクを使ったスパッタ
法によりニッケル(Ni)電極を形成する。電極の直径
は200μm、厚さは400nmである。この後、整流
性を除きオーミックな接触とするためアルゴン(Ar)
雰囲気中で1050℃、5分間のアニールをおこなう。
For this sample, the carrier mobility was evaluated by the van der Pauw method. That is, nickel (Ni) electrodes are formed at four corners on the epitaxial layer of the sample by a sputtering method using a metal mask. The diameter of the electrode is 200 μm and the thickness is 400 nm. Thereafter, argon (Ar) is used to make ohmic contact except for rectification.
Anneal at 1050 ° C. for 5 minutes in an atmosphere.

【0016】そして、この結果、移動度は60cm2
Vsと、HClエッチングをおこなわない場合のほぼ二
倍に増大した。また、金属電極とのオーミック接触の接
触抵抗を約20%低減できた。なお、イオン注入の深さ
が約0.5μmあり、ほぼ平坦な不純物プロフィルをも
っていたので、粗面化した表面層をエッチングにより除
去しても、シート抵抗が大幅に増大することはなかっ
た。
As a result, the mobility is 60 cm 2 /
Vs and almost twice as large as those without the HCl etching. Further, the contact resistance of the ohmic contact with the metal electrode could be reduced by about 20%. Since the depth of the ion implantation was about 0.5 μm and had a substantially flat impurity profile, even if the roughened surface layer was removed by etching, the sheet resistance did not increase significantly.

【0017】[実施例2]実施例1と同様にイオン注入
を行った後、イオン注入層3上にスパッタ法によりアル
ミナ(Al2 3 )層4を100nm堆積した[図2
(a)]。その後、実施例1と同様の条件で高温アニー
ルをおこなった。その後、HF溶液によりAl2 3
4を除去した[同図(b)]。
Example 2 After ion implantation was performed in the same manner as in Example 1, an alumina (Al 2 O 3 ) layer 4 was deposited on the ion implantation layer 3 by sputtering to a thickness of 100 nm [FIG.
(A)]. Thereafter, high-temperature annealing was performed under the same conditions as in Example 1. Thereafter, the Al 2 O 3 layer 4 was removed with an HF solution [FIG.

【0018】その結果、表面粗さは、ほぼ初期の値に保
たれた。この試料についても、実施例1と同様にキャリ
ア移動度の評価をおこなったところ、約80cm2 /V
sであった。金属電極とのオーミック接触の接触抵抗も
約30%低減できた。 [実施例3]不純物イオンの注入以前に、表面保護用の
薄膜を堆積しておいても良い。
As a result, the surface roughness was kept almost at the initial value. When the carrier mobility of this sample was evaluated in the same manner as in Example 1, it was found to be about 80 cm 2 / V.
s. The contact resistance of the ohmic contact with the metal electrode was also reduced by about 30%. [Embodiment 3] Before the implantation of impurity ions, a thin film for surface protection may be deposited.

【0019】先ず、スパッタ法によりアルミナ(Al2
3 )を100nm堆積した後に、実施例1と同様なイ
オン注入および高温アニールをおこなった。その後、H
F溶液によりAl2 3 膜を除去した。この場合も、表
面粗さは、ほぼ初期の値に保たれ、キャリア移動度も実
施例2と同程度であった。
First, alumina (Al 2
After depositing O 3 ) to a thickness of 100 nm, the same ion implantation and high-temperature annealing as in Example 1 were performed. Then H
The Al 2 O 3 film was removed by the F solution. Also in this case, the surface roughness was kept almost at the initial value, and the carrier mobility was almost the same as in Example 2.

【0020】[0020]

【発明の効果】以上説明したように本発明によれば、イ
オン注入を行い、高温でアニールを実施する炭化けい素
半導体素子の製造方法において、アニール後に基板表面
を平滑化し、或いはアニール前に基板表面に薄膜を積層
することによって、基板表面の平滑性を保つことによっ
て、表面の平滑な炭化けい素半導体素子とすることがで
きる。その結果、特に表面層のキャリア移動度が増大
し、また、金属電極のオーミックな接触抵抗が低減され
る。これらは、いずれもオン抵抗の低減につながり、半
導体素子の損失低減に大きな寄与をなすことになる。ま
た、作製された半導体装置素子における特性の均一化も
図られる。
As described above, according to the present invention, in a method of manufacturing a silicon carbide semiconductor device in which ion implantation is performed and annealing is performed at a high temperature, the surface of the substrate is smoothed after annealing, or the substrate is etched before annealing. By stacking a thin film on the surface, the smoothness of the substrate surface is maintained, whereby a silicon carbide semiconductor element having a smooth surface can be obtained. As a result, the carrier mobility of the surface layer is particularly increased, and the ohmic contact resistance of the metal electrode is reduced. All of these lead to a reduction in the on-resistance and make a great contribution to reducing the loss of the semiconductor element. Further, the characteristics of the manufactured semiconductor device element can be made uniform.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)はイオン注入後、(b)はアニール後、
(c)はHClによるエッチング後のSiC基板の模式
的断面図
FIG. 1 (a) after ion implantation, (b) after annealing,
(C) is a schematic cross-sectional view of the SiC substrate after etching with HCl.

【図2】(a)はイオン注入、Al2 3 堆積後、
(b)はアニール、Al2 3 除去後のSiC基板の模
式的断面図
FIG. 2A shows ion implantation and Al 2 O 3 deposition,
(B) is a schematic cross-sectional view of the SiC substrate after annealing and removal of Al 2 O 3 .

【符号の説明】[Explanation of symbols]

1…SiCウェハ 2…エピ層 3…イオン注入層 4…Al2O31 ... SiC wafer 2 ... Epi layer 3 ... Ion implantation layer 4 ... Al 2 O 3 layer

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】炭化けい素基板にイオン注入を行い、高温
でアニールを実施する炭化けい素半導体素子の製造方法
において、アニール後に基板表面を平滑化することを特
徴とする炭化けい素半導体素子の製造方法。
1. A method of manufacturing a silicon carbide semiconductor device, comprising: ion-implanting a silicon carbide substrate and performing annealing at a high temperature, wherein the substrate surface is smoothed after annealing. Production method.
【請求項2】基板表面を平滑化する工程として、アニー
ル後にエッチングガスによりエッチングすることを特徴
とする請求項1記載の炭化けい素半導体素子の製造方
法。
2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step of smoothing the surface of the substrate includes etching with an etching gas after annealing.
【請求項3】エッチングガスとして塩酸ガスを含むガス
を用いることを特徴とする請求項2記載の炭化けい素半
導体素子の製造方法。
3. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein a gas containing hydrochloric acid gas is used as an etching gas.
【請求項4】炭化けい素基板にイオン注入を行い、高温
でアニールを実施する炭化けい素半導体素子の製造方法
において、アニール前に基板表面にアニール温度で昇華
しない薄膜を積層し、アニール後にその薄膜を除去する
ことを特徴とする炭化けい素半導体素子の製造方法。
4. A method for manufacturing a silicon carbide semiconductor device in which ions are implanted into a silicon carbide substrate and annealing is performed at a high temperature, wherein a thin film that does not sublimate at the annealing temperature is laminated on the substrate surface before annealing, and after the annealing, A method for manufacturing a silicon carbide semiconductor device, comprising removing a thin film.
【請求項5】炭化けい素基板にイオン注入を行い、高温
でアニールを実施する炭化けい素半導体素子の製造方法
において、イオン注入前に基板表面にアニール温度で昇
華しない薄膜を積層し、イオン注入およびアニールを経
た後、その薄膜を除去することを特徴とする炭化けい素
半導体素子の製造方法。
5. A method for manufacturing a silicon carbide semiconductor device in which ions are implanted into a silicon carbide substrate and annealing is performed at a high temperature, wherein a thin film that does not sublime at the annealing temperature is laminated on the surface of the substrate before the ion implantation. And a method of manufacturing a silicon carbide semiconductor device, wherein the thin film is removed after annealing.
【請求項6】薄膜として、アルミナを成膜することを特
徴とする請求項4または5に記載の炭化けい素半導体素
子の製造方法。
6. The method for manufacturing a silicon carbide semiconductor device according to claim 4, wherein alumina is formed as a thin film.
JP29372097A 1997-10-27 1997-10-27 Method for manufacturing silicon carbide semiconductor device Expired - Lifetime JP3944970B2 (en)

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JP2000012482A (en) * 1998-06-22 2000-01-14 Fuji Electric Co Ltd Method for manufacturing silicon carbide semiconductor device
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Publication number Priority date Publication date Assignee Title
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JP2002314071A (en) * 2001-04-18 2002-10-25 Denso Corp Method for manufacturing silicon carbide semiconductor device
JP2003068669A (en) * 2001-08-27 2003-03-07 Denso Corp Method and device for heat treatment to semiconductor wafer
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US7867882B2 (en) 2006-10-30 2011-01-11 Sumitomo Electric Industries, Ltd. Method of manufacturing silicon carbide semiconductor device
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