JPH1051300A - Pll frequency synthesizer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the PLL frequency synthesizer in which the C/N of a voltage controlled oscillator is improved, when a phase comparator is in operation at a blind sector. SOLUTION: The PLL frequency synthesizer having a loop filter 5 receiving a phase comparison output outputted from a phase comparator 4 and having a voltage controlled oscillator 2 whose oscillating frequency 18 controlled, based on an output voltage of the loop filter 5 is provided with an attenuation circuit 10 that receives an output of the loop filter 5 and controls the oscillating frequency of the voltage controlled oscillator 2 by its output, an the output voltage from the attenuation circuit 10 is used for a frequency control voltage of the voltage controlled oscillator 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a PLL frequency synthesizer.

[0002]

2. Description of the Related Art A conventional PLL frequency synthesizer is shown in FIG.
As shown in the figure, the phase of the oscillation output from the reference signal oscillator 1 is compared with the phase of the oscillation output of the voltage controlled oscillator 2 divided by the frequency divider 3 in the phase comparator 4, and the phase comparison output is a low pass filter Loop filter 5 consisting of
To control the oscillation frequency of the voltage controlled oscillator 2 by applying the output voltage of the loop filter 5 to the voltage controlled oscillator 2 as a frequency control voltage. The phase of the oscillation output of the oscillator 2 is controlled so as to have a predetermined relationship with the phase of the oscillation output from the reference signal oscillator 1.

In the case of a front end using a PLL frequency synthesizer as a local oscillator of an FM receiver, a PLL is used.
C / of the voltage controlled oscillator 2 constituting the frequency synthesizer
N is related to the S / N of the FM receiver. On the other hand, when tuning in FM broadcast reception, that is, PLL
When the frequency synthesizer is locked, the PLL frequency synthesizer is operating in the dead zone of the phase comparator 4, so that the phase comparator 4 does not perform the phase comparison operation.
The phase synchronization operation is not performed on the noise component Vn output from the loop filter 5 in FIG. As a result, the noise component Vn output from the loop filter 5 is directly applied to the voltage controlled oscillator as a frequency control voltage.

On the other hand, a variable capacitance diode is used to control the oscillation frequency of the voltage controlled oscillator 2, and the characteristic of the capacitance of the variable capacitance diode with respect to the applied voltage is not linear, as shown in FIG. , Based on changes in applied voltage. Therefore, the sensitivity of the voltage-controlled oscillator 2 increases on the lower frequency side of the reception FM frequency band (the frequency side of 76 MHz in Japan).

[0005]

However, when the PLL frequency synthesizer operates in the dead band of the phase comparator as described above and the noise of the loop filter is directly applied to the voltage-controlled oscillator, the C of the voltage-controlled oscillator is reduced. / N deteriorates, and when used in a local oscillator of an FM receiver, there is a problem that the S / N of the FM receiver deteriorates.

According to the present invention, a P / N having improved C / N of a voltage controlled oscillator when the phase comparator is operating in a dead zone is provided.
An object of the present invention is to provide an LL frequency synthesizer.

[0007]

In a PLL frequency synthesizer according to the present invention, a loop filter having a phase comparison output output from a phase comparator as an input and an oscillation frequency controlled based on an output voltage of the loop filter. In a PLL frequency synthesizer having a voltage controlled oscillator,
An output of the loop filter is provided as an input, and an attenuation circuit for controlling the oscillation frequency of the voltage controlled oscillator with the output is provided.

[0008] The attenuation circuit in the PLL frequency synthesizer according to the present invention is characterized by comprising an emitter follower.

According to the PLL frequency synthesizer of the present invention, the output of the loop filter is attenuated by the attenuator and applied to the voltage-controlled oscillator as a frequency control voltage, so that the phase comparator operates in a dead zone. Sometimes, the attenuated frequency control voltage is applied to the voltage-controlled oscillator, and the C / C
N is improved.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a PLL frequency synthesizer according to the present invention will be described with reference to embodiments. FIG. 1 is a block diagram showing a configuration of a PLL frequency synthesizer according to one embodiment of the present invention.

The PLL frequency synthesizer according to one embodiment of the present invention compares the phase of the oscillation output from the reference signal oscillator 1 with the phase of the oscillation output of the voltage controlled oscillator 2 divided by the frequency divider 3. The phase is compared in the device 4,
The phase comparison output is supplied to a loop filter 5 composed of a low-pass filter and converted into a voltage, and the output voltage of the loop filter 5 is supplied to an attenuation circuit 10 to be attenuated.

The output voltage from the loop filter 5 attenuated in the attenuation circuit 10 is applied as a frequency control voltage to the voltage controlled oscillator 2 to control the oscillation frequency of the voltage controlled oscillator 2, and the frequency is divided by the frequency divider 3. Voltage controlled oscillator 2
Is controlled such that the phase of the oscillation output of the reference signal oscillator 1 has a predetermined relationship with the phase of the oscillation output from the reference signal oscillator 1.

As shown in FIG. 2, the loop filter 5 comprises an operational amplifier 51 in which a series circuit of a capacitor 52 and a resistor 53 is connected to a feedback path and an input is applied via a resistor 54. The attenuating circuit 10 is composed of an active low-pass filter, and the transistor 11 and the transistor 1 driven by the output voltage of the loop filter 5
An emitter follower composed of resistors 12 and 13 connected in series to the emitter
The output voltage of the loop filter 5 is attenuated by a ratio based on the resistance value of 3 and the attenuated voltage is supplied to the voltage controlled oscillator 2 as a frequency control voltage.

In the PLL frequency synthesizer according to the embodiment of the present invention configured as described above, the output voltage of the loop filter 5 includes the resistance value of the resistor 12 and the resistance value of the resistor 13.
And is applied to the voltage-controlled oscillator 2 as a frequency control voltage.

Therefore, even when the phase comparator 4 of the PLL frequency synthesizer is operating in the dead zone, the frequency control voltage applied to the voltage controlled oscillator 2 is attenuated and therefore applied to the voltage controlled oscillator 2. The noise component is similarly attenuated, and the C / N of the voltage controlled oscillator 2 is improved.

[0016]

As described above, the PL according to the present invention is
According to the L frequency synthesizer, the noise generated in the loop filter when the phase comparator of the PLL frequency synthesizer is operating in the dead zone is attenuated by the attenuation circuit and applied as the frequency control voltage of the voltage controlled oscillator. The effect that the C / N of the voltage controlled oscillator is improved can be obtained.

Further, an effect is obtained that the S / N of a receiver using the PLL frequency synthesizer according to the present invention as a local oscillator is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a PLL frequency synthesizer according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a loop filter and an attenuation circuit in the PLL frequency synthesizer according to one embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional PLL frequency synthesizer.

FIG. 4 is a characteristic diagram of a variable capacitance diode used in a voltage controlled oscillator.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Reference signal oscillator 2 Voltage controlled oscillator 3 Divider 4 Phase comparator 5 Loop filter 10 Attenuation circuit 11 Transistor 12 and 13 Resistance

Claims (2)

[Claims] 1. A PLL frequency synthesizer comprising: a loop filter having a phase comparison output output from a phase comparator as an input; and a voltage controlled oscillator whose oscillation frequency is controlled based on an output voltage of the loop filter. A PLL frequency synthesizer comprising an attenuating circuit that receives an output of a filter and controls an oscillation frequency of a voltage-controlled oscillator with the output. 2. The PLL frequency synthesizer according to claim 1, wherein the attenuation circuit comprises an emitter follower.