JPH10198316A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device by which a liquid crystal panel of a large load capacity can be driven with a simple circuit constitution, without using an expensive IC or the like, and without impairing the designated quality of images. SOLUTION: In the case where both the common electrode (VCOM) and the control electrode (VL) of a liquid crystal panel 10 are driven by a common voltage driving circuit 14 and a control voltage driving circuit 15 on the basis of the alternating pulse from an alternating pulse generating circuit 13, a feedback system consisting of a difference detecting circuit 16 and an adding circuit 17 is constituted in such a way that the difference between the input signal and the output signal of the control voltage driving circuit 15 is eliminated. Thus, the variation due to the image signal or the like of the AC voltage to be supplied to the electrodes VCOM, VL of the liquid crystal panel 10 can be restrained and stabilized, so that a good image can be displayed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device capable of driving a liquid crystal panel having a large load capacity without deteriorating image quality.

[0002]

2. Description of the Related Art In recent years, liquid crystal projectors using liquid crystal panels have been actively developed with the demand for large-screen, small-sized and lightweight display devices. As is well known, a liquid crystal projector uses a liquid crystal panel as a light valve, displays an image by changing the transmittance of light from a light source according to a video signal, and displays this image on a screen by a projection lens. Is what you do.

FIG. 6 is a block diagram showing a configuration of a liquid crystal display device used for a liquid crystal projector or the like using a color liquid crystal panel.

In FIG. 6, reference numeral 10 denotes an active matrix type color liquid crystal panel, which outputs video signals of red (R), green (G), and blue (B) to a video output circuit 11.
The clock and various timing pulses are supplied from a clock / timing pulse generating circuit 12. On the other hand, the alternating voltage from the alternating pulse generating circuit 13 is supplied to the common electrode VCOM of the liquid crystal panel 10 via the common voltage driving circuit 14, and the alternating voltage is supplied to the control electrode VL via the control voltage driving circuit 15. Are also supplied.

FIG. 7 is a conceptual diagram of the color liquid crystal panel 10. In the figure, Yn, Yn + 1, ... are gate lines, Xn, ... are data lines (actually arranged in a trio corresponding to video signals of red, green, and blue),
Tn, Tn + 1,... Are thin film transistors (TFTs) serving as switching elements, Sn, Sn + 1,.
M is a common electrode. Are storage capacitors, and one end of the storage capacitors Cn, Cn + 1,...
, Sn + 1,... Are connected to the pixel electrode side, and the other end is connected to the previous gate line Yn-1, Yn,.

Reference numeral 21 denotes a data driver, which samples and holds a video signal from the video output circuit 11 and writes the video signal to a pixel on a line selected by the gate driver 22. In addition, gate dryer 2
In No. 2, an alternating pulse input from the terminal of the control electrode VL is supplied to a gate line other than the selected gate line. An alternating pulse is supplied to the common electrode VCOM of the liquid crystal cells Sn, Sn + 1,....

FIGS. 8A to 8C show the relationship between a video signal, a common voltage (VCOM voltage) and a control voltage (VL voltage). Vsig in FIG. 8A is a video output circuit 11.
V + and V- represent positive and negative signals, respectively, VD is the lowest voltage, VU is the highest voltage, and the polarity is inverted every horizontal cycle.
It is a so-called AC drive. VC is the AC center voltage of Vsig, VD and VU are set so as to be vertically symmetrical about VC, and VD and VU are set for both positive and negative polarities.
VU is set the same so that the data driver 21 can operate with a low voltage source. Since the transmittance of the liquid crystal is determined by the applied voltage of the liquid crystal, that is, by the potential difference between the video signal voltage and the common voltage, the VCOM voltage for the video signal Vsig in FIG. 8A is as shown in FIG. 8B. Thus, an alternating pulse whose polarity is inverted every horizontal cycle is obtained. The example in the figure is
This shows the case of the normally white mode in which the potential difference is minimized at the white level and the transmittance is increased. As shown in FIG. 8C, the VL voltage is supplied at the same timing and at the same amplitude in order to maintain the same potential difference as the VCOM voltage.

FIG. 9 shows an example of a circuit configuration for driving the common electrode VCOM and the control electrode VL.

In FIG. 9, an alternating pulse from an alternating pulse generating circuit 13 (see FIG. 6) is input to an input terminal Vin, and the input terminal Vin is connected to a common voltage driving circuit 14 and a control voltage driving circuit 15. In between, the level shift circuit 3
1, a differential amplifier circuit 32 and a buffer circuit 33 are interposed. Vc is a control terminal for controlling the degree of amplification of the differential amplifier circuit 32, VDD1, VDD2, VEE1, and VEE2 are power terminals, VCOM is a common voltage output terminal, and VL is a control voltage output terminal.

The alternating pulse from the alternating pulse generating circuit 13 is input to a terminal Vin, and the transistors 101 and 10
2. The DC level is shifted by a level shift circuit 31 composed of resistors R11 to R13,
Supplied to The differential amplifier circuit 72 includes a transistor 103
, And amplifies the amplitude of the level-shifted alternating pulse. At this time, the terminal Vc
The amplitude is adjusted by the control voltage from the controller. afterwards,
The data is supplied to the buffer circuit 33. The buffer circuit 33
The first buffer includes a transistor 107 and a resistor R21, and the second buffer includes a transistor 106 and a resistor R20. In the buffer circuit 33, the alternating pulse is supplied from the transistor 107 of the first buffer as a common voltage to the transistor 106 of the second buffer.
Is output as a VL voltage.

The common voltage is supplied to a common voltage driving circuit 14.
, A DC bias is applied by the resistors R22 to R24 and the variable resistor VR1 via the capacitor C11, and S is constituted by transistors 108 to 111 and resistors R25 to R28.
The common electrode VCOM of the liquid crystal panel 10 is driven by the EPP circuit.

Similarly, the VL voltage is controlled by the control voltage driving circuit 15 via the capacitor C12 and the resistors R29 to R3.
1. DC bias is given by the variable resistor VR2,
The control electrode VL of the liquid crystal panel 10 is a SEPP circuit composed of transistors 112 to 115 and resistors R32 to R35.
Drive.

However, in a conventional circuit as shown in FIG.
The capacitance of the common electrode VCOM and the control electrode VL was large, especially the capacitance of the control electrode VL was large, and the liquid crystal panel could not be driven sufficiently. FIG. 10 shows the capacitance component Cf of the control electrode VL of the liquid crystal panel 10. Due to these capacitance components Cf and the like, an impedance is added to the output terminals of the transistors 114 and 115, and the added impedance is affected by the level of the video signal supplied to the liquid crystal panel 10, and the impedance is changed. Will change in amplitude. Further, the gate line in the liquid crystal panel 10 to which the VL voltage is supplied has a wiring impedance, which causes a problem that the VL voltage is affected by the video signal and the display quality of an image is significantly deteriorated. This is due to the fact that the load on the output terminal becomes heavier or lighter depending on the level of the video signal, and the amplitude of the VL voltage changes.

FIGS. 11A and 11B show an example of a change in the control voltage (the VL voltage) when the level of the video signal Vsig changes. The waveforms of FIGS. 11A and 11B show examples of actually measured waveforms when a screen as shown in FIG. 12 is displayed. FIG.
Vsig in (a) is a video signal output from the video output circuit 11, and V + and V- represent positive and negative signals, respectively. The VL voltage at that time is shown in FIG. When the video level changes near a in FIG. 11A, the amplitudes VB and VW of the VL voltage are different between the black level period and the white level period. This is because the polarity of the video signal Vsig is inverted every field, so that the potential always changes when a signal is written to the liquid crystal, and the current corresponding to this change flows through the auxiliary capacitance Cn (see FIG. 7). This is because the liquid crystal panel drive voltage also changes. As a result, the contrast on the screen and the brightness change.

In order to solve such a problem, conventionally, an expensive IC or the like having excellent driving capability had to be used.

[0016]

As described above, in the conventional apparatus, when driving a liquid crystal panel having a large capacity of the common electrode VCOM and the control electrode VL, particularly a large capacity of the control electrode VL, the conventional driving circuit is not used. Influenced by the video signal,
There has been a problem that display quality of an image is significantly impaired. In order to avoid this problem, an expensive IC or the like had to be used.

In view of the above problems, the present invention provides a liquid crystal display device capable of driving a liquid crystal panel having a large load capacity with a simple circuit configuration without using an expensive IC or the like and without deteriorating image display quality. The purpose is to do.

[0018]

Means for Solving the Problems The invention described in claim 1 is:
An active matrix type liquid crystal panel, an alternating pulse generating means for generating an alternating pulse, a video output means for supplying a video signal to the liquid crystal panel, and inputting an alternating pulse from the alternating pulse generating means, First driving means for supplying an alternating pulse to a common electrode; second driving means for receiving an alternating pulse from the alternating pulse generating means and supplying an alternating pulse to a control electrode of the liquid crystal panel; Or a difference detection means for detecting a difference between an input signal and an output signal of the second drive circuit; and a difference signal from the difference detection means for an alternating pulse input to the first drive means and the second drive means. And an adding means for performing addition.

According to the first aspect of the present invention, the common electrode (VCOM) and the control electrode (VL) of the liquid crystal panel having a large load capacitance.
Is driven by an alternating pulse, the feedback circuit is configured to eliminate the difference between the input signal and the output signal of the first or second driving circuit. It is possible to suppress and stabilize, and a good image can be displayed without using an expensive IC.

According to a second aspect of the present invention, the liquid crystal display device according to the first aspect further includes a second adding means for adding a video signal from the video output means to a difference signal from the difference detection means. It is characterized by having done.

According to the second aspect of the present invention, in addition to the feedback system of the first aspect, a second signal for adding a video signal to an alternating pulse input to the first driving means and the second driving means. , The influence of the video signal on the alternating drive pulse can be almost eliminated, and a good image can be displayed without using an expensive IC.

[0022]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a liquid crystal display device according to an embodiment of the present invention. 6 is different from the conventional liquid crystal display device of FIG. 6 in that a difference detection circuit 16 and an addition circuit 17 are added, but the other components are the same, and the same portions are denoted by the same reference numerals.

In FIG. 1, the liquid crystal display device includes a color liquid crystal panel 10, a video output circuit 11, a clock / timing pulse generation circuit 12, and an alternating pulse generation circuit 13
, A common voltage drive circuit 14 and a control voltage drive circuit 15
, A difference detection circuit 16 and an addition circuit 17.

The color liquid crystal panel 10 is an active matrix type liquid crystal panel, to which video signals of red (R), green (G), and blue (B) are supplied from a video output circuit 11, and a clock timing. A clock and various timing pulses are supplied from the pulse generation circuit 12.

On the other hand, the alternating pulse generating circuit 13 generates an alternating pulse. The alternating pulse is input to one input terminal of the adder circuit 17, and a difference signal (from the other input terminal) to this alternating pulse is input. (To be described later) are added and supplied to the common voltage drive circuit 14 and the control voltage drive circuit 15. Common voltage drive circuit 14 and control voltage drive circuit 15
Respectively constitute a first driving means and a second driving means. The common voltage drive circuit 14 and the control voltage drive circuit 15 respectively amplify the alternating pulse passed through the adder circuit 17 to an appropriate amplitude and supply the amplified pulse to the common electrode VCOM and the control electrode VL of the liquid crystal panel 10.

The difference detection circuit 16 includes the control voltage drive circuit 1
5 is detected, and the difference signal is supplied to the other input terminal of the adder circuit 16. The adding circuit 17 adds the difference signal from the difference detecting circuit 16 to the alternating pulse from the alternating pulse generating circuit 13 and inputs the added output to the common voltage driving circuit 14 and the control voltage driving circuit 15. Like that. That is, a feedback circuit is configured so that the difference between the input signal and the output signal of the control voltage drive circuit 15 is eliminated,
The common electrode VCOM and the control electrode VL of the liquid crystal panel 10
To drive.

According to the configuration of FIG. 1, the common electrode (VCOM) and the control electrode (VL) of the liquid crystal panel 10 having a large load capacitance.
Is driven by an alternating pulse, the feedback system is configured so that the difference between the input signal and the output signal of the control voltage driving circuit 15 is eliminated. It is possible to suppress and stabilize, and a good image can be displayed without using an expensive IC.

FIG. 2 shows an example of a circuit configuration for driving the common electrode VCOM and the control electrode VL.

In FIG. 2, an alternating pulse from the alternating pulse generating circuit 13 is input to an input terminal Vin, and a common voltage driving circuit 14 and a control voltage driving circuit 15 A level shift circuit 31, a differential amplifier circuit 32, and a buffer circuit 33 are interposed.
Further, a difference detection circuit 16 is provided between the output terminal of the control voltage drive circuit 15 and the input terminal of the differential amplifier circuit 32. Vc is a control terminal for controlling the degree of amplification of the differential amplifier circuit 32, VDD1, VDD2, VEE1, and VEE2 are power terminals, VCOM is a common voltage output terminal, and VL is a control voltage output terminal.

The alternating pulse output from the alternating pulse generating circuit 13 is input to a terminal Vin,
The DC level of the alternating pulse is shifted by a level shift circuit 31, which is constituted by 1, 102 and resistors R11 to R13.

The level shift circuit 31 has an input terminal Vin connected to the base of the transistor 101, a collector connected to the power supply terminal VDD1, an emitter connected to one end of a series circuit of resistors R11 and R12, and the other end connected to the power supply. Connected to the terminal VEE2 and the connection point of the resistors R11 and R12 is the transistor 102
Of the power supply terminal VDD1
And the emitter is connected to the power supply terminal V via a resistor R13.
EE2 is connected, and the DC level of the alternating pulse at the input terminal Vin is level-shifted by the division ratio of the resistors R11 and R12 and supplied to the base of the transistor 102.

The alternating pulse from the level shift circuit 31 is supplied to a differential amplifier circuit 32. Differential amplifier circuit 72
Are composed of transistors 103 to 105 and resistors R14 to R19, and amplify the amplitude of the level-shifted alternating pulse.

The differential amplifier circuit 32 has a pair of transistors 104 and 105 forming a differential pair.
4 is connected to the power supply terminal VDD2, its base is connected to the reference potential point via the resistor R17, and the transistor 1
05 is connected to the power terminal VDD2 via a resistor R16.
And its base is connected to a reference potential point via a resistor R18 while being connected to a control terminal Vc via a resistor R19.
The commonly connected emitters of the transistors 104 and 105 are connected to the collector-emitter path of the transistor 103 and the resistor R.
15 is connected in series to the power supply terminal VEE2, and the emitter output (alternating pulse) of the transistor 102 of the level shift circuit 31 is input to the emitter of the transistor 103 via the resistor R14. The amplified alternating pulse is output. At this time, the amplitude is adjusted by the control voltage from the terminal Vc. After that, it is supplied to the buffer circuit 33.

The buffer circuit 33 includes a transistor 107
And a first buffer including a resistor R21 and a second buffer including a transistor 106 and a resistor R20.

The first buffer has the collector of the transistor 107 connected to the power supply terminal VDD2, the emitter connected to the reference potential point via the resistor R21, and the output of the emitter (alternating pulse) as the common voltage. It is supplied to the drive circuit 14. The second buffer has the collector of the transistor 106 connected to the power supply terminal VDD2, the emitter connected to the reference potential point via the resistor R20, and the output of the emitter (alternating pulse) as the VL voltage as the VL voltage. To supply.

The common voltage is applied to the common voltage driving circuit 14.
At step (1), a DC bias is applied by a first DC bias circuit including resistors R22 to R24 and a variable resistor VR1 via a capacitor C11, and transistors 108 to 111 and a resistor R25 are applied.
The common electrode VCOM of the liquid crystal panel 10 is driven by the first SEPP circuit constituted by R28.

The first DC bias circuit includes a resistor R22 and a variable resistor V between a power supply terminal VDD2 and a power supply terminal VEE1.
R1 and a series circuit of a resistor R23 are connected, and a variable resistor VR is connected.
The configuration is such that the potential (DC bias) of the first sliding terminal is applied to the common voltage (alternating pulse) from the capacitor C11 via the resistor R24. In the first SEPP circuit, the collectors of the transistors 108 and 109 are connected to power supply terminals VDD2 and VEE1, respectively, and their bases are connected to a common voltage (alternating pulse) from the capacitor C11.
The emitter of the transistor 108 is connected to the power supply terminal VEE1 via the resistor R25, the emitter of the transistor 109 is connected to the power supply terminal VDD2 via the resistor R26,
The emitter outputs of the transistors 108 and 109 are complementarily connected to the transistors 111 and 110, respectively.
The resistors R27 and R28 are connected in series between the emitters of the transistors 110 and 111, the collector of the transistor 110 is connected to the power supply terminal VDD2, and the collector of the transistor 111 is connected to the power supply terminal VEE1.
The configuration is such that a push-pull output is supplied to the common electrode VCOM from the connection point of the resistors R27 and R28.

Similarly, the VL voltage is controlled by the control voltage drive circuit 15 via the capacitor C12 and the resistors R29 to R3.
1. A DC bias is applied to a second DC bias circuit by a variable resistor VR2, and transistors 112 to 11
5. The control electrode VL of the liquid crystal panel 10 is driven by a second SEPP circuit composed of resistors R32 to R35.

The second DC bias circuit includes a resistor R29 and a variable resistor VR2 between a reference potential point and a power supply terminal VEE2.
, And a series circuit of a resistor R30 and a variable resistor VR2
Is applied to the VL voltage (alternating pulse) from the capacitor C12 via the resistor R31. In the second SEPP circuit, the collectors of the transistors 112 and 113 are connected to a reference potential point and a power supply terminal VEE2, respectively, and their bases are connected to the VL voltage (alternating pulse) from the capacitor C12.
, The emitter of the transistor 112 is connected to the power supply terminal VEE2 via the resistor R32, the emitter of the transistor 113 is connected to the reference potential point via the resistor R33, and the emitter outputs of the transistors 112 and 113 are complementarily connected. , The resistors R34 and R35 are connected in series between the emitters of the transistors 114 and 115, the collector of the transistor 114 is connected to the reference potential point, and the collector of the transistor 115 is connected to the power supply terminal. Connect to VEE2 and connect resistor R3
4, Push-pull output from the connection point of R35 to control electrode VL
It is configured to be supplied to.

The second SEP of the control voltage drive circuit 15
The difference signal between the input signal (a) at the input terminal of the P circuit (base of the transistor 112) and the output signal (b) at the output terminal VL (connection point of the resistor R34 and the resistor R35) of the second SEPP circuit. The difference signal between the two signals supplied to the differential amplifier circuit 3 is supplied to the differential amplifier circuit 3.
The current is supplied to the emitter of the second current source transistor 103 (feedback).

The difference detection circuit 16 connects the resistor R52, the collector-emitter path of the transistor 116, and the resistor R51 in series between the reference potential point and the power supply terminal VEE2,
The input signal (a) is input to the base of the transistor 116, the emitter is connected to the base of the transistor 117 via a series circuit of the capacitor C1 and the resistor R53, and the collector is connected to the reference potential point via the resistor R56. The emitter is connected to the power supply terminal VEE2 via the resistor R55, the collector is connected to the base of the transistor 118,
Connecting the collector of transistor 118 to the reference potential point,
The emitter is connected to the power supply terminal VEE2 via the resistor R57, the emitter output of the transistor 118 is input to the base of the output transistor 119 via the DC cut capacitor C2, and the collector is connected to the reference potential point. Is connected to the power supply terminal VEE2 via the resistor R60, and the resistor R60 is connected between the base of the transistor 119 and the reference potential point.
59, the resistor R58 is connected between the base and the power supply terminal VEE2, the base bias of the transistor 119 is set by the resistors R59 and R58, and the emitter output is connected to the resistor R61.
Through the current source transistor 1 of the differential amplifier circuit 32
03 is added to the emitter. At the emitter of the current source transistor 103, the output from the difference detection circuit 16 is added to the level-shifted alternating pulse from the level shift circuit 31.

Next, the operation of the drive circuit of FIG. 2 will be described with reference to FIG. FIG. 3 is an operation waveform diagram of the drive circuit of FIG.

First, the input signal of the control voltage drive circuit 15
(a) and the output signal (b) are input to the difference detection circuit 16.
The input signal (a) is an alternating pulse as shown in FIG. 3 (a), and the output signal (b) is as shown in FIG. 3 (b) when the difference detection circuit 16 is not connected. The waveform is distorted due to the capacitance component. The input signal (a) is inverted by an inverting circuit including the transistor 116 and the resistors R51 and R52, as shown in FIG. 3 (c).
Is added to the output signal (b) by the resistors R53 and R54 via the capacitor C1, and the difference signal (d) shown in FIG.
Is obtained. Next, the transistor 117, the resistors R55, R
The signal is inverted and amplified by the inverting amplifier circuit 56, as shown in FIG. 3 (e), and is output via the emitter followers of the transistors 118 and 119.

This differential signal (e) is input to the differential amplifier circuit 32 via the resistor R61,
It is added to the original alternating pulse input via 14. Therefore, since a feedback loop can be formed so that the difference signal (d) between the input signal (a) and the output signal (b) of the control voltage driving circuit 15 disappears, the influence of the conventional video signal shown in FIG. Can be eliminated. Also,
Since the difference detection circuit 16 can be composed of inexpensive discrete components, it is not necessary to use an expensive IC or the like as in the related art, and an economic effect can be obtained.

FIG. 4 is a block diagram showing a liquid crystal display device according to another embodiment of the present invention.

In FIG. 4, the video output circuit 1 is provided on the output line of the difference detection circuit 16 in the liquid crystal display device of FIG.
An addition circuit 18 serving as second addition means for adding the video signal from 1 is provided, and the video signal is added to the difference signal from the difference detection circuit 16 and then input to the addition circuit 17. Things. Other configurations are the same as those in FIG.

According to the configuration shown in FIG. 4, in addition to the feedback system including the difference detection circuit 16 and the addition circuit 17 shown in FIG. 1, in addition to the alternating pulse input to the common drive circuit 14 and the control voltage drive circuit 15, Since the addition circuit 18 for adding the video signal is provided, the effect of the video signal on the alternating drive pulse can be almost eliminated, and a good image can be displayed without using an expensive IC.

FIG. 5 shows the common electrode V corresponding to FIG.
An example of a circuit configuration for driving the COM and the control electrode VL is shown.
Since the addition circuit 18 for adding the video signal is added to the difference detection circuit 16 in the circuit configuration example of FIG. 2, the description of the same parts as in FIG. 2 will be omitted.

In FIG. 5, the adder circuit 18 converts the R, G, and B signals from the video output circuit 11 into resistors R62 and R62, respectively.
63, R64, and these resistors R62, R63, R64
And an output terminal of the differential detection circuit 16 is connected to the collector output terminal of the inverting amplification transistor 117 in the difference detection circuit 16 via a resistor R65 and a capacitor C3 in series. Has become.

In the configuration of FIG. 5, the video output circuit 11
, Green, and blue signals (R, G, B) from the resistor R62.
R64 and the output (collector output of the transistor 117) (e) of the inverting amplifier of the difference signal (d) via the resistor R65 and the capacitor C3. As described above, by adding the video signal to the difference signal (e) and driving the control electrode (VL) of the liquid crystal panel 10, the influence of the video signal due to the wiring impedance of the gate line in the liquid crystal panel 10 can be removed. And better image display can be performed.

In the embodiment shown in FIGS. 1 and 4, the difference between the input signal and the output signal of the control voltage driving circuit 15 is detected, and the difference signal is added to the input alternating pulse from the alternating pulse generating circuit 13. Although the present invention is not limited to this, the present invention is not limited to this, and a configuration is employed in which a difference between an input signal and an output signal of the common voltage driving circuit 14 is detected and the difference signal is added to an input alternating pulse from the alternating pulse generating circuit 13. Is also good.

[0053]

As described above, according to the present invention, when the common electrode (VCOM) and the control electrode (VL) of the liquid crystal panel having a large load capacitance are driven by the alternating pulse, the input of the VCOM, VL drive circuit is performed. Since the feedback system is configured such that the difference between the signal and the output signal is eliminated, the fluctuation of the alternating voltage supplied to the VCOM and VL electrodes can be suppressed, and a good image can be displayed without the influence of the video signal. Further, by adding and correcting the video signal, the influence of the video signal can be almost eliminated. Since it can be composed of low-cost discrete components, it is not necessary to use an expensive IC or the like as in the related art, and an economical effect can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a liquid crystal display device according to one embodiment of the present invention.

FIG. 2 is a circuit diagram showing a circuit configuration of a main part of FIG. 1;

FIG. 3 is a waveform chart for explaining the operation of FIG. 2;

FIG. 4 is a block diagram showing a liquid crystal display device according to another embodiment of the present invention.

FIG. 5 is a circuit diagram showing a circuit configuration of a main part of FIG. 4;

FIG. 6 is a schematic block diagram of a conventional liquid crystal display device.

FIG. 7 is a conceptual diagram of the liquid crystal panel of FIG.

FIG. 8 is a waveform chart showing a method of driving the liquid crystal panel of FIG.

9 is a circuit diagram showing a circuit configuration of a driving circuit of the liquid crystal panel of FIG.

FIG. 10 is a circuit diagram illustrating a capacitance component of a control electrode VL, which is a problem of a conventional driving circuit.

FIG. 11 is an actually measured waveform diagram for explaining a problem of a conventional driving circuit.

FIG. 12 is a view showing a screen display corresponding to the waveform example of FIG. 11;

[Description of Signs] 10 ... Color liquid crystal panel 11 ... Video output circuit 13 ... Alternating pulse generation circuit 14 ... Common voltage drive circuit 15 ... Control voltage drive circuit 16 ... Difference detection circuit 17 ... Addition circuit 18 ... Video signal addition circuit

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[Procedure amendment]

[Submission date] January 20, 1997

[Procedure amendment 1]

[Document name to be amended] Drawing

[Correction target item name] All figures

[Correction method] Change

[Correction contents]

FIG.

FIG. 2

FIG. 6

FIG. 3

FIG. 4

FIG. 5

FIG. 7

FIG. 8

FIG. 9

FIG. 10

FIG. 11

FIG.

Claims (2)

[Claims] 1. An active matrix type liquid crystal panel, an alternating pulse generating means for generating an alternating pulse, a video output means for supplying a video signal to the liquid crystal panel, and inputting an alternating pulse from the alternating pulse generating means. First driving means for supplying an alternating pulse to a common electrode of the liquid crystal panel; and second driving means for receiving an alternating pulse from the alternating pulse generating means and supplying an alternating pulse to a control electrode of the liquid crystal panel. A difference detection unit that detects a difference between an input signal and an output signal of the first or second drive circuit; and a difference signal from the difference detection unit is input to the first drive unit and the second drive unit. A liquid crystal display device comprising: an adding means for adding an alternating pulse to be added. 2. The liquid crystal display device according to claim 1, further comprising second adding means for adding a video signal from said video output means to a difference signal from said difference detecting means. Liquid crystal display.