JPH10189964A - Semiconductor device and manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid the effect of dispersion at the time of the formation of a LOCOS oxide film on the impurity concentration of a diffusing region for high-voltage resistance by setting the concentration peak of the one-conducting type diffusing region for high-voltage resistance at the position deeper than the deepest interface region of the LOCOS oxide film and a drain region. SOLUTION: The concentration peak CP of a one-conducting type diffusing region 3 for high-voltage resistance is set at a position deeper than the deepest interface region between a LOCOS oxide film 5 and a drain region 8. Most of the regional area shown in a shaded part is present in the region deeper than the interface region of the LOCOS oxide film 5. Even when there is dispersion in film thickness (arrow mark), the total amount of impurities in the diffusing region 3 for high-voltage resistance becomes more than the conventional amount. Therefore, even if there is dispersion in the LOCOS oxide film 5 in the depth direction, the impurity concentration of the diffusing region itself for high-voltage resistance has no dispersion in comparison with the conventional device. Therefore, the voltage resistance characteristic of the horizontal high- voltage resistance MOSFET can be made uniform.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly, to a lateral high voltage MOSFE.
LOCOS (Local oxidation of silic) formed in T
on) The present invention relates to stabilization of the concentration of an impurity diffusion layer formed immediately below for improving withstand voltage.

[0002]

2. Description of the Related Art A conventional high-voltage lateral high-voltage MOS will be described below.
The FET will be described with reference to the drawings. FIG.
FIG. 1 is a cross-sectional view of a general lateral high withstand voltage MOSFET. The lateral high withstand voltage MOSFET includes a semiconductor substrate 1, a first well region 2 serving as a drain region on a surface layer of the substrate, and a first well region 2 thereof.
A diffusion region 3 (hereinafter referred to as a high-breakdown-voltage diffusion region 3) formed in the well region 2 and a high-concentration drain region 8 and a LOCOS formed on the high-breakdown-voltage diffusion region 3 are formed. Oxide film 5, high-concentration second well region 12 for forming a channel, and second well region 1
The P-type high-concentration common connection region 13 that connects the high-concentration source region 7 and the source region 7 formed in the second well 2, the second well 12 and the gate electrode 6 formed on the LOCOS oxide film 5 Be composed.

In this lateral high breakdown voltage MOSFET, as shown in FIG. 2, for example, a first well region 2 serving as a drain region is formed on a P type semiconductor substrate 1 by diffusing N type impurities. A high breakdown voltage diffusion region 3 is formed by implanting and diffusing a P-type impurity such as boron (B +) into the surface layer. This high breakdown voltage diffusion region 3 is formed between the drain and the source,
In particular, the junction effect generated in the first well region 2 serving as the drain region improves the breakdown voltage between the drain and the source by directing the expansion of the depletion layer toward the inside. This is essential for a lateral high breakdown voltage MOSFET. Is a diffusion region.

A LOCOS oxide film 5 having a predetermined thickness is formed on the high breakdown voltage diffusion region 3 in order to improve the gate-drain breakdown voltage, and the semiconductor substrate 1 in a region where the LOCOS oxide film 5 is not formed is formed. A gate insulating film 4 made of an oxide film, a nitride film or the like is formed thereover. A high concentration second well region 12 is formed adjacent to the first well region 2 to form a channel by diffusing a high concentration P-type impurity.
Is formed, and an N + -type impurity is diffused in the surface layer to form a high-concentration source region 7. Further, on the surface layer of the first well region 2 where the high breakdown voltage diffusion region 3 is not formed, an N + impurity is implanted and diffused to form a high concentration drain region 8.

Further, polysilicon is deposited on the second well region 12 from the gate insulating film 4 to the LOCOS oxide film 5 to form a channel and improve withstand voltage characteristics to form a gate electrode 6 and a withstand voltage electrode 6A. The interlayer insulating film 9 is formed so as to cover them. An opening is formed in the interlayer insulating film 9 in a region where the source region 7 and the drain region 8 are formed, and a source electrode 10 and a drain electrode 11 made of aluminum or the like are formed in the opening. The withstand voltage electrode 6 </ b> A is electrically connected to the drain electrode 11. Although not shown, the high-breakdown-voltage diffusion region 3 is electrically connected to the source electrode 10 and has the same potential as the substrate 1.

In the above-mentioned lateral high withstand voltage MOSFET, how to improve the withstand voltage characteristic is being studied. In order to improve the breakdown voltage characteristics, as described above, L
Immediately below the OCOS oxide film 5, for example, a high breakdown voltage diffusion region 3 is formed by P + type impurity diffusion. The high breakdown voltage diffusion region 3 is formed by the same heat treatment step as the formation of the LOCOS oxide film 5. The following describes the diffusion region 3 for high withstand voltage.
Will be described with reference to FIGS. 3 and 4. FIG.

First, as shown in FIG. 3, an oxide film A such as a silicon oxide film is formed on the surface of a P-type semiconductor substrate 1 having an N-type first well region 2 serving as a drain region formed in the surface layer thereof, A photoresist PR is selectively formed in a predetermined region of the oxide film A. Using this photoresist PR as a mask,
For example, boron ions (B +) are accelerated at an acceleration voltage of 100 ke.
Implantation is performed under the conditions of V and a dose amount of 3 × 10 13 cm −2.

Next, as shown in FIG. 4, a LOCOS oxide film 5 is formed on a predetermined region of the oxide film A, that is, on the implantation region into which boron ions have been implanted, by the LOCOS method. At this time, the previously implanted boron ions (B +)
The high breakdown voltage diffusion region 3 having a predetermined concentration is formed immediately below the LOCOS oxide film 5 by being diffused by heat when the S oxide film is formed.

[0009]

As described above, since the high breakdown voltage diffusion region 3 is formed through the oxidation process of the LOCOS oxide film 5, the segregation coefficient of B + in the oxide film and the LOCOS oxide film are increased. Due to the variation of the film thickness of No. 5, the impurity concentration of the high breakdown voltage diffusion region 3 becomes unstable and varies from place to place.

FIG. 5 shows the profile of the impurity concentration of boron ions in the high breakdown voltage diffusion region 3 formed under the above conventional conditions. At this time, the film thickness of the LOCOS oxide film is 7,000 angstroms, which has a depth of about 3150 angstroms in the substrate. According to this,
As shown in (1), since the acceleration voltage is relatively low at 100 keV, boron ions do not enter deeply at the time of implantation and concentrate near the substrate surface. Therefore, a portion having the highest impurity concentration (hereinafter referred to as an impurity concentration peak). However, due to variations in the LOCOS oxidation growth that is formed thereafter,
Some remained in the S oxide film and others did not. That is, while manufacturing the same model or in the same process, the concentration of the high breakdown voltage diffusion region is absorbed in the LOCOS oxide film due to variations in the LOCOS oxide film, and the concentration peak is formed in the LOCOS oxide film.

Therefore, the total amount of impurities remaining after the formation of the high-breakdown-voltage diffusion region 3 is the same as the area of the region shown by hatching in FIG. 5, and as shown in FIG.
Since it is absorbed in the S oxide film, the total amount of impurities in the high breakdown voltage diffusion region 3 itself is reduced. When the LOCOS oxide film 3 is formed, its variation (arrow) is about ± 3 in the depth direction.
The thickness is about 50 angstroms to about ± 700 angstroms, and it is difficult to control the film thickness. When a plurality of elements are formed, it is almost impossible to prevent the film thickness from varying depending on the location. Therefore, variations in the impurity concentration in the high breakdown voltage diffusion region are unavoidable, and it is also unavoidable that the breakdown voltage of the lateral high breakdown voltage MOSFET varies depending on the location, and the breakdown voltage characteristics are made uniform, that is, the improvement of breakdown voltage characteristics is hindered. Was the cause of.

The present invention has been made in view of the above circumstances, and the impurity concentration of the high breakdown voltage diffusion region formed just below the LOCOS oxide film for improving the breakdown voltage is set to LOCOS.
Lateral high withstand voltage MO that is not affected by variations in oxide film formation
The purpose is to provide an SFET.

[0013]

The present invention adopts the following configurations and methods in order to solve the above problems. That is,
A semiconductor device of the present invention includes a semiconductor substrate of one conductivity type, a drain region of an opposite conductivity type formed on the semiconductor substrate, a LOCOS oxide film formed in the drain region, and a predetermined portion immediately below the LOCOS oxide film. A diffusion region for high breakdown voltage of one conductivity type, which suppresses the spread of a depletion layer formed in the drain region; a high-concentration drain region of opposite conductivity type formed in the drain region; A well region of one conductivity type to be formed and a gate electrode formed on the LOCOS oxide film, and the one conductivity type is provided at a position deeper than a deepest interface region between the LOCOS oxide film and the drain region. Is characterized by setting a concentration peak of the diffusion region for high breakdown voltage.

The method of manufacturing a semiconductor device according to the present invention is
A step of forming an oxide film on a surface layer of a semiconductor substrate of one conductivity type, and a region of the oxide film where a LOCOS oxide film is formed,
Implanting a high-concentration impurity of one conductivity type so as to have a concentration peak in a region deeper than the deepest interface region when the LOCOS oxide film is formed; Forming a LOCOS oxide film and simultaneously diffusing the one-conductivity-type high-concentration impurity to form a one-conductivity-type high-voltage diffusion region; and injecting and diffusing one-conductivity-type high-concentration impurity into the substrate surface layer, Forming a well region for forming a channel region; implanting a high-concentration impurity of opposite conductivity type to be a source region and a drain region into the well region and the substrate surface layer;
The method has a step of forming a gate insulating film in a region where a COS oxide film is not formed, and a step of forming a gate electrode for forming a channel on the well region and the LOCOS oxide film. .

The high-concentration impurity of one conductivity type is 1
The injection is performed at an acceleration voltage of 50 keV to 220 keV. As described above, the impurity concentration of the high breakdown voltage diffusion region is set by setting the concentration peak of the one conductivity type high breakdown voltage diffusion region at a position deeper than the deepest interface region between the LOCOS oxide film and the drain region. , Or the degree of increase is significantly reduced, so that the breakdown voltage characteristics can be made uniform.

Further, a high-concentration impurity of one conductivity type is implanted into a region where the LOCOS oxide film is formed so as to have a concentration peak in a region deeper than a deepest interface region when the LOCOS oxide film is formed. Simultaneously with the formation of the film, the one-conductivity-type high-concentration impurity is diffused to form the one-conductivity-type high-breakdown-voltage diffusion region. Therefore, even if the film thickness varies when the LOCOS oxide film is formed, the high-breakdown-voltage diffusion region is formed. And the degree of concentration decrease and increase can be remarkably reduced, and the breakdown voltage characteristics can be made uniform.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to an embodiment of the present invention and a method for manufacturing the same will be described. The semiconductor device of the present invention relates to a lateral high-voltage MOSFET, and a general lateral high-voltage MOSFET has been described in the conventional example, but will be described again. FIG. 2 is a sectional view of a general lateral high-voltage MOSFET.
Are a semiconductor substrate 1, a first well region 2 serving as a drain region in a surface layer of the substrate, and a diffusion region 3 (hereinafter referred to as a high withstand voltage diffusion) formed in the first well region 2 for improving the withstand voltage. Region 3), a high-concentration drain region 8, a LOCOS oxide film 5 formed on the high-breakdown-voltage diffusion region 3, a high-concentration second well region 12 for forming a channel, and a second The high-concentration source region 7 formed in the well region 12 and a P-type high-concentration common connection region 13 that connects the source regions 7 in common, the second well 12, and the LOC.
And a gate electrode 6 formed on the OS oxide film 5.

In this lateral high breakdown voltage MOSFET, as shown in FIG. 2, for example, a first well region 2 serving as a drain region is formed on a P type semiconductor substrate 1 by diffusing N type impurities. A high breakdown voltage diffusion region 3 is formed by implanting and diffusing a P-type impurity such as boron (B +) into the surface layer. The high breakdown voltage diffusion region 3 is formed between the drain and the source,
In particular, the junction effect generated in the first well region 2 serving as the drain region improves the breakdown voltage between the drain and the source by directing the expansion of the depletion layer toward the inside. This is essential for a lateral high breakdown voltage MOSFET. Is a diffusion region.

A LOCOS oxide film 5 having a predetermined thickness is formed on the high-breakdown-voltage diffusion region 3 in order to improve the gate breakdown voltage, and the LOCOS oxide film 5 is formed on the semiconductor substrate 1 in a region where the LOCOS oxide film 5 is not formed. The gate insulating film 4 is formed of an oxide film or a nitride film. A high concentration second well region 12 is formed adjacent to the first well region 2 to diffuse a high concentration P-type impurity to form a channel.
In the surface layer, an N + type impurity is diffused to form a high concentration source region 7. Further, on the surface layer of the first well region 2 where the high breakdown voltage diffusion region 3 is not formed, N
A high concentration drain region 8 is formed by implanting and diffusing impurities.

Further, polysilicon is deposited on the second well region 12 from the gate insulating film 4 to the LOCOS oxide film 5 to improve channel formation and breakdown voltage characteristics, thereby forming a gate electrode 6 and a breakdown voltage electrode 6A. The interlayer insulating film 9 is formed so as to cover them. An opening is formed in the interlayer insulating film 9 in a region where the source region 7 and the drain region 8 are formed, and a source electrode 10 and a drain electrode 11 made of aluminum or the like are formed in the opening. The breakdown voltage electrode 6A is electrically connected to the drain electrode 11. Although not shown, the high breakdown voltage diffusion region 3 is electrically connected to the source electrode 10 and has the same potential as the substrate 1.

The feature of the present invention is that the high breakdown voltage diffusion region 3 has a high concentration due to the concentration of the high breakdown voltage diffusion region 3 which is generated when the LOCOS oxide film 5 is formed.
In the present invention, specifically, in the present invention, at a position deeper than the deepest interface region X between the LOCOS oxide film 5 and the drain region 8, it is intended to improve the reduction and the variation of the breakdown voltage characteristic caused by the decrease and increase of the concentration of , A concentration peak CP of the high withstand voltage diffusion region 3 is set.

Hereinafter, a method of forming the high withstand voltage diffusion region 3 will be described with reference to FIGS. First, as shown in FIG. 3, for example, an oxide film A such as a silicon oxide film is formed on the surface of a P-type semiconductor substrate 1 in which an N-type first well region 2 serving as a drain region of about 6 μm is formed in a surface layer.
And a photoresist P is formed on a predetermined area of the oxide film A.
R is selectively formed.

Using this photoresist PR as a mask,
For example, boron ions (B +) are implanted. This boron ion implantation is performed when the LOCOS oxide film is formed.
In consideration of the variation at the time of forming the LOCOS oxide film,
Boron ions are implanted so as to have a concentration peak in a region deeper than the deepest interface region of the LOCOS oxide film. Specifically, for example, when the concentration of the first well region 2 to be the drain region is 5 × 10 12 cm −2, the acceleration voltage is about 150 to
220 keV, dose 1.3-1.1 x 1013 cm-2
Under the above condition, deep implantation is performed in the first well 2 which will be the drain region.

Then, as shown in FIG. 4, a LOC having a thickness of about 7,000 angstroms is formed on a predetermined region of the oxide film A by the LOCOS method and on the implantation region into which boron ions are implanted.
An OS oxide film 5 is formed. At this time, the boron ions (B @ +) implanted earlier are diffused by the heat at the time of forming the LOCOS oxide film, and about 1.5 .mu.
A high withstand voltage diffusion region 3 having a predetermined concentration at m is formed.

In the present embodiment, in the step of implanting boron ions (B +), the boron ions are accelerated and implanted at an acceleration voltage of about 1.5 times or more higher than in the prior art, so that boron ions in the substrate are implanted. The range of the ions becomes longer, and boron ions are implanted deeper into the substrate 1 than before, and are concentrated deep inside the substrate 1 unlike the conventional case. In addition, the dose at the time of driving is about half of the conventional one, 1.3 × 10 13 cm −2.
It has become. From these facts, the profile of the concentration of boron ions at this time is as shown in FIG.
The peak of the impurity concentration (Cp in FIG. 1) is L
Instead of appearing in the OCOS oxide film 5, it reaches the high breakdown voltage diffusion region 3.

Then, as shown in FIG. 1, most of the area of the region indicated by the hatched portion in FIG. 1 exists in a region deeper than the interface region of the LOCOS oxide film 5, and the film area after the LOCOS oxide film 3 is formed. Even if there are variations in thickness (arrows), the total amount of impurities in the high breakdown voltage diffusion region 3 is larger than the total amount of impurities by the conventional method shown in FIG. Therefore, L
Even if the film thickness varies when the OCOS oxide film 5 is formed, the impurity concentration peak forming the high breakdown voltage diffusion region is deeper than the interface region of the LOCOS oxide film 5. Even if there is a variation in the depth direction, the impurity concentration of the high breakdown voltage diffusion region itself is more uniform than in the conventional case.
The withstand voltage characteristic of T can be made uniform.

In this embodiment, the acceleration voltage at the time of implantation is 150 to 220 keV, the dose at the time of implantation is 1.3.times.10@13 cm @ -2, and the acceleration voltage is about 1.5 times that of the conventional one.
Although the dose amount at the time of implantation is about half that of the conventional case, the present invention is not limited to this, and similar effects can be obtained by implanting under the condition that the peak of the impurity concentration appears in the high breakdown voltage diffusion region 3. To play.

Further, in the present embodiment, boron ions are implanted as impurities in the high breakdown voltage diffusion region 3, but similar effects can be obtained with P-type impurities. Further, in the present embodiment, the drain region is used as the first well region 2. However, the present invention is not limited to this, and instead of the first well region, the P-type substrate 1 is used as the drain region.
It is also possible to form an N-type epitaxial layer on it and use the epitaxial layer as a drain region.

Although the N-channel lateral high withstand voltage MOSFET has been described in the above embodiment, it goes without saying that the present invention can be similarly applied to the P channel lateral high withstand voltage MOSFET.

[0030]

As described above, according to the semiconductor device of the present invention, the concentration peak of the one-conductivity type high-breakdown-voltage diffusion region is located deeper than the deepest interface region between the LOCOS oxide film and the drain region. By setting, the withstand voltage characteristics can be made uniform in order to significantly suppress the increase and decrease of the impurity concentration of the high withstand voltage diffusion region.
An FET can be provided.

Further, according to the method of manufacturing a semiconductor device of the present invention, LOCOS is formed in the region where the LOCOS oxide film is formed.
One conductivity type high concentration impurity is implanted so as to have a concentration peak in a region deeper than the deepest interface region when the oxide film is formed, and at the same time as the LOCOS oxide film is formed, the one conductivity type high concentration impurity is diffused. By forming the one-conductivity-type diffusion region for high breakdown voltage, even if the film thickness varies during the formation of the LOCOS oxide film, it is possible to suppress the increase or decrease in the concentration of the diffusion region for high breakdown voltage and to make the breakdown voltage characteristics uniform. it can. As a result, it is possible to provide a lateral high withstand voltage MOSFET having excellent withstand voltage characteristics even if manufactured in the same process.

[Brief description of the drawings]

FIG. 1 is a diagram showing a profile of an impurity concentration after impurity implantation in a high breakdown voltage diffusion region according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the structure of a general high breakdown voltage MOSFET.

FIG. 3 is a first cross-sectional view illustrating a step of forming a high-breakdown-voltage diffusion region of a high-breakdown-voltage MOSFET.

FIG. 4 is a second sectional view illustrating a step of forming a high-breakdown-voltage diffusion region of the high-breakdown-voltage MOSFET.

FIG. 5 is a diagram showing a profile of impurity concentration after impurity implantation in a conventional high breakdown voltage diffusion region.

Claims (3)

[Claims] A semiconductor substrate of one conductivity type; a drain region of opposite conductivity type formed on the semiconductor substrate; a LOCOS oxide film formed on the drain region;
A high withstand voltage diffusion region of one conductivity type having a predetermined width immediately below the S oxide film for suppressing the spread of the depletion layer formed in the drain region, and a high conductivity type of the opposite conductivity type formed in the drain region. The semiconductor device has a concentration drain region, a well region of one conductivity type that forms a channel, and a gate electrode formed on the LOCOS oxide film, and is deeper than the deepest interface region between the LOCOS oxide film and the drain region. A semiconductor device wherein a concentration peak of the one-conductivity-type high-breakdown-voltage diffusion region is set at a position. 2. A step of forming an oxide film on a surface layer of a one-conductivity-type semiconductor substrate, and a region of the oxide film where the LOCOS oxide film is formed is deeper than a deepest interface region when the LOCOS oxide film is formed. Implanting a high-concentration impurity of one conductivity type so as to have a concentration peak in a deep region; and LO having a predetermined thickness in a region where the LOCOS oxide film is formed.
Forming a COS oxide film and simultaneously forming the one-conductivity-type high-concentration impurity to form a one-conductivity-type high-voltage diffusion region; and injecting and diffusing one-conductivity-type high-concentration impurity into the substrate surface layer, A step of forming a well region for forming a channel region; a step of injecting a high-concentration impurity of a reverse conductivity type to be a source region and a drain region into the well region and the surface layer of the substrate; and wherein the LOCOS oxide film is not formed. A method for manufacturing a semiconductor device, comprising: forming a gate insulating film in a region; and forming a gate electrode for forming a channel on the well region and the LOCOS oxide film. 3. The one-conductivity-type high-concentration impurity is 150 k.
The method of manufacturing a semiconductor device according to claim 2, wherein the implantation is performed with an acceleration voltage of eV to 220 KeV.