JPH10135924A - Orthogonal frequency-division multiple signal transmission method and receiver used therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an orthogonal frequency-division multiple signal transmission method by which out of symbol synchronization is minimized and the error caused by coefficient averaging between adjacent carriers is reduced, and to provide a receiver used therefor. SOLUTION: An N point discrete Fourier transmission(DFT) multi-value quadrature amplitude modulation(QAM) decoding circuit 31 decodes a symbol number and a reference signal, detects a transmission line characteristic from the reference signal, calculates a correction equation from the transmission line characteristic and stores it, obtains an integration value of an approximated value for each prescribed period by using the coefficient of the transmission line characteristic, so as to calculate an approximated value of a phase difference between a couple of carriers in a vicinity among a plurality of carriers as to each of carriers of the set number, the integration value this input is compared with the value at a preceding input and a forward signal or a backward signal is outputted, depending on the comparison result. A guard interval period processing circuit 30 adjusts it so that an integrated value of a DFT window, based on the symbol synchronization signal is adjusted based on the forward signal or the backward signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an orthogonal frequency division multiplexing signal transmission method and a receiving apparatus used for the same, and more particularly, to orthogonal frequency division multiplexing (OFDM) of a multi-level modulated digital information in a limited frequency band.
The present invention relates to an orthogonal frequency division multiplexing signal transmission method for converting a signal into a division multiplex signal and transmitting and receiving the signal, and a receiving apparatus used for the method.

[0002]

2. Description of the Related Art As one of systems for transmitting digital information such as coded digital video signals in a limited frequency band, a multi-level quadrature amplitude modulation (QAM: Quadrature A) is used.
mplitude modulation) and multi-level phase modulation (PSK: Phase)
There is known an OFDM system in which digital information is transmitted by an OFDM signal obtained by frequency-division multiplexing a large number of carrier waves, each of which is multi-level modulated by Shift Keying or the like.
In this OFDM system, a number of carriers are arranged orthogonally,
A method for transmitting independent digital information on each carrier, which has the features of being resistant to multipath, less susceptible to interference, and having relatively good frequency use efficiency. Research and development not only in the communication field but also in the digital broadcasting field. Is being promoted. Note that "carriers are orthogonal" means that the spectrum of an adjacent carrier becomes zero at the frequency position of the carrier.

[0003] OFD transmitted by this OFDM system
Since the M signal is frequency-division multiplexed by modulating a large number of carriers according to information to be transmitted, the baseband time axis waveform is as shown in FIG. 10, and the information transmission is performed in a symbol period. Performed as a unit. In each symbol period, as indicated by ta in FIG. 11, a guard interval gi is set immediately before an effective symbol period ts in which data obtained by performing an inverse fast Fourier transform (IFFT) operation on information to be transmitted is transmitted. This is the added period. This guard interval gi is a period for reducing multipath, and the signal waveform in that period has an effective symbol period ts
Is repeated in a cyclic manner.

[0004] The frequency interval of each carrier of the OFDM signal is
It is equal to the reciprocal of the effective symbol period ts. In order to obtain a value sampled at a period obtained by dividing the effective symbol period ts by N, the N complex ID data is subjected to N-point IDFT operation once for each symbol period ta on the frequency axis to obtain the baseband signal. A signal waveform is obtained.

[0005] On the receiving side, the OFDM signal has a period of ts / N.
, And performs N-point discrete Fourier transform (DFT) once for each symbol period ta to calculate the phase and amplitude of each carrier frequency component, thereby obtaining received data. At this time, a time window (generally called a DFT window) is set for each symbol period, and a DFT operation is performed on the data sequence of the DFT window.
The symbol synchronization signal specifies the T window.

As a method of generating the symbol synchronization signal, for example, there is a method of using a symbol of a predetermined period as a null symbol (no signal period) and using the null symbol. The symbol synchronization signal does not need to accurately detect a symbol break, but is allowed to be detected within a certain range (± several samples). To explain this, when the receiving apparatus receives a delayed ghost wave schematically shown in FIG. 12B together with a desired wave schematically shown in FIG. At the start time point a of the effective symbol period of the large desired wave, a symbol synchronization signal sa shown in FIG. 9C is generated.
FT operation is performed. In this case, as can be understood from FIGS. 12A and 12B, the data sequence up to the start point b of the symbol period of the ghost wave before the start point a does not receive the interference of the adjacent symbol. At time b
(D) may be generated as indicated by sb, and may be generated anywhere between time point b and time point a.

[0007] That is, by setting the guard interval period to be longer than the delay time of the ghost wave, this margin occurs. Therefore, conventionally, the generation of the symbol synchronization signal has been facilitated (simplified) by setting the guard interval period to be longer than the assumed delay time of the ghost wave.

[0008]

In the OFDM signal transmission system proposed by the present inventor in Japanese Patent Application No. 8-43854, a reference signal is inserted into an OFDM signal as known reference data and transmitted. Then, on the receiving side, based on the reference signal, the in-phase signal (I signal) and the quadrature signal (Q signal)
The information signal can be almost accurately restored by detecting the transmission path characteristic indicating the error of the above, and correcting the detected transmission path characteristic by obtaining the correction formula.

However, the received reference signal contains a noise component, and it is difficult to accurately grasp the transmission path characteristics. Therefore, in the above-mentioned proposal of the present inventor, the average of the coefficients of the transmission path characteristics is calculated for nearby carriers (filter processing), and the transmission path characteristics free from noise are detected. Even if a simple averaging of the coefficients of the nearby carriers is used, the effect of removing noise is large.

However, since the relationship between these coefficients is not a linear relationship but a quadratic curve, many averages deviate from the actual values. In a modulation method with a small threshold value, for example, 256 QAM or more, this shift cannot be ignored. One cause of the difference between the coefficients between the carriers is a shift in the symbol synchronization position.

For example, an OF for performing an n-point FFT operation
In the DM signal transmitting apparatus, if the symbol synchronization signal has a displacement of m samples, the relationship between the coefficients of adjacent symbols is (2π / n) × m [rad. ] Appears as a phase difference. When averaging is performed, a shift due to this factor occurs. 512 point FFT as an example
In the OFDM signal transmitting apparatus that performs the calculation, the relationship between the coefficients of adjacent symbols is 2π / 512 = π / 256 [rad. ]
Appears as a phase difference.

To further explain this relationship, for example, the n-th carrier has a waveform for n cycles in the effective symbol period. That is, (2π × n) [rad. ]. Looking at this in one sample, (2π × n) / 51
2 [rad. ]. Therefore, (2π × n) / 512 [rad. ] Will be corrected. On the other hand, in the (n + 1) th carrier, (2π × (n + 1)) [rad. ]. Looking at this in one sample, (2π × (n
+1)) / 512 [rad. ]. Therefore, with a shift of one sample, (2π × (n + 1)) / 512
[Rad. ] Will be corrected.

Accordingly, the difference between the correction values of the n-th carrier and the (n + 1) -th carrier is as follows: {(2π × (n + 1)) / 512} − ｛(2π × n) /
512｝ = 2π / 512 = 2π / 256 [rad. ]. With a shift of X samples, the above-described phase shift becomes X times, so that the difference between the correction values of the nth carrier and the (n + 1) th carrier is also X times X · 2π / 256 [rad. ]
The greater the sample shift, the greater the difference between adjacent correction values.

As described above, if the DFT window does not straddle an adjacent symbol, the symbol synchronization signal allows a shift of several samples, and there is no difference in device performance. However, when noise is removed by averaging the coefficients of adjacent carriers, it is important to minimize this symbol synchronization shift and reduce the difference in coefficients between adjacent carriers in order to improve device performance. .

The present invention has been made in view of the above points,
An object of the present invention is to provide an orthogonal frequency division multiplexed signal transmission method capable of minimizing symbol synchronization deviation and minimizing errors caused by coefficient averaging between adjacent carriers, and a receiving apparatus used therefor.

[0016]

In order to achieve the above object, in the orthogonal frequency division multiplexing signal transmission method according to the present invention, a plurality of carriers having different frequencies are assigned to each carrier on the transmitting side. Modulated separately with the information signal to be transmitted, transmitting a known reference signal on a predetermined carrier among a plurality of carriers, generating a frequency-division multiplexed orthogonal frequency division multiplexed signal, comprising a guard interval and an effective symbol period Transmitted in symbol units, the receiving side generates a symbol synchronization signal from the received frequency division multiplexed signal, and performs a discrete Fourier transform on the received frequency division multiplexed signal included in the time window set based on this symbol synchronization signal. To decode the information signal to be transmitted and the reference signal, detect the channel characteristics of the carrier from the reference signal, and supplement the detected channel characteristics. An orthogonal frequency division multiplexing signal transmission method for calculating and storing an equation, and correcting an information signal decoded using a correction equation, wherein the receiving side uses a coefficient representing a transmission path characteristic to select among a plurality of carrier waves. Calculate the approximate value of the phase difference between a pair of nearby carriers for each of the set number of carriers, find the integrated value of those approximate values, and compare the previous integrated value with the current integrated value Then, in accordance with the comparison result, the phase of the time window is adjusted so that the obtained integrated value is minimized.

Further, according to the method of the present invention, on the transmitting side, each of a plurality of carriers having different frequencies is separately modulated by an information signal to be transmitted allocated to each carrier, and the modulated carrier is used as a center carrier among the plurality of carriers. A known reference signal is transmitted using a pair of a positive carrier on the high band and a negative carrier on the low band that are symmetrical to each other, and the pair of positive and negative carriers transmitting the known reference signal is defined as a specific carrier or transmission parameter. Specified by the symbol number to be transmitted in, and, sequentially and cyclically changed at regular intervals, generate a frequency-division multiplexed orthogonal frequency division multiplexed signal and transmit it in a symbol unit consisting of a guard interval and an effective symbol period, On the receiving side, a symbol synchronization signal is generated from the received frequency division multiplexed signal, and the received frequency included in the time window set based on the symbol synchronization signal is generated. An information signal to be transmitted and a symbol number are decoded by performing a discrete Fourier transform on the division multiplexed signal, a reference signal is decoded based on the decoded symbol number, and a real part and an imaginary part of a positive carrier are extracted from the reference signal. Detects transmission path characteristics based on the leakage components to the real and imaginary parts of the carrier, calculates and stores a correction formula from the detected transmission path characteristics, and corrects the decoded information signal using the correction formula. Orthogonal frequency division multiplexing signal transmission method, wherein the receiving side,
Calculating the approximate value of the phase difference between a pair of adjacent carrier waves among a plurality of carrier waves using the coefficient representing the leakage component of the transmission path characteristic, for each of the set number of carrier waves, and calculating the approximate value thereof Is calculated every predetermined period, the previous integrated value is compared with the current integrated value, and according to the comparison result, the phase of the time window is adjusted so that the obtained integrated value is minimized. It was made.

Further, the receiving apparatus of the present invention transmits a digital information signal to be transmitted on a plurality of carriers having different frequencies from each other and, among the plurality of carriers, a positive carrier on a high frequency side symmetrical with respect to a center carrier. A known reference signal is inserted into a set of negative carrier waves on the lower frequency side, and a set of positive and negative carrier waves for transmitting the reference signal is designated by a symbol number transmitted on a specific carrier wave, and sequentially at regular intervals. Receiving means for receiving an orthogonal frequency division multiplexed signal cyclically changed and transmitted in symbol units consisting of a guard interval and an effective symbol period, and a received orthogonal frequency division multiplexed signal from the receiving means By orthogonal demodulation,
Demodulation means for obtaining an information signal represented by a complex number, a symbol number, and a reference signal; synchronization signal generation means for generating a symbol synchronization signal of a symbol unit cycle based on the information signal from the demodulation means; And a guard interval period processing means for passing the information signal from the demodulation means, the symbol number and the reference signal respectively within the time window, and a discrete Fourier transform of the signal from the guard interval period processing means. Decoding means for decoding the digital information signal and the symbol number and the reference signal; decoding the reference signal from the symbol number from the decoding means; and real and imaginary parts of the positive carrier and the negative carrier from the reference signal. The transmission path characteristics are detected based on the leakage components to each of the real and imaginary parts, and a correction formula is calculated from the transmission path characteristics. Correction means for correcting the decoded signal of the digital information signal from the decoding means using the stored correction formula; and a coefficient among a plurality of carrier waves using a coefficient representing a leakage component of the transmission path characteristic. Calculating the approximate value of the phase difference between the pair of carrier waves for each of the set number of carrier waves, and calculating the integrated value of the approximate values for each predetermined period; and inputting from the phase calculating means. Adjustment control means for comparing the integrated value to be input between the previous input and the current input, and adjusting and controlling the phase of the time window such that the obtained integrated value is minimized according to the comparison result. It is characterized by.

According to the present invention, the symbol synchronization signal is generated in the same manner as in the prior art, an approximate value of the phase difference between adjacent carriers is calculated, and the above-mentioned phase difference is calculated for each of the set number of carriers. Calculate the approximate values, add them up,
The integrated value is compared between the previous input and the current input, and the phase of the time window is adjusted and controlled according to the comparison result so that the integrated value is minimized. Can be detected.

[0020]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an embodiment of a transmission system of the orthogonal frequency division multiplexing signal transmission method according to the present invention, and FIG. 2 is an embodiment of a receiving system and a receiving apparatus of the orthogonal frequency division multiplexing signal transmission method according to the present invention. FIG. 2 shows a block diagram of an embodiment.

The configuration of the transmission system shown in FIG. 1 is the same as that of the transmission device in the above-mentioned patent application proposed by the present inventors. In FIG. 1, digital data to be transmitted is input to an input terminal 1. The digital data is, for example, a digital video signal or an audio signal compressed by an encoding method such as an MPEG method which is a color moving image encoding method. The input digital data is supplied to an input circuit 2 and an error correction code is added as necessary based on a clock from a clock frequency divider 3. Clock divider 3 is 10.7 MHz from intermediate frequency oscillator 10
Is divided to generate a clock synchronized with the intermediate frequency.

The digital data to which the error correction code has been added is supplied from the input circuit 2 to the arithmetic unit 4. The arithmetic unit 4 performs an inverse discrete Fourier transform (IDFT) operation on the digital data from the input circuit 2 to generate an in-phase signal (I signal) and a quadrature signal (Q signal). The symbol number from the circuit 5 and the reference signal from the reference signal insertion circuit 6 are also supplied to predetermined input terminals (input units), and are subjected to IDFT calculation. That is,
A symbol number is inserted into a specific carrier, and a known reference signal (reference data) is inserted into another positive or negative carrier corresponding to the symbol number.

Specifically, the symbol number counting circuit 5
The symbol number is represented by 8 bits, and 0, 1, 2,
3,. . . , 255, 0, 1, 2,. . And so on
It counts and outputs a symbol number that sequentially and cyclically changes in each symbol period.

Here, since accurate decoding of the symbol number is important, dedicated reference data (reference signal) is prepared. Of the 8 bits output from the symbol number counting circuit 5,
The fourth bit of the eighth, seventh, third and second bits is input to the arithmetic unit 4, where an IDFT operation is performed so as to be transmitted on a specific carrier, for example, the first carrier.

The reference signal insertion circuit 6 receives the 8-bit symbol number output from the symbol number counting circuit 5, and inserts the reference signal into a predetermined carrier obtained based on the upper 7 bits of the symbol number. Is input to the arithmetic unit 4 and an IDFT operation is performed so that the signal is transmitted on a predetermined carrier. Since the lower one bit of the symbol number is ignored,
A reference signal is inserted into a carrier having the same value between two symbols.

Further, based on the least significant bit of the 8-bit symbol number, the reference signal insertion circuit 6 inserts the following two types of reference signals into odd symbols and even symbols.

[0027]

(Equation 1) The determinant reference signal represented by the equation (1a) is inserted into an even symbol, and the determinant reference signal represented by the equation (1b) is inserted into an odd symbol. Here, X and Y are known reference signal values,
p is the real part of the relevant positive carrier to be transmitted, q is the imaginary part of the relevant positive carrier to be transmitted, r is the real part of the relevant negative carrier to be transmitted, and u is the imaginary part of the relevant negative carrier to be transmitted.
The carrier into which the reference signal is inserted is the center carrier frequency F
A positive / negative carrier frequency symmetrical with respect to 0 is set as a group, and here, switching is performed every two symbols as described above, so that 256 symbols are transmitted on all 128 positive / negative carrier waves. That is, one arbitrary carrier is 256
The reference signal is transmitted at a symbol period.

The arithmetic unit 4 has a data sequence of 256 as an example.
When transmitted by one carrier, a 512-point IDFT operation is performed in which a signal is generated by performing an IDFT operation of double oversampling. At this time, the input assignment to the arithmetic unit 4 is as follows when the numbers are sequentially assigned in the input frequency alignment type.

N = 0 to 128 An information signal for modulating the carrier is provided.

N = 129 to 383 The carrier level is set to 0
And no signal is generated.

N = 384-511 An information signal for modulating the carrier is provided.

The operation unit 4 receives the 4-bit R signal and the 4-bit I signal at the 1st to 127th input terminals and the 385th to 511th input terminals, respectively, and outputs the 0th and 128th input signals. And a constant voltage is input to the 384th input terminal,
0 is input to the third input terminal, and a double oversampling IDFT operation is performed. As a result, the in-phase signal (I
Signal) and a quadrature signal (Q signal), a guard interval for reducing multipath distortion is inserted into each of the I signal and the Q signal, and then output to the output buffer 7.

Here, a total of 1 from the 1st to the 128th
The input information of the 28 input terminals is a carrier for information transmission on the upper side (higher frequency side) with respect to the center carrier frequency F0 transmitting the input information of the 0th input terminal (this is referred to as a positive carrier or a positive carrier in this specification). Carrier).
The input information of a total of 128 input terminals from the 384th to the 511th is a carrier for information transmission lower (lower side) with respect to the center carrier frequency F0 (this carrier is referred to as a negative carrier or carrier in this specification). ), Especially 1
As a result of the IDFT operation, the input pilot signals of the 28th and 384th input terminals are transmitted on carrier waves at both ends of the frequency, which is equivalent to half the Nyquist frequency,
0 is input to the remaining 129th to 383th input terminals (the ground potential), so that a carrier wave of that portion is not generated (not used for data transmission).

In the output buffer 7, the output operation result of the operation unit 4 is generated in a single IDFT operation, and 256 pieces of input information are generated in bursts as 512 time-axis signals (I signal and Q signal). On the other hand, since the circuits subsequent to the output buffer 7 operate continuously at a constant reading speed of the content of the output buffer 7, they are provided to adjust the time difference between the two.

Based on the clock from the clock divider 3 in FIG. 1, I
The I and Q signals resulting from the DFT operation are supplied to a D / A converter / low-pass filter (LPF) 8, where they are converted into analog signals using the clock from the clock divider 3 as a sampling clock. , LPF, the I signal and the Q signal of the components in the required frequency band are passed and supplied to the quadrature modulator 9, respectively.

The quadrature modulator 9 uses the 10.7 MHz intermediate frequency from the intermediate frequency oscillator 10 as a first modulation wave, and sets the phase of this intermediate frequency to 90 ° by the 90 ° shifter 11.
Using the 10.7 MHz intermediate frequency shifted by 0 ° as the second modulation wave, 257 waves (positive / negative) are subjected to quadrature amplitude modulation (QAM) with the I and Q signals of the digital data input from the D / A converter and LPF 8, respectively. An OFDM signal comprising 128 sets of information carriers and one center carrier is generated. The OFDM signal output from the quadrature modulator 9 is frequency-converted by the frequency converter 12 into an RF signal in a predetermined transmission frequency band, and then subjected to transmission processing such as power amplification in the transmission unit 13 and radiated from an antenna (not shown). You.

Next, the frequency division multiplex signal receiving apparatus shown in FIG. 2 will be described. This frequency division multiplexed signal receiving apparatus is characterized by the configuration of a guard interval period processing circuit 30 and a DFT / QAM decoding circuit 31, as described later. In FIG. 2, OF input through a spatial transmission path
The DM signal is received by a receiving unit 21 via a receiving antenna, then high-frequency amplified, further frequency-converted to an intermediate frequency by a frequency converter 22, amplified by an intermediate-frequency amplifier 23, and then extracted by a carrier extraction and quadrature demodulator. 24.

The carrier extraction circuit portion of the carrier extraction and quadrature demodulator 24 is a circuit for extracting the center carrier (carrier) of the input OFDM signal as accurately as possible with a small phase error. Here, each carrier for transmitting information is placed adjacent to every 387 Hz that is a symbol frequency and OFD
Since the M signal is formed, the carrier for information transmission adjacent to the center carrier is also separated by 387 Hz from the center frequency, and in order to extract the center carrier, the carrier for information transmission adjacent to the carrier only 387 Hz is separated. A circuit with high selectivity is required so as not to be affected. Therefore, the center carrier F0 is extracted using a PLL circuit in the carrier extraction circuit.

The center carrier F0 extracted by the carrier extraction and quadrature demodulator 24 is supplied to the intermediate frequency oscillator 25, where it is synchronized with the center carrier F0 by 10.7.
Generate an intermediate frequency of MHz. Intermediate frequency oscillator 2
5 is used as a first demodulated wave as the first demodulated wave.
4, while the phase is shifted by 90 ° by the 90 ° shifter 26, and then supplied to the carrier extraction and quadrature demodulator 24 as a second demodulated wave.

As a result, an analog signal (frequency division multiplexed signal) equivalent to the analog signal input to the quadrature modulator 9 of the transmitting apparatus is demodulated and extracted from the carrier extraction and quadrature demodulator section of the quadrature demodulator 24. , A low-pass filter (LPF) 28
, A signal of a required frequency band transmitted as OFDM signal information is passed, supplied to an A / D converter 29, and converted into a digital signal.

What is important here is the sampling timing for the input signal of the A / D converter 29, which is based on a sample synchronization signal having a frequency twice the Nyquist frequency, which is generated from the pilot signal by the synchronization signal generation circuit 27. Generated. That is, the pilot signal is set at a predetermined integer ratio with respect to the sample clock frequency, and the frequency of the pilot signal is multiplied according to the frequency ratio to obtain the timing of the sample clock.

A synchronizing signal generating circuit 27 receives a demodulated analog signal and generates a sample clock by a PLL circuit which is phase-synchronized with a pilot signal transmitted as a continuous signal in each symbol period including a guard interval period. And a symbol synchronization signal generation circuit for detecting the phase state of the pilot signal based on a signal extracted from a part of the sample clock generation circuit, detecting a symbol period, and generating a symbol synchronization signal.

When the symbol synchronization signal is generated, for example, as proposed by the present applicant in Japanese Patent Application No. 8-219242, data having the same guard interval as the data after the symbol is circulated. Has been
Paying attention to the fact that discontinuity occurs in almost all carriers only at the last data of the guard interval and the start data of the next symbol, an input demodulated signal (either I or Q signal) by a high-pass filter. (Phase Locked Loop) circuit by removing the information component of the carrier from the signal, extracting the residual high frequency component having the position information (symbol data) of the starting point of the symbol, converting it into a pulse train by a peak detector and a comparator. To generate a symbol timing clock with no jitter, and use this as the frequency division start signal of the frequency division circuit that divides the sample clock to obtain a symbol synchronization signal from the frequency division circuit. Is also good.

The digital signal extracted from the A / D converter 29 is supplied to a guard interval period processing circuit 30, where it is placed in a DFT window based on the sample clock and the symbol synchronization signal from the synchronization signal generation circuit 27. The quantitative digital data sequence is output to the DFT / QAM decoding circuit 31. DFT, QAM decoding circuit 31
Receives the input digital data sequence based on the sample clock from the synchronization signal generation circuit 27 and performs a complex Fourier operation on the input digital data sequence to obtain a received complex demodulated signal (decoded digital information signal) while decoding the symbol number. Further, a reception reference signal of the positive / negative carrier corresponding to the symbol number is obtained, a correction formula of the transmission path characteristic is detected based on the reference signal, and the demodulated signal of the reception complex number is corrected based on the correction formula. The DFT / QAM decoding circuit 31
Generates a forward signal and a backward signal described later.

The decoded digital information signal output from the DFT / QAM decoding circuit 31 is subjected to output processing such as parallel / serial conversion by the output circuit 32, and is output to the output terminal 33. Further, a forward signal and a backward signal described later generated by the DFT / QAM decoding circuit 31 are supplied to the guard interval period processing circuit 30, respectively.

FIG. 3 shows the DFT / QAM decoding circuit 31 described above.
FIG. 2 shows a block diagram of an example. As shown in FIG.
The T / QAM decoding circuit 31 includes a DFT operation circuit 311, a correction circuit 312, a control circuit 313, and a phase operation circuit 314. The digital data string input from the guard interval period processing circuit 30 to the DFT / QAM decoding circuit 31 is composed of an I signal I ′ and a Q signal Q ′.
Each is supplied to the DFT operation circuit 311 where D
After being subjected to the FT operation, they are decoded into transmission information R ′ and I ′, which are the respective modulated signals, and then supplied to the correction circuit 312, where the decoded values are corrected, and the correction values of the signals R ′ and I ′ are obtained. Each is output and output to the output circuit 32 of FIG.

Next, the operation of the correction circuit 312 will be described. The correction circuit 312 obtains the received value of the positive / negative carrier corresponding to the symbol number, that is, the received reference signal value, based on the symbol number in the transmission information decoded by the DFT operation. The received reference signal values are p _0s ′, q _0s ′, r _0s ′ and u _0s ′ for even symbols, and p _1s ′, q _1s ′, r _1s ′ and u _1s ′ for odd symbols. It shall be assumed.

Here, as proposed in the aforementioned Japanese Patent Application No. 8-43854, coefficients S0 to S7 represented by the following equations are calculated from the above reference signal values.

[0049]

(Equation 2)Here, S0 = (p_0s'・ X-p_1s'・ Y-q_0s'・ Y + q_1s'・ X) / 2 (X^Two-Y^Two ) S1 = (p_0s'・ Y-p_1s'・ X + q_0s'・ X-q_1s'・ Y) / 2 (X^Two-Y^Two ) S2 = (p_0s'・ X-p_1s'・ Y + q_0s'・ Y-q_1s'・ X) / 2 (X^Two-Y^Two ) S3 =-(p_0s'・ Y-p_1s'・ X-q_0s'・ X + q_1s'・ Y) / 2 (X^Two-Y^Two ) S4 = (r_0s'・ X-r_1s'・ Y + u_0s'・ Y-u_1s'・ X) / 2 (X^Two-Y^Two ) S5 =-(r_0s'・ Y-r_1s'・ X-u_0s'・ X + u_1s'・ Y) / 2 (X^Two-Y^Two ) S6 = (r_0s'・ X-r_1s'・ Y-u_0s'・ Y + u_1s'・ X) / 2 (X^Two-Y^Two ) S7 = (r_0s'・ Y-r_1s'・ X + u_0s'・ X-u_1s'・ Y) / 2 (X^Two-Y^Two ).

Of the above coefficients, S0 indicates the rate at which the real part of the positive carrier is transmitted to the real part of the positive carrier, and the rate at which the imaginary part of the positive carrier is transmitted to the imaginary part of the positive carrier. Is shown. S1 indicates the rate at which the real part of the positive carrier leaks to the imaginary part of the positive carrier, and the rate at which the imaginary part of the positive carrier leaks to the real part of the positive carrier. S2 indicates the rate at which the real part of the negative carrier leaks to the real part of the positive carrier, and the rate at which the imaginary part of the negative carrier leaks to the imaginary part of the positive carrier.

S3 indicates the rate at which the real part of the negative carrier leaks to the imaginary part of the positive carrier, and the rate at which the imaginary part of the negative carrier leaks to the real part of the positive carrier. S4 indicates the rate at which the real part of the positive carrier leaks to the real part of the negative carrier, and the imaginary part of the positive carrier is
The rate of leakage of negative carriers to the imaginary part is shown. S5
Indicates the rate at which the real part of the positive carrier leaks to the imaginary part of the negative carrier, and the rate at which the imaginary part of the positive carrier leaks to the real part of the negative carrier. S6 indicates the rate at which the real part of the negative carrier is transmitted to the real part of the negative carrier, and indicates the rate at which the imaginary part of the negative carrier is transmitted to the imaginary part of the negative carrier. S7 indicates a rate at which the real part of the negative carrier leaks to the imaginary part of the negative carrier,
This shows the rate at which the imaginary part of the negative carrier leaks to the real part of the negative carrier. Here, the description of-and + of the rate was omitted.

That is, the above-mentioned coefficients S0 to S7 indicate the characteristics of the transmission path of the I signal and the Q signal. By calculating these coefficients S0 to S7 from the received reference signal values by the above equation, the transmission path of the transmission path is obtained. The characteristic can be detected.

Further, by obtaining the inverse matrix of equation (2), it is possible to correct the received data and estimate the transmitted data. Here, the inverse matrix of the equation (2) is expressed by the following equation.

[0054]

(Equation 3) Here, H0 to H7 and det A in the above equation are represented by the following equations.

H0 = + S0 (S6S6 + S7S7) -S2 (S4S6 + S5S7) + S3 (S4S7-S5S6) H1 = + S1 (S6S6 + S7S7) -S3 (S4S6 + S5S7) -S2 (S4S7-S5S6) H2 = + S4 (S2S2 + S3S3) -S6 (S0S2 + S1S3) + S7 (S0S3-S1S2) H3 = + S5 (S2S2 + S3S3) -S7 (S0S2 + S1S3) -S6 (S0S3-S1S2) H4 = + S2 ( S4S4 + S5S5) -S0 (S4S6 + S5S7) -S1 (S4S7-S5S6) H5 = + S3 (S4S4 + S5S5) -S1 (S4S6 + S5S7) + S0 (S4S7-S5S6) H6 = + S6 (S1S0 + S1) -S4 (S0S2 + S1S3) -S5 (S0S3-S1S2) H7 = + S7 (S0S0 + S1S1) -S5 (S0S2 + S1S3) + S4 (S0S3-S1S2) det A = S0 × H0 + S1 × H1 + S4 × H2 + S
5 × H3 Then, the correction circuit 312 calculates the input coefficients S0 to S7
Then, det A and H0 to H7 are calculated based on the above equation, and the value of the following correction equation of the inverse matrix in the equation (3) is calculated from these calculated values and stored and held.

[0056]

(Equation 4) In this way, a correction formula for the corresponding positive / negative carrier is prepared. The corresponding positive / negative carrier is determined by the symbol number. Naturally, there is a correction formula for each carrier, and when 257 carriers are used as in this embodiment, about 12
Eight correction equations are sequentially calculated and held. In addition, the coefficient S0
Since S7 changes every moment, the correction formula is also updated every moment.

The correction circuit 312 calculates the following information on the received information from the DFT calculation circuit 311 using the above-described correction formula calculated and held based on the value of the received reference signal, with each set of positive and negative carriers. The transmission information R ′ and I ′ corrected by the above are output.

[0058]

(Equation 5) In the equation (5), a to d are the reception corrected data, the complex number of the received data (after correction) allocated to the corresponding positive carrier is (a + jb), and the reception data corrected to be received and allocated to the corresponding negative carrier. The complex number (after correction) is (c +
jd), the values a ′ to d ′ correspond to (a ′ + jb ′) the complex number of the received data (before correction) allocated to the corresponding positive carrier that has been received and decoded, and This is a value when the complex number of the allocated received data (before correction) is (c ′ + jd ′).

Next, the operation of the control circuit 313 and the phase calculation circuit 314, which are main parts of the present embodiment, will be described.
In an initial state such as power-on, the synchronization signal generation circuit 27
The DFT window is designated based on the symbol synchronization signal output from the DFT window, and the digital data sequence of the DFT window is input to the DFT operation circuit 311 and DFT
After the FT calculation, it is input to the correction circuit 312 to perform the above-described correction operation.

At this time, the control circuit 313
Based on the decoded symbol number input from 12, it is monitored whether the symbol number has completed one cycle, that is, whether one frame period has elapsed. This is because the coefficients S0 to S7 are obtained for all carriers. When detecting that the symbol number has completed one round, the control circuit 313 issues a calculation instruction to the phase calculation circuit 314.

The phase calculation circuit 314 calculates the coefficient S of each carrier held by the correction circuit 312 based on the calculation command.
The values 0, S1, S6, and S7 are fetched, the following calculation is performed, and the calculation result (integrated value) is passed to the control circuit 313. Here, the coefficients S0 and S1 prominently represent the characteristics of the positive carrier, and the coefficients S6 and S7 prominently represent the characteristics of the negative carrier. Performance can be secured. The coefficients S2 to S5 are smaller values than the coefficients S0, S1, S6 and S7,
The effect of reducing the amount of calculation can be ignored.

Next, the operation of the phase operation circuit 314 will be described. Now, the coefficients S0 and S1 of the + 10th carrier
To S0 ₊₁₀ , S1 ₊₁₀ , and the coefficients S6, S
7 is S6 _-10 , S7 _-10 , the coefficient S0 of the + 20th carrier,
S1 is S0 _{+ 20} , S1 _{+ 20} , the coefficient S of the -20th carrier
6, S7 and S6 _-20, When S7 _-20, these channel characteristics coefficient is shown in FIG.

Therefore, the phase difference θ between the + 10th carrier and the + 20th carrier can be expressed by the following equation.

Θ = θ _{+ 20} −θ _{+ 10} ≒ tan (θ _{+ 20−} θ _{+ 10} ) = (tanθ _{+ 20−} tanθ _{+ 10} ) / (1 + tanθ _{+ 20} · tanθ _{+ 10} ) = {(S1 _{+ 20} / S0 ₊₂₀ )-(S1 ₊₁₀ / S0 ₊₁₀ )} / {1+ (S1 ₊₂₀ / S0 ₊₂₀ ) · (S1 ₊₁₀ / S0 ₊₁₀ )} = (S0 ₊₁₀・ S1 ₊₂₀ -S0 _{+ 20} · S1 _{+ 10} ) / (S0 _{+ 10} · S0 _{+ 20} + S1 _{+ 10} · S1 _{+ 20} ) Therefore, the phase calculation circuit 314 calculates the phase difference θ between the + 10th carrier and the + 20th carrier to tan (θ ₊₂₀ −θ
₊₁₀ ), I _{+ 10} = tan (θ _{+ 20−} θ _{+ 10} ) = {S0 _{+ 10} · S1 _{+ 20} -S0 _{+ 20} · S1 _{+ 10} } / {S0 _{+ 10} · S0 _{+ 20} + S1 ₊₁₀・ S1 ₊₂₀ } is calculated. Similarly, the phase calculation circuit 314 calculates the phase difference θ between the −10th carrier and the −20th carrier as tan (θ)
And I _-10 = tan (θ) = {S6 _-10 · S7 _-20 -S6 _-20 · S7 _-10 } / {S6 _-10 · S6 _-20 + S7 _-10 · S7 _-20 } I do. Hereinafter, similarly, the + X carrier and the + (X
+10) approximately I + _X = the phase difference θ between the carrier _{{S0 + X · S1 + X} + 10 -S0 + X + 10 · S1 + X} / {S0 + X · S0 + X + 10 + S1
_{+ X} · S1 _{+ X + 10} calculates the}, and the -X carrier the - (X + 10) to the phase difference θ between the carrier approximately _{I -X = {S6 -X · S7} -X-10 -S6 - _X-10・ S7 _-X } / {S6 _-X・ S6 _-X-10 + S7
_-X・ S7 _-X-10 } is calculated.

Here, X is a positive integer and the phase difference for every 10 carriers is calculated, so that 10, 20, 30, 40, 5
0,. . . Take the value of Further, as an example, the number of carriers is ±
In the case of 128 lines, X =. . . , 100, and 110.

In this embodiment, the phase difference for every 10 carriers is obtained.
It does not affect the final result to be obtained for each carrier, that is, the judgment result. If there is a restriction on the calculation time, the calculation may be performed only in the positive carrier direction on one side,
Further, the carrier at the end may be omitted.

Next, the phase calculation circuit 314 adds the phase difference in each of the positive direction and the negative direction, sums up the absolute values thereof to obtain an integrated value I, and outputs this to the control circuit 313 as a calculation result. Here, I = I ₊ + I ₋ = | I ₊₁₀ + I ₊₂₀ + I ₊₃₀ +. . . + I
₊₁₀₀ + I ₊₁₁₀ | + | I- ₁₀ + I- ₂₀ + I- ₃₀ +. . . + I
_-100 + I _-110 |. The control circuit 313 calculates the above calculation result (integrated value I)
And then compare the previous integrated value with the current integrated value,
When the current integrated value is less than the previous integrated value, a forward signal is output to the guard interval period processing circuit 30, and when the current integrated value is larger than the previous integrated value, a backward signal is output to the guard interval period processing circuit 30. I do. When this integrated value is the minimum, the DFT window matches the effective symbol period.

Next, the guard interval period processing circuit 3
0 and the operation will be described with reference to FIGS. The guard interval period processing circuit 30 includes a data management circuit 301 and an adjustment circuit 302 as shown in FIG. The data management circuit 301, based on the start signal output from the adjustment circuit 302, uses the A / D converter 29 shown in FIG.
Output digital data string (I signal I ', Q signal Q')
Are transmitted to the DFT / QAM decoding circuit 31.

The adjustment circuit 302 clears the count value with the symbol synchronization signal shown in FIG. 5A input from the synchronization signal generation circuit 27 at the start of the operation, and thereafter, the diagram input from the synchronization signal generation circuit 27 The sample clock shown in FIG. 5B is counted, and a start signal is output to the data management circuit 301 every 524 counts as shown in FIG. 5C.

Here, since decoding is performed by a 512-point DFT operation, the digital signal includes 512 digital data and 12 digital data for a guard interval.
For one symbol of the OFDM signal schematically shown in FIG. 5E, the symbol synchronization signal and the sample clock have the relationship shown in FIGS. 5A and 5B. Here, FIG.
The output digital data sequence of the A / D converter 29 schematically shown in (D) has only 512 data from the start signal out of the 524 digital data constituting one symbol as DFT data within the DFT window. It is transmitted to QAM decoding circuit 31, and the remaining 12 data are not transmitted.

As described with reference to FIG. 12, the start signal shown in FIG. 5C does not have a phase relationship for extracting data of an accurate effective symbol period of the OFDM signal shown in FIG.
Since the start signal does not exist in the interference area of the adjacent symbol shown by hatching in FIG. 5E, data decoding is possible. However, in this state, coefficients between adjacent carriers are significantly different in phase relationship.

When the forward signal is input from the DFT / QAM decoding circuit 31, the adjusting circuit 302 performs the operation of thinning out one sample clock. Thereby, the adjustment circuit 302
As shown in FIG. 5 (F), the start signal output from
The signal is delayed by one sample clock cycle. Receiving this start signal, the data management circuit 301 transmits the second to 513th digital data strings as compared with the digital data strings in the initial state, and the first and last 11 digital data strings are transmitted. It operates by setting a DFT window that does not transmit the minutes.

Thereafter, the adjusting circuit 302 outputs a start signal delayed by one sample clock cycle by thinning out one sample clock also for the next forward signal. The first two data streams and the last one are transmitted.
It operates so as not to transmit 0 data. Hereinafter, similarly, the start signal gradually moves toward the end of the guard interval, and the data management circuit 301 operates to gradually transmit the subsequent digital data sequence.

The integrated value of the phase difference is minimum when the start signal is at the last position of the guard interval, becomes large when the start signal is within the effective symbol period, and is closer to the head of the guard interval. The integrated value increases. Therefore, when the start signal reaches the valid symbol period, a backward signal is output from the DFT / QAM decoding circuit 31 this time, whereby the adjustment circuit 302 operates to add one sample clock.

Thus, the start signal output from the adjustment circuit 302 is a signal whose phase is advanced by one sample clock cycle. In response to the start signal, the data management circuit 301 operates to transmit the data stream one data stream ahead of the digital data stream in the initial state. Hereinafter, similarly, the start signal gradually moves toward the interference area with the adjacent symbol, and the data management circuit 301
Operates so as to gradually transmit the digital data stream ahead.

The adjusting circuit 302 includes, for example, a 512 frequency dividing circuit 3021 and a shift register 302 as shown in FIG.
2 and a selector 3023. The adjusting circuit 302 outputs a frequency-divided pulse every time the 512 frequency dividing circuit 3021 is cleared by the symbol synchronization signal and counts 512 sample clocks. Shift register 3
022 receives the frequency-divided pulse, performs a shift operation in synchronization with the sample clock, and inputs, for example, an 8-bit output to the selector 3023.

When the forward signal is input to the up terminal, the selector 3023 selects an output pulse whose phase is delayed by one sample clock from the output of the shift register 3022 from the output of the shift register 3022, and the reverse signal is input to the down terminal. In this case, a pulse whose phase is advanced by one sample clock from the previous time is selected and output as a start signal.

The guard interval period processing circuit 30
Upon receiving the forward signal, the above operation is performed, and the control circuit 313 in the DFT / QAM decoding circuit 31 monitors whether the symbol has completed one cycle based on the symbol number transmitted by the correction circuit 312 as in the previous time, When it is detected that the symbol has made one round, an operation instruction is issued to the phase operation circuit 314. The phase calculation circuit 314 fetches the coefficients S0, S1, S6, and S7 of the respective carriers held by the correction circuit 312 based on the calculation command, and sends the calculation result (integrated value) to the control circuit 313, as in the previous case.

The control circuit 313 compares the previous integration result with the current integration result as described above. If the current integration result is smaller, the control circuit 313 further issues a forward signal and repeats the above operation. If the size of the integration result is larger this time (the minimum value of the phase means that it was the last time),
A reverse signal is generated to complete the determination of the optimum position.

The guard interval period processing circuit 3
As another embodiment of the 0 and DFT / QAM decoding circuit 31, the guard interval period processing circuit 30 is composed of a storage circuit for several symbols, and is based on the output symbol synchronization signal of the synchronization signal generation circuit 27 and the sample clock. The digital data string may be formed in a ring shape.
The T, QAM decoding circuit 31 may be constituted by a central processing unit (CPU) processor.

FIG. 8 is a flowchart for explaining the operation of the CPU processor constituting the DFT / QAM decoding circuit 31. In the figure, when the power is turned on (step 4
1) It is monitored whether the symbol number from the correction circuit 312 has made one cycle (step 42). When the symbol has made one cycle, the coefficient S of each carrier held by the correction circuit 312 is monitored.
0, S1, S6, and S7 are fetched, and the above-described phase difference integration calculation is performed (step 43). If the calculation is the first time, the process returns to step 42 again to monitor whether the symbol number has completed one round, and the second time If it is after that, the magnitudes of the previous integration result and the current integration result are compared (steps 44 and 45).

In step 45, if the present integration result is less than the previous integration result, a forward signal is issued, and as described above, the data management circuit 301 transmits the data fetch position so as to transmit the data sequence one data forward. Is incremented by one (step 46), and the process returns to step 42 again to monitor whether the symbol number has completed one cycle.

In step 45, if the current integration result is larger than the previous one (the minimum value of the phase means that it was the last time), a retreat signal is generated and the data management circuit 301 The address of the data fetch position is returned by one (step 47) so as to transmit the subsequent data string, and the determination of the optimum position is completed (step 4).
8).

As an example of the symbol configuration, a pre-guard interval may be inserted in addition to the guard interval. That is, as shown in FIG. 9A, when the 512-point IFFT calculation result is that the first two digital data of the 512 digital data B are A and the last ten digital data are C, As shown in FIG. 7B, 512 digital data B are arranged in the effective symbol period, 10 digital data C are arranged in the leading guard interval, and two digital data C are arranged in the last pre-guard interval. The data A is arranged to form one symbol.

This is an anti-interference measure for a ghost wave that arrives before the desired wave. O having such a configuration
The present invention can also be applied to FDM signals.

Further, in the present embodiment, an example has been shown in which the reference signal insertion method is transmitted and received using a set of positive and negative carriers, but as described above, coefficients S0 and S1 and S6 and S7 are used, and Sufficient accuracy can be ensured without using S2 to S5. That is, as another example, the present invention is sufficiently applicable to an OFDM signal transmission / reception system that does not transmit / receive a reference signal using a pair of positive and negative carriers.

[0087]

As described above, according to the present invention,
Calculate the approximate value of the phase difference between nearby carriers, further calculate the approximate value of the above phase difference for each of the set number of carriers, integrate them, and input the integrated value at the time of the previous input and the current input By comparing the time and the time, the phase of the time window is adjusted and controlled according to the result of the comparison so that the beginning of the effective symbol period can be accurately detected. When noise is removed by coefficient averaging, the deviation of the averaged coefficient that occurs can be minimized, thereby improving the performance of the apparatus.

Further, according to the present invention, the performance relating to the generation of the symbol synchronization signal may be the same as that of the related art, and the positional deviation of the symbol synchronization signal can be minimized by a simple circuit or software.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a transmission system of an orthogonal frequency division multiplex signal transmission method according to the present invention.

FIG. 2 is a block diagram of an embodiment of a receiving system and a receiving apparatus of the orthogonal frequency division multiplexing signal transmission method according to the present invention.

FIG. 3 is a block diagram illustrating an example of a DFT and QAM decoding circuit in FIG. 2;

FIG. 4 is a block diagram of an example of a guard interval period processing circuit in FIG. 2;

FIG. 5 is a timing chart for explaining the operation of FIG. 4;

FIG. 6 is a block diagram of an example of an adjustment circuit in the guard interval period processing circuit of FIG. 4;

FIG. 7 is a diagram for explaining the operation of the phase calculation circuit of FIG. 3;

FIG. 8 is a flowchart illustrating an operation when the DFT / QAM decoding circuit is configured by a CPU processor.

FIG. 9 is a diagram showing another symbol configuration example to which the present invention can be applied.

FIG. 10 is a baseband time axis waveform diagram of an OFDM signal.

FIG. 11 is a diagram illustrating an example of a symbol configuration of an OFDM signal.

FIG. 12 is a diagram illustrating the position of a symbol synchronization signal when a desired wave and a delayed ghost wave are received.

[Explanation of symbols]

Reference Signs List 2 input circuit 3 clock divider 4 arithmetic unit 5 symbol number counting circuit 6 reference signal insertion circuit 7 output buffer 8 D / A converter / low-pass filter (LPF) 9 quadrature modulator 10, 25 intermediate frequency oscillator 11, 26 90 ° shifter 12, 22 Frequency converter 21 Receiver (receiving means) 24 Carrier extraction and quadrature demodulator (demodulating means) 27 Synchronous signal generating circuit (synchronizing signal generating means) 29 A / D converter 30 Guard interval period processing circuit (Guard interval period processing means) 31 DFT, QAM decoding circuit 32 Output circuit 301 Data management circuit 302 Adjustment circuit (Adjustment control means) 311 DFT operation circuit (Decoding means) 312 Correction circuit (Correction means) 313 Control circuit (Adjustment control means) ) 314 Phase operation circuit (phase operation means) 3021 512 frequency dividing circuit 302 2 shift register 3023 selector

Claims (5)

[Claims] The transmitting side separately modulates each of a plurality of carriers having different frequencies from each other with an information signal to be transmitted allocated to each carrier, and obtains a known reference signal using a predetermined carrier among the plurality of carriers. A signal is transmitted, a frequency division multiplexed orthogonal frequency division multiplexed signal is generated, and transmitted in a symbol unit including a guard interval and an effective symbol period. On the receiving side, a symbol synchronization signal is generated from the received frequency division multiplexed signal. Then, the received frequency division multiplexed signal included in the time window set based on the symbol synchronization signal is subjected to discrete Fourier transform to decode the information signal to be transmitted and the reference signal, and the carrier wave is obtained from the reference signal. , A correction equation is calculated from the detected transmission path characteristic, stored, and decoded using the correction equation. An orthogonal frequency division multiplexing signal transmission method for correcting a signal, wherein the receiving side uses a coefficient representing the channel characteristics to calculate an approximate value of a phase difference between a pair of adjacent carriers among the plurality of carriers. The calculation is performed for each of the set number of carrier waves, the integrated value of the approximate value is obtained, the previous integrated value is compared with the current integrated value, and the calculated integrated value is obtained according to the comparison result. A method for transmitting an orthogonal frequency division multiplexed signal, wherein a phase of the time window is adjusted so that a value is minimized. 2. The transmitting side separately modulates each of a plurality of carriers having different frequencies from each other with an information signal to be transmitted allocated to each carrier, and symmetrically symmetrical with respect to a center carrier among the plurality of carriers. A known reference signal is transmitted with a set of a positive carrier on the high frequency side and a negative carrier on the low frequency side, and a set of positive and negative carriers transmitting the known reference signal is transmitted with a specific carrier or transmission parameter. Designated by a symbol number, and sequentially and cyclically changed at regular intervals to generate a frequency-division multiplexed orthogonal frequency division multiplexed signal and transmit it in a symbol unit consisting of a guard interval and an effective symbol period. Generating a symbol synchronization signal from the received frequency division multiplexed signal, and including the received frequency included in a time window set based on the symbol synchronization signal. The information signal to be transmitted and the symbol number are decoded by discrete Fourier transform of the division multiplexed signal, the reference signal is decoded based on the decoded symbol number, and the real part and the imaginary number of the positive carrier are decoded from the reference signal. Part, based on the leakage component to each of the real part and the imaginary part of the negative carrier, to detect the transmission path characteristics, calculate and store a correction formula from the detected transmission path characteristics, and use the correction formula. An orthogonal frequency division multiplexing signal transmission method for correcting the decoded information signal, wherein the receiving side uses a coefficient representing a leakage component of the transmission path characteristic, and uses a pair of carrier waves in the vicinity of the plurality of carrier waves. Calculating the approximate value of the phase difference between each of the set number of carrier waves, obtaining the integrated value of the approximate value for each predetermined period, and comparing the previous integrated value with the current integrated value. And that Depending on the compare result, orthogonal frequency division multiplex signal transmitting method, characterized in that the integrated value obtained to adjust the time window of phase so that the minimum. 3. A digital information signal to be transmitted on a plurality of carriers having different frequencies from each other, and a positive carrier on a higher frequency side and a negative carrier on a lower frequency side symmetrical with respect to a center carrier among the plurality of carriers. A known reference signal is inserted into a set of carrier waves, and a set of positive and negative carrier waves for transmitting the reference signal is designated by a symbol number transmitted by a specific carrier or transmission parameter, and cyclically sequentially every fixed period. Receiving means for receiving an orthogonal frequency division multiplexed signal transmitted in a symbol unit consisting of a guard interval and an effective symbol period, and receiving orthogonal frequency division multiplexed signals from the receiving means. Demodulation means for performing quadrature demodulation to obtain an information signal represented by a complex number, the symbol number, and a reference signal; and A synchronizing signal generating means for generating a symbol synchronizing signal of the symbol unit cycle; and setting a time window based on the symbol synchronizing signal, and within this time window, an information signal from the demodulating means, the symbol number, and a reference. Guard interval period processing means for passing signals respectively; decoding means for decoding the digital information signal by discrete Fourier transforming the signal from the guard interval time processing means, and decoding the symbol number and reference signal; Decoding the reference signal from the symbol number from decoding means, from the reference signal real part and imaginary part of the positive carrier, based on the leak component to each of the real part and imaginary part of the negative carrier A transmission path characteristic is detected, a correction equation is calculated from the transmission path characteristic and stored, and the decoding is performed using the stored correction equation. Correction means for correcting the decoded signal of the digital information signal from the means, using a coefficient representing a leakage component of the channel characteristics, using the approximate value of the phase difference between a pair of carriers in the vicinity of the plurality of carriers. The calculation is performed for each of the set number of carrier waves, and the integrated value of the approximate value is calculated every predetermined period, and the integrated value input from the phase calculating means is calculated at the time of previous input and at the current time. Compare with the time of input, and according to the comparison result,
An orthogonal frequency division multiplex receiving apparatus, comprising: an adjustment control unit that adjusts and controls the phase of the time window so that the obtained integrated value is minimized. 4. A transmission path in which a real part and an imaginary part of a first carrier which is one of the pair of carriers in the vicinity leaks to a real part and an imaginary part of the first carrier. Ax is a characteristic coefficient, Ay is a transmission path characteristic coefficient in which the real part and the imaginary part of the first carrier leak to the imaginary part and the real part of the first carrier, and the real number of the second carrier which is the other carrier. And the imaginary part is Bx, the transmission path characteristic coefficient leaking to the real part and the imaginary part of the second carrier, and the real part and the imaginary part of the second carrier are the imaginary part and the real part of the second carrier. Assuming that the leaked channel characteristic coefficient is By, (Ax · By−Bx · Ay) / (Ax · Bx + Ay · B)
y), the approximate value of the phase difference between the pair of adjacent carrier waves is calculated, and the same calculation is performed for each of the set number of carrier waves, and the integrated value of the approximate values is obtained for each predetermined period. 4. The orthogonal frequency division multiplexed signal receiving apparatus according to claim 3, wherein: 5. The adjustment control means compares the integrated value input from the phase calculating means between a previous input and a current input, and when the current integrated value is equal to or less than the previous integrated value, a forward signal And a control circuit that outputs a backward signal when the current integrated value is larger than the previous integrated value, and delays the time window by one sample clock when the forward signal is input, and the reverse signal is input. When the time window
4. An orthogonal frequency division multiplexed signal receiving apparatus according to claim 3, further comprising an adjusting circuit for advancing a sample clock.