JPH0965378A - Defective picture element detection circuit for solid-state image pickup element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect a defective picture element with a high precision without setting a threshold especially with a high precision by temporarily selecting defective element candidates by rough threshold processing and taking the accumulation value of image pickup signals, which are obtained by plural times of exposure thereafter, as the comparison object. SOLUTION: A mechanical light shielding mechanism 20 which shields light from an object is arranged in the front of an optical system 1 consisting of plural lenses, and light incidence on the optical system 1 is intercepted manually or electrically. The output level of each picture element of a CCD 2 is compared with a 1st prescribed threshold by the 1st photoelectric conversion in this light shielding state, and pairs of position information of picture elements having output levels lower than the 1st threshold and these output levels are stored as defective picture element candidates, and the accumulation value of output levels of the CCD 2 obtained by prescribed- number of times of photoelectric conversion thereafter is calculated with respect to each of only candidate picture elements, and respective accumulation values are compared with a 2nd threshold set based on an average value of all picture elements of the CCD 2, and only the candidate picture element having the accumulation value abnormally larger than it is correctly recognized as a defective picture element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a defective pixel detection circuit for a solid-state image pickup device suitable for application to an image pickup device such as a video camera or an electronic still camera capable of detecting a defective pixel and correcting the defective pixel. .

[0002]

2. Description of the Related Art C such as a video camera and an electronic still camera
In an image pickup device using a CD element, among the pixels of the CCD element, a so-called defective pixel that outputs a signal of a peculiar level in a state where no light is incident, that is, the image quality of an image obtained by image pickup is improved. There was a problem of deterioration. Such defective pixels occur not only in the initial defective state but also in the temporal change. Therefore, the defective pixels are detected at the time of shipment of the image pickup apparatus main body and periodically, the position information of the defective pixels is stored in the storage device, and before the signal processing is performed after the image is actually captured by the image pickup apparatus, the defective pixels are detected. It is generally practiced to read out the position information of a pixel from a storage device and interpolate the defective pixel one-dimensionally or two-dimensionally with the image pickup signals of the surrounding non-defective pixels.

For example, in Japanese Unexamined Patent Publication No. 5-260385 (H04N5 / 335), the image pickup signal level of each pixel of the CCD is compared with a predetermined threshold value in a state where no light is incident on the CCD, and an abnormal level exceeding the threshold value is obtained. The position of each pixel on the CCD is stored in the register, and the pixel corresponding to the position data stored in this register is stored a predetermined number of times (for example, 10 pixels).
There is disclosed a defective pixel detection method having a configuration capable of preventing erroneous detection due to the influence of noise or the like by erasing this position data from the register when the abnormal level does not continuously occur more than once.

[0004]

Generally, since it is necessary to include the white level to the black level of the CCD output within the dynamic range, a normal pixel and a defect obtained by one photoelectric conversion in the output of the CCD when the light is shielded. The level difference between the output levels of the pixels is not so large, and therefore it becomes very difficult to set the threshold value in the threshold value processing as in the conventional example. For example, if the threshold value is set too high, a defective pixel will be erroneously determined as a normal pixel, and if it is too small, a normal pixel will always be erroneously recognized as a defective pixel. In particular, the output is, for example, 10 as in the prior art.
If the pixel cannot be recognized as a defective pixel unless the threshold value is continuously exceeded once in a row, if the pixel value falls below the threshold value even for a moment, it is determined that the pixel is not a defective pixel and the defective pixel is overlooked.

[0005]

According to the present invention, there is provided a light-shielding condition
By the photoelectric conversion for the second time, the output level of each pixel of the CCD is compared with a predetermined first threshold value, and the position information and output level of the pixel lower than the first threshold value are paired and stored as a candidate of the defective pixel. Only for the pixel, the cumulative value of the output level of the CCD obtained by the photoelectric conversion a predetermined number of times thereafter is calculated for each candidate pixel, and the cumulative value is set from the average value of all the pixels of the CCD. It is characterized in that only a candidate pixel having a cumulative value that is abnormally larger than the second threshold value is officially recognized as a defective pixel as compared with the threshold value.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a portion of the electronic still camera that is the device of this embodiment, which is particularly related to defective pixel detection. In the figure, reference numeral 1 denotes an optical system composed of a plurality of lenses, and a mechanical light shielding mechanism 30 for shielding light from a subject is arranged in front of the optical system 1, and the optical system 1 is manually or electrically operated. It becomes possible to block the incidence of light.

Incident light from a subject that has passed through the optical system 1 is imaged on the CCD 2 and photoelectrically converted into an image pickup signal. still,
The CCD 2 is driven so as to photoelectrically convert the incident light in one frame period. The CCD 2 is composed of a plurality of m pixels, and the image pickup signal of each of these pixels is digitalized by the A / D converter 3 in the subsequent stage. The converted A / D converted output is stored in the main image memory 4 as image data for each of all pixels. Here, the CCD 2 is driven and controlled by the reference timing signal generated from the timing signal generating circuit 5,
This reference timing signal is also supplied to the address generation circuit 6.

The address generation circuit 6 has a counter for counting the reference timing signal, and has a function of outputting the count value as an address corresponding to each pixel of the CCD 2 on a one-to-one basis. The pixel address represented by the coordinates (1,1) at the upper left corner is "1", the address of the central pixel is "m / 2", and the address of the pixel at the lower right coordinates is "m".

Reference numeral 7 is a write / read control circuit for executing write and read control with respect to the main image memory 4 using the address information from the address generation circuit 6 as a write address or a read address, and a system controller (not shown) ( Writing / reading of the main image memory 4 is controlled according to a mode signal issued from the system controller.

Reference numeral 20 denotes a switch for selecting an address output from the address generation circuit 6 and an address stored in a position memory section 9 described later when the address is supplied to the write / read control circuit 7. 20a, 20b and 20c according to the mode signal.

When the defective pixel detection operation is executed, the syscon selects one of three types of mode signals for sequentially executing the three modes of the defect candidate pixel registration mode, the cumulative value calculation mode and the defective pixel determination mode. Will be output.

Reference numeral 8 designates a pixel which is determined to be a defective pixel as a defect candidate pixel, a position memory section 9 for storing the address of the candidate pixel in the main image memory 4 as position information, and this candidate pixel. It is a defect candidate pixel memory including a level memory unit 10 for storing the image data in 1) as level information.

11 is a defect candidate pixel registration mode,
The preset first threshold value THL1 and the main image memory 4
Is a comparator for comparing the image data values of the respective pixels, and the image data value is the first threshold value THL1 according to the comparison result.
For pixels that exceed the threshold, the first pixel is stored in the defect candidate pixel memory 8.
A registration command is issued, and in response to the first registration command, the defect candidate pixel memory 8 stores the address and image data value of this pixel in a predetermined position in the position memory unit 9 and the level memory unit 10, respectively. When inputting the image data value from the main image memory 4 to the level memory unit 10, the main image memory 4
A switch 22 that is switched by a mode signal from the syscon is disposed between the switch and the level memory unit 10. In the defect candidate pixel registration mode, the switch 22 switches to the fixed contact 22a side and is read from the main image memory 4. The input of the image data to the level memory unit 10 is permitted.

Further, the switch 22 is switched to the contact 22b to allow the input of the output of the adder 14 to the level memory section 10 in a cumulative value calculation mode which will be described later, and is opened in any of these modes. The contact 22c is switched to the closed contact 22c to prohibit the data update of the level memory unit 10.

Reference numeral 21 is a switch that is closed only in the defect candidate pixel registration mode so that the image data output from the main image memory 4 can be input to the adder 12 in the subsequent stage only in the defect candidate pixel registration mode, and a mode signal from the syscon. The opening and closing is controlled by.

The adder 12 is an adder that sums up all the image data values of all the pixels sequentially read out from the main image memory 4 in the defect candidate pixel registration mode, that is, digitally integrates, and is for one screen (frame). When the sum total of the image data of all pixels is calculated, the second threshold value THL2 used in the defective pixel determination mode is calculated by the threshold value calculation circuit 13 in the subsequent stage by the formula 1. In this equation 1, D [i] (i
Is an integer from 1 to m) is the image data value of each pixel, and m is a CCD
, N is the total number of exposures in the defect candidate pixel registration mode and the cumulative value calculation mode, that is, the number of photoelectric conversions, and this number is preset. In addition, Q is a threshold offset value set in advance by an experiment.

[0017]

[Equation 1]

Reference numeral 14 denotes CC in the cumulative value calculation mode.
Each time D2 is exposed every 1/30 second to output a photoelectric conversion output and the stored content of the main image memory 4 is updated, the address of the defect candidate pixel stored in the position memory unit 9 is used as a read address. This is an adder that reads out the image data of the defect candidate pixel from the main image memory 4 and adds it to the image data of the same defect candidate pixel stored in the level memory unit 10. This added value is passed through the switch 22 and the level memory unit. It is returned to 10 and the stored contents are updated. Therefore, the cumulative value of the defect candidate pixels is always stored in the level memory unit 10 for each defect candidate pixel.

In the cumulative value calculation mode, the switch 20
Switches to the fixed contact 20b, and the write / read control circuit 7
The address of the defect candidate pixel stored in the position memory unit 9 is sequentially input to the write / read control circuit 7 with this address as a read address and only the image data of the defect candidate pixel is sequentially read.

In the defective pixel discrimination mode, reference numeral 15 designates the cumulative value of each image data of the defective candidate pixels stored in the level memory unit 10 and the second threshold value THL2 calculated by the threshold value calculation circuit 13 as the defect candidate pixel. It is a comparator that compares each time, and issues a second registration command for a defect candidate pixel whose cumulative value exceeds the second threshold value THL2.

Numeral 16 is a defective pixel memory in which the second registration command is a defective pixel memory for fetching the address corresponding to this pixel from the position memory unit 9 for the pixel issued from the comparator 15, and storing it as a defective pixel. When all of the cumulative value calculation mode and the defective pixel determination mode are completed, the address of the pixel determined as the defective pixel is finally stored in the defective pixel memory 16.

Next, the operation of the above-mentioned block diagram will be described with reference to the flowchart of FIG.

First, as shown in step S1, the light blocking mechanism 30 blocks light from entering the optical system 1, and then, in step S2, the CCD 2 is exposed to light for the first time, that is, photoelectric conversion is performed in this light blocking state. I do. The syscon first outputs a mode signal of the defect candidate pixel registration mode, and in response to this, the switch 20 switches to the contact 20a side, and the write / read control circuit 7 causes the CCD 2 to operate based on the address output from the address generation circuit 6. The outputs of all the pixels from are digitized and stored in the main image memory 4 for each pixel.

The image data of the pixel corresponding to the address i in FIG. 2 is represented by D [i], and the addresses 1 to m are prepared as described above to enable storage of the total number m of pixels. Therefore, the image data is D [1] to D [m].

In step S3, variables i and j, which are integers for executing the defect candidate pixel registration mode, are set to "1".
In addition, the variable S is initialized to "0".

When the image data of all the pixels are stored in the main image memory 4 in this way, the writing / reading control circuit 7 finishes the writing of the image data in step S4, and then starts the reading of the data of each pixel. .

Next, as in step S4, the read image data D [i] of each pixel is compared with the first threshold value THL1 by the comparator 11, and only for the pixels exceeding this threshold value THL1, this pixel is selected. As a defect candidate pixel, a candidate pixel memory 8 is paired with an address in the image memory 4 corresponding to a position on the CCD 2 and an image data value, and in step S5, the corresponding address of this pixel is set to P [j] and the position memory unit 9 and stores the image data value of this pixel at L
It is stored in the level memory unit 10 as [j]. This operation is executed while incrementing the variable j.

For example, as shown in FIG. 2, D [i]> TH
When pixels exceeding L1 are expressed by X and Y coordinates on CCD2, (x1, y1) (x2, y2) (x3, y3) (x
4, y4) (x5, y5) (x6, y6) (x7, y
7) In the case of 8 pixels of (x8, y8), the address of each of these pixels on the main image memory 4 is P [1].
To P [8] are stored in the position memory unit 9, and at the same time, the image data values at these eight pixels are respectively stored in the level memory unit 10.
To memorize.

In step S6, the image data of each pixel of the CCD 2 is added, and the sum S of the image data values of all pixels is added.
And then incrementing the variable i, step S
The operations of 4 to step S6 are repeated, and in step S7, the variable i is the total number of pixels m of the CCD 2, that is, the main image memory 4
When the number of all addresses prepared for storing image data is exceeded, the first threshold value THL1 is set for the image data of all pixels.
Step S8 is performed in preparation for a mode to be executed later after the work of registering larger pixels as defect candidate pixels is completed.
At U = S / m × N, a value U is calculated by multiplying the average value of the image data of all pixels by a predetermined integer N, and the variable k is set to “1”.
And the number J of candidate pixels stored in the candidate pixel memory 8 is derived from j-1.

Next, the cumulative value calculation mode is entered. In this mode, first, the variable j is initially set to "1" in step S9, and then in step S10, the second exposure is performed in the light-shielded state, that is, the CCD 2 is photoelectrically converted, and the second photoelectric conversion output is mainly used. The writing / reading control circuit 7 executes writing control so as to write in the image memory 4, and the image data at all addresses of the main image memory 4 are updated by these new data.

In this cumulative value calculation mode, the switch 20
Switches to the contact 20b side, and the switch 21 is opened. Along with this, the image data obtained by the second photoelectric conversion of the defect candidate pixels registered in the position memory unit 9 is read from the main image memory 4, and the same candidate stored in the level memory unit 10 is read as in step S11. The pixel data, that is, the image data obtained by the first photoelectric conversion is converted by the converter 1
4 is added, both are added here, the value of the level memory unit 10 is updated by this added value, the variable j is then incremented, and this variable j is incremented by the total number of defective candidate pixels in step S12. It is determined whether or not J is exceeded, the operation of step S11 is repeated for all the defect candidate pixels, and when addition of new image data in all the defect candidate pixels is completed,
The variable k is incremented in step S13, this variable k is compared with N-1 in step S14, and step S14
The cumulative operation from 9 to S13 is repeated for (N-1) times of exposure.

Therefore, the photoelectric conversion outputs of the third time, the fourth time, ... N times are accumulated for each defect candidate pixel, and the accumulated value obtained by adding all N pieces of image data is stored in the level memory unit 10 for each candidate pixel. Will be remembered. In the example of FIG. 2, the address of the defect candidate pixel is still stored in the position memory unit 9, and the cumulative value of 8 pixels registered as the defect candidate pixel is held in the level memory unit 10. . In this cumulative value calculation mode, the switch 21
Becomes an open state and the output from the level memory unit 10 is not output to the adder 12.

When the calculation of the cumulative value of the image data of the defect candidate pixels for N times is completed in this way, the process proceeds to step S15 and the defective pixel determination mode is entered.

In step S15, the variables j and k are initialized to "1", and the second threshold value THL2 necessary for the determination operation in this defective pixel determination mode is first created. This second threshold value is created by adding a predetermined offset value Q to the value U created in step S9. The calculation of the second threshold value THL2 in steps S8 and S15 is
It corresponds to the above-mentioned formula 1.

Next, in step S16, the level memory unit 1
Cumulative value L of each of the defect candidate pixels held at 0
[J] is compared with the second threshold value THL2 by the comparator 15, and the defect candidate pixel exceeding the second threshold value THL2 is determined as a true defective pixel, and the address of this pixel is set to d in step S17.
It is newly transferred to the defective pixel memory 16 as [k], the variable k is incremented, and conversely, it is judged that the defective candidate pixel having the second threshold value THL2 or less is not a true defective pixel, and the defective pixel memory 16 is stored. Does not transfer the address.

The variable j is incremented in step S18, and it is determined in step S19 whether or not the variable j exceeds the total number J of candidate pixels. Thus, the determination operations of steps S16 to S18 are executed for all defective candidate pixels. To do. As a result, the cumulative value of the defect candidate pixels is the second threshold value THL2.
Only the addresses of the defect candidate pixels exceeding the above will be stored in the defective pixel memory 16.

Explaining with the example of FIG. 2, only the two pixels (x3, y3) and (x7, y7) out of the eight defect candidate pixels have the cumulative value of the image data values after N exposures. When it exceeds the second threshold THL2 obtained by adding a predetermined offset value to the average value of all pixels by the first exposure, only these two pixels are recognized as true defective pixels, and the addresses of these two pixels are stored in the defective pixel memory. 16 will be stored.

As described above, the output is not compared with the threshold value every exposure, but is compared with the cumulative value of the outputs of N exposures (multiple exposures). Even if a high output is temporarily generated, the average value gradually settles while continuing the exposure N times, whereas the defective pixel maintains a constant high value, so both values are accumulated. When compared, the values gradually increase. Therefore, the accuracy of determination by comparison with the second threshold value is improved. By repeating addition, each output is multiplied by the number of repetitions and the dynamic range is increased.

Further, the first threshold value THL1 used when setting the defect candidate pixel is slightly small because it can be removed finally even if a small number of normal pixels are included in order to prevent detection failure of the defective pixel. If it is low, it is not necessary to set it with high accuracy.

If the above-described defective pixel detection operation is executed before every photographing, the deterioration of the CCD with time can always be compensated, but the pixel defect itself occurs so frequently in the ordinary CCD. However, if it is executed every time the power button of the electronic still camera of this embodiment is turned on and power is supplied to the camera body for photographing, it causes a problem in terms of power consumption. Therefore, for example, after exchanging the battery of the electronic still camera, the power button is first turned on to perform the first normal photographing, and the shading mechanism is manually or electrically operated to put the CCD in the light shielding state and the power button is turned off. Immediately after that, the defective pixel detection operation described above is performed for a predetermined time. In this case, even if the power is turned off or the battery is replaced, the defective pixel memory 16
The defective pixel memory 16 is a non-volatile memory, that is, an EEP so that the position data of the defective pixel stored in the memory can be stored.
It is composed of a ROM, a RAM with a battery backup, and the like.

Next, a description will be given of a case where the user carries out normal photographing with this electronic still camera with reference to FIG. By turning on the power switch provided in the electronic still camera body, releasing the light blocking of the light blocking mechanism 30, and then pressing the shutter button (not shown),
The subject light imaged on the CCD 2 through the optical system 1 is photoelectrically converted and digitized by the A / D converter 3 for each pixel, and these image data are stored in the main image memory 4 and all pixels are stored. When the storage of the image data is completed, the image data from the main image memory 4 is sequentially read out for each pixel.

Here, as shown in FIG. 4, the CCD 2 is equipped with color filters in which the three primary colors R, G, B are arranged in a mosaic pattern, and each pixel of the CCD has R, G of these color filters. , B is attached. Therefore, for example, when the defective pixel is R, as shown in FIG.
The image data of 8 pixels that has passed through the R color filter of the same color at the diagonal position is read, predetermined weighting is performed by the weighting amount set for each pixel, the sum is obtained, and this sum is divided by the total weighting amount. This makes it possible to interpolate defective pixels.

Therefore, when reading out the image data,
The write / read control circuit 7 always monitors the address of the defective pixel stored in the defective pixel memory 16, and if the pixel to be read is not the defective pixel, the image data of the address of the corresponding pixel is read as it is, If it is a defective pixel, the image data of the address of the corresponding pixel is not read, and as shown in FIG. 4, eight pixels (A11, A12, A13, A21, A23, A31, etc.) around this defective pixel are read.
The image data of A32 and A33) is read out and input to the interpolating circuit 40 at the subsequent stage.

When the input image data is not a defective pixel, the interpolation circuit 40 outputs the input image data as it is without performing the interpolation operation, and when the corresponding pixel is a defective pixel, this interpolation circuit 40 The image data values for 8 pixels input to the above are substituted into the arithmetic expression of Equation 2 to calculate the interpolation data of the defective pixel, and the image data for which the compensation of the defective pixel is completed is output. The processing is the same for the B and G pixels.

[0045]

[Equation 2]

The interpolation operation of the interpolation circuit 40 utilizes the interpolation operation by a two-dimensional digital filter. It is needless to say that the G interpolating operation in the interpolating circuit 40 may be an average value of image data of four pixels located obliquely to the defective pixel as shown in FIG.

In FIG. 7, the block shown in the defective pixel detection unit 43 is the defective pixel memory 8, the comparators 11 and 15, the adders 12 and 14, and the threshold calculation circuit 13 shown in FIG.
The operation here can be processed by software using a microcomputer, and the address generation circuit is omitted in the figure.

In the above-described embodiment, the address of the relevant defect candidate pixel is transferred from the position memory unit 9 to the defective pixel memory 16 only when the comparator 15 determines that the accumulated value exceeds the second threshold value THL2. Although the second registration command for transfer is output, in order to reduce the number of memories, the position memory unit 9 has a role of the defective pixel memory 16 and the defective pixel memory 16 is deleted. Is also possible. FIG. 7 is a block diagram for realizing such a configuration. The difference from FIG. 1 is that the comparator 15 outputs an erase command to the defect candidate pixel memory 8 when the accumulated value is equal to or less than the second threshold value THL2. When the defect candidate pixel memory 8 receives the erase command, the defect candidate pixel memory 8 erases the address of the position memory unit 9 because the defect candidate pixel is not a true defect pixel. When the comparator 15 completes the comparison of all defective candidate pixels in this way, the candidate pixels remaining in the position memory unit 9 are finally called true defective pixels. The defective pixel interpolation operation is executed using the contents of the above.

[0049]

As described above, according to the present invention, the defect candidate element is once selected by the rough threshold value processing, and thereafter, the cumulative value of the image pickup signal by the exposure of a plurality of times is used as a comparison target, so that the threshold value is particularly highly accurate. It is possible to detect a defective pixel with sufficiently high accuracy without setting to.

[Brief description of drawings]

FIG. 1 is a block diagram of a portion related to defective pixel detection according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating defect candidate pixels according to an embodiment of the present invention.

FIG. 3 is a flowchart of an embodiment of the present invention.

FIG. 4 is a diagram illustrating an arrangement of color filters according to an embodiment of the present invention.

FIG. 5 is a diagram illustrating an interpolation operation in an interpolation circuit according to the embodiment of the present invention.

FIG. 6 is a diagram illustrating an interpolation operation in an interpolation circuit according to the embodiment of the present invention.

FIG. 7 is an overall block diagram according to an embodiment of the present invention.

FIG. 8 is a block diagram of a portion related to defective pixel detection according to another embodiment of the present invention.

[Explanation of symbols]

 30 Light-shielding mechanism 2 CCD 4 Main image memory 11 Comparator 8 Defect candidate pixel memory 14 Adder 15 Comparator 16 Defective pixel memory

Claims (2)

[Claims] 1. A light blocking unit for blocking light from entering a fixed image pickup device, and an image memory for storing image pickup signals for respective pixels of the solid-state image pickup device obtained by exposure performed in a light-shielded state as image data. , Image data obtained by one exposure in a light-shielded state is read out from the image memory and compared with a first threshold value for each pixel; A pixel exceeding a first threshold is set as a defect candidate pixel, and a defect candidate pixel memory for storing position data and image data value of the defect candidate pixel, and position data and image data values of all defect candidate pixels in the defect candidate pixel memory And a cumulative value calculating means for calculating a cumulative value of the image data for each of the defect candidate pixels obtained by a predetermined number of exposures performed while holding the light-shielded state, Second comparison means for comparing the product value for each of the defect candidate pixels with a second threshold value, and the position data of the defect candidate pixels whose cumulative value exceeds the second threshold value by the comparison by the second comparison means is the defective pixel position. A defective pixel detection device for a solid-state imaging device, comprising: a defective pixel memory for storing data. 2. A light blocking means for blocking the incidence of light on a fixed image sensor, and an image memory for storing, as image data, an image signal of each pixel of the solid-state image sensor obtained by exposure performed in a light-shielded state. , Image data obtained by one exposure in a light-shielded state is read out from the image memory and compared with a first threshold value for each pixel; A pixel exceeding a first threshold is set as a defect candidate pixel, and defective pixel memory for storing position data and image data value of the defect candidate pixel, and position data and image data value of all defect candidate pixels in the defective pixel memory are stored. After completion of, the cumulative value calculating means for calculating the cumulative value of the image data for each of the defect candidate pixels obtained by a predetermined number of exposures executed while keeping the light-shielded state, and the cumulative value. A second comparison unit that compares each defect candidate pixel with a second threshold value, and the position data of the defect candidate pixel whose cumulative value does not exceed the second threshold value is compared with the second threshold value by the second comparison unit. A defective pixel detection device for a solid-state imaging device, which is characterized by erasing from a pixel memory.