JPH09281462A - Liquid crystal display device - Google Patents
Liquid crystal display deviceInfo
- Publication number
- JPH09281462A JPH09281462A JP8948796A JP8948796A JPH09281462A JP H09281462 A JPH09281462 A JP H09281462A JP 8948796 A JP8948796 A JP 8948796A JP 8948796 A JP8948796 A JP 8948796A JP H09281462 A JPH09281462 A JP H09281462A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- voltage
- circuit
- voltages
- positive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 37
- 210000002858 crystal cell Anatomy 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 abstract description 6
- 230000005540 biological transmission Effects 0.000 abstract description 4
- 239000011159 matrix material Substances 0.000 abstract description 4
- 239000000872 buffer Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000012935 Averaging Methods 0.000 description 1
- 239000004988 Nematic liquid crystal Substances 0.000 description 1
- 210000004027 cell Anatomy 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明はいわゆる単純マトリ
クス駆動に好適な、とりわけ走査回路として正負の選択
電圧を用いる液晶表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device suitable for so-called simple matrix driving, and more particularly to a liquid crystal display device using positive and negative selection voltages as a scanning circuit.
【0002】[0002]
【従来の技術】従来より、互いに直交する電極群を有す
る液晶セルの駆動、いわゆる単純マトリクス駆動に於て
は、一方の電極群の電極に順次電圧レベルの高い電圧を
与え、その電圧レベルの高い電圧を印加しているときに
他方の電極群に画信号に応じた電圧を与える線順次走査
を行っており、さらに液晶に直流を印加しないために特
公昭57−57718号公報に示されるように極性信号
に基づいて極性反転をさせていた。2. Description of the Related Art Conventionally, in driving a liquid crystal cell having mutually orthogonal electrode groups, that is, so-called simple matrix driving, a voltage of a high voltage level is sequentially applied to the electrodes of one of the electrode groups to increase the voltage level. Line-sequential scanning is performed in which a voltage corresponding to an image signal is applied to the other electrode group while a voltage is being applied. Further, as no direct current is applied to the liquid crystal, as disclosed in Japanese Patent Publication No. 57-57718. The polarity was inverted based on the polarity signal.
【0003】例えば、フレーム毎に極性反転させて交流
駆動する場合を例に取ると、極性信号はフレームごとに
反転して与えられる。この極性信号は交流化信号、Mと
も呼ばれる。最初のフレームの走査の時間に走査電極に
V0を与え、他方の信号電極には表示したいとき(選択
画素)はV1を与え、次のフレームにおいて、走査電極
にV1を与え、信号電極にはV0を与える。For example, in a case where AC driving is performed by inverting the polarity for each frame, the polarity signal is inverted and provided for each frame. This polarity signal is also called an alternating signal, M. When V0 is applied to the scan electrode at the time of scanning in the first frame and V1 is applied to the other signal electrode (selected pixel), V1 is applied to the scan electrode and V0 is applied to the signal electrode in the next frame. give.
【0004】このような方法は、交流化信号の切替え時
に液晶に起因する大きな容量性負荷電流が流れ、消費電
力が多くなる。また最近の液晶表示装置は、640×4
80画素(VGA)から1024RGB×768画素
(カラーXGA)(信号側1ライン画素数3072)に
まで発展しようとしており、そのためにはデータ転送時
間その他の動作が高速化するので高速高耐圧集積回路が
必要になってきた。しかし集積回路にとって、高速化と
高耐圧化は相反する仕様であり、実現が困難となってい
た。[0004] In such a method, a large capacitive load current due to the liquid crystal flows when the AC signal is switched, and the power consumption increases. A recent liquid crystal display device is 640 × 4
It is about to evolve from 80 pixels (VGA) to 1024 RGB × 768 pixels (color XGA) (the number of pixels per line on the signal side is 3072). For this purpose, the data transfer time and other operations become faster, so that a high-speed and high-voltage integrated circuit is required. It has become necessary. However, for an integrated circuit, high speed and high withstand voltage are conflicting specifications, making it difficult to realize.
【0005】[0005]
【発明が解決しようとする課題】そこで走査電圧を大き
い正負の電圧とし、信号電圧を正の選択電圧と負の選択
電圧の中間値近傍の電圧とすることを検討したが、この
ような駆動は大きい画面でこそ効果が高いことから容量
性負荷が大きくなりまた画信号も多くなるので、パーソ
ナルコンピュータなどの機器から受けた雑音や電送損失
の影響が大きく、選択画素の周辺、特に連続選択画素の
延長上に淡い表示が観察され、表示品位を低下させるこ
ととなった。また液晶に印加される電圧の歪みに対応す
べく、短い時間、例えば印加電圧波形の歪みの影響を避
け1走査時間の中央部の1/3時間だけ、補正電圧を重
畳印加させることを検討したが、このような補正電圧を
信号電圧に重畳するための高速スイッチング回路の負担
が大きく、不都合であった。Therefore, it was studied to set the scanning voltage to a large positive and negative voltage and the signal voltage to a voltage in the vicinity of the intermediate value between the positive selection voltage and the negative selection voltage. The effect is high only on a large screen, and the capacitive load is large and the image signals are also large.Therefore, the influence of noise and transmission loss received from devices such as personal computers is large, and the periphery of the selected pixel, especially the continuous selected pixel A light display was observed on the extension, and the display quality was degraded. Further, in order to cope with the distortion of the voltage applied to the liquid crystal, it was considered to apply the correction voltage in a superimposed manner for a short time, for example, avoiding the influence of the distortion of the applied voltage waveform for only 1/3 of the central part of one scanning time. However, the burden on the high-speed switching circuit for superimposing such a correction voltage on the signal voltage is large, which is inconvenient.
【0006】[0006]
【課題を解決するための手段】本発明は上述の点を考慮
して効率よく電送損失等を補うもので、互いに直交する
電極群を有する液晶セルと、その液晶セルの一方の電極
群に走査電圧を与える走査回路と、液晶セルの他方の電
極群に信号電圧を画信号に応じて与える信号回路と、走
査回路に与える走査電圧としての正負の選択電圧と信号
回路に画信号に応じて与える走査回路の正の選択電圧と
負の選択電圧の中間値近傍の信号電圧と各回路の駆動電
圧を供給する電源回路とを設け、その電源回路は、好ま
しくは電圧平均加法に従う正負の信号電圧とその電圧平
均加法に従う信号電圧より僅かに電圧値の異なる正負の
補正信号電圧からなる、絶対値の異なる複数組の信号電
圧を出力し、信号回路は、極性信号と画信号に応じてこ
れら複数の信号電圧のうちから選択して液晶セルに出力
するもので、より好ましくは画信号が前回表示の内容と
ほぼ同一である場合には電圧平均加法に従う正負の信号
電圧から選択し、前回表示の内容と異なる場合には正負
の補正信号電圧から選択するものであり、さらに正負の
極性の反転に応答する場合には液晶セルへの印加電圧を
短時間略ゼロにするものである。SUMMARY OF THE INVENTION The present invention efficiently compensates for transmission loss and the like in view of the above points, and scans a liquid crystal cell having mutually orthogonal electrode groups and one electrode group of the liquid crystal cell. A scanning circuit for applying a voltage, a signal circuit for applying a signal voltage to the other electrode group of the liquid crystal cell in accordance with an image signal, a positive / negative selection voltage as a scanning voltage to be applied to the scanning circuit, and an image signal for the signal circuit. A power supply circuit for supplying a signal voltage near the intermediate value between the positive selection voltage and the negative selection voltage of the scanning circuit and a drive voltage for each circuit is provided, and the power supply circuit is preferably a positive and negative signal voltage according to the voltage average addition. The signal circuit outputs a plurality of sets of signal voltages having different absolute values, which are positive and negative correction signal voltages whose voltage values are slightly different from the signal voltage according to the voltage average addition, and the signal circuit outputs a plurality of these voltage signals in accordance with the polarity signal and the image signal. Signal It is selected from among the above and is output to the liquid crystal cell. More preferably, when the image signal is almost the same as the content of the previous display, it is selected from the positive and negative signal voltages according to the voltage average addition and different from the content of the previous display. In this case, the voltage is selected from positive and negative correction signal voltages, and in the case of responding to the inversion of positive and negative polarities, the voltage applied to the liquid crystal cell is set to substantially zero for a short time.
【0007】[0007]
【発明の実施の形態】図1は本発明実施例の液晶表示装
置の回路図で、互いに直交する電極群を有する液晶セル
1と、その液晶セル1の一方の電極群の所定の電極に正
負の選択電圧のいずれかを選択して走査電圧として供給
する走査回路2と、液晶セル1の他方の電極群に正の選
択電圧と負の選択電圧の中間値近傍の信号電圧を画信号
に応じて選択的に与える信号回路3と、走査回路2と信
号回路3に所定の値の電圧を供給する電源回路4と、信
号授受回路5を有している。より具体的に説明する。FIG. 1 is a circuit diagram of a liquid crystal display device according to an embodiment of the present invention, in which a liquid crystal cell 1 having electrode groups orthogonal to each other and a positive electrode and a negative electrode of a predetermined electrode of one electrode group of the liquid crystal cell 1 are formed. To the scanning circuit 2 which selects any one of the selection voltages and supplies it as a scanning voltage, and a signal voltage near the intermediate value between the positive selection voltage and the negative selection voltage to the other electrode group of the liquid crystal cell 1 according to the image signal. It has a signal circuit 3 selectively and selectively applied thereto, a power supply circuit 4 for supplying a voltage of a predetermined value to the scanning circuit 2 and the signal circuit 3, and a signal transfer circuit 5. This will be described more specifically.
【0008】液晶セル1は、いわゆる単純マトリクス型
のもので、例えばスーパーツイストネマティック液晶表
示器などの電界効果型液晶が利用できる。この液晶セル
1の電極は例えばストライプ状の整列された透明電極か
らなり、画素交点に能動素子を持たないものである。The liquid crystal cell 1 is of a so-called simple matrix type, and a field effect liquid crystal such as a super twist nematic liquid crystal display can be used. The electrodes of the liquid crystal cell 1 are, for example, transparent electrodes arranged in stripes and have no active elements at pixel intersections.
【0009】走査回路2は、線順次走査を行うため1フ
レーム間に順次走査電極毎に高い波高値の電圧を与える
もので、正負の電圧−VL、+VHと中間電圧Vmのい
ずれかを選択して所定の電極に供給するものであり、こ
のうち−VL、+VHは選択電圧である。液晶セル1の
画面を上下に分割して駆動する場合、走査回路2や信号
回路3は2組必要となる。The scanning circuit 2 applies a voltage with a high peak value to each scanning electrode during one frame in order to perform line-sequential scanning, and selects one of the positive and negative voltages -VL, + VH and the intermediate voltage Vm. Are supplied to predetermined electrodes, among which -VL and + VH are selection voltages. When the screen of the liquid crystal cell 1 is divided into upper and lower parts for driving, two sets of the scanning circuit 2 and the signal circuit 3 are required.
【0010】それに対して信号回路3は、正の選択電圧
+VHと負の選択電圧−VLの中間値近傍の2種類の信
号電圧−Vb、+Vbとその2種類の信号電圧に補正値
を考慮した2種類の補正信号電圧−Vc、+Vcのなか
から、極性信号Mと画信号(データ)に応じて選択的に
液晶セル1の電極に供給するものである。この信号回路
3は、更に画信号が前回表示の内容とほぼ同一である場
合には電圧平均加法に従う正負の信号電圧−Vb、+V
bから選択し、前回表示の内容と異なる場合には正負の
補正信号電圧−Vc、+Vcから選択するものであり、
さらに正負の極性の反転に応答する場合には液晶セル1
への印加電圧を短時間略ゼロにするものである。On the other hand, the signal circuit 3 considers the correction values for the two types of signal voltages -Vb and + Vb and the two types of signal voltages near the intermediate value between the positive selection voltage + VH and the negative selection voltage -VL. The correction signal voltages -Vc and + Vc of two types are selectively supplied to the electrodes of the liquid crystal cell 1 according to the polarity signal M and the image signal (data). The signal circuit 3 further includes positive and negative signal voltages -Vb, + V according to the voltage average addition when the image signal is almost the same as the content displayed last time.
If the selected content is different from the content displayed last time, it is selected from the positive and negative correction signal voltages −Vc and + Vc.
Further, when responding to the reversal of positive and negative polarities, the liquid crystal cell 1
The voltage applied to is made to be substantially zero for a short time.
【0011】信号回路3は、このような動作のために、
図2に示すように、画信号D0〜D7を受けるレジスタ
31と、レジスタの画信号を受けるラッチ32と、1行
前の画信号を記憶するラッチ33と、2つの画信号を比
較する比較回路34と、レベルシフタ35と、ドライバ
36とを有している。レジスタ31は更に転送方向を選
択するレジスタ37と組み合わされていてもよい。ラッ
チ32、33は各々同じビット数の画信号を記憶し、比
較回路34はこれらをラッチごとにビット単位で比較し
て、例えば40%を越えるビット数が変動していれば画
信号変動ありのフラグを出力する。この40%というビ
ット数変動の程度(割合)は機種毎に設定可能としても
よく、あるいは、このようなビット数の変動だけを見る
ものでなく、オフからオンへの画信号のみもしくは階調
表示の濃い画素のビットをカウントするようにしてもよ
い。また、ドライバ36には電源回路5から少なくとも
4種類の信号電圧−Vb、+Vb、−Vc、+Vcを受
け、液晶セル1の信号電極の1つ1つについて図3のよ
うなバイアス電圧毎のアナログスイッチ361アレイを
持つ出力段を持っており、コントローラ362は比較回
路34の出力により正負の信号電圧−Vb、+Vbか正
負の補正信号電圧−Vc、+Vcかのいずれかの組を選
択した後、極性信号Mと画信号dataにより点灯か消
灯かによってその正負のいずれかを定め、4つの信号電
圧のいずれかを選択出力する。The signal circuit 3 performs the above operation,
As shown in FIG. 2, a register 31 that receives the image signals D0 to D7, a latch 32 that receives the image signal of the register, a latch 33 that stores the image signal of the previous row, and a comparison circuit that compares the two image signals. 34, a level shifter 35, and a driver 36. The register 31 may be further combined with the register 37 that selects the transfer direction. The latches 32 and 33 store the image signals having the same number of bits, and the comparison circuit 34 compares these on a bit-by-bit basis for each latch. For example, if the number of bits exceeds 40%, the image signal changes. Output the flag. The degree (ratio) of the bit number fluctuation of 40% may be set for each model, or not only the fluctuation of the bit number is observed but only the image signal from off to on or gradation display. The bits of the dark pixels may be counted. Further, the driver 36 receives at least four kinds of signal voltages -Vb, + Vb, -Vc, + Vc from the power supply circuit 5, and each of the signal electrodes of the liquid crystal cell 1 has an analog for each bias voltage as shown in FIG. The controller 362 has an output stage having a switch 361 array, and the controller 362 selects either the positive or negative signal voltage −Vb, + Vb or the positive or negative correction signal voltage −Vc, + Vc according to the output of the comparison circuit 34. The polarity signal M and the image signal data are used to determine whether the signal is positive or negative depending on whether it is turned on or off, and selectively outputs one of the four signal voltages.
【0012】再び図1において、電源回路4は、例えば
この表示装置が組み込まれるパーソナルコンピュータ等
から供給される電圧VDD、VEEを電圧発生回路(D
C/DCコンバータ)41に入力し、正負の電圧−V
L、+VHを生成させる。ここに正負というのは、何か
の絶対電位、たとえばこの表示装置が組み込まれるパー
ソナルコンピュータの電源に対して規定された電位のこ
とではなく、非走査時の走査電圧(中間電圧)Vmに対
する電位で表現している。なお電圧発生回路41は、よ
り好ましくは、走査回路2や信号回路3の駆動電圧(集
積回路用電圧)、さらには、信号回路3に供給される各
種タイミング信号や画信号に応じた信号をバッファを介
して伝送する時必要に応じて駆動伝達レベルを供給電源
レベルにレベルシフトを行ったり、初期化信号を付加し
て与える信号授受回路やバッファ回路の駆動電圧等をも
生成し供給する。Referring again to FIG. 1, the power supply circuit 4 supplies voltages VDD and VEE supplied from, for example, a personal computer in which the display device is incorporated, to a voltage generation circuit (D).
C / DC converter) 41, and the positive and negative voltage -V
L, + VH are generated. The positive / negative here does not mean an absolute potential of some kind, for example, a potential regulated with respect to the power supply of the personal computer in which this display device is incorporated, but a potential with respect to the scanning voltage (intermediate voltage) Vm during non-scanning. expressing. The voltage generation circuit 41 more preferably buffers the drive voltage (voltage for integrated circuit) of the scanning circuit 2 and the signal circuit 3, and further signals corresponding to various timing signals and image signals supplied to the signal circuit 3. When it is transmitted via the power supply circuit, the drive transmission level is level-shifted to the supply power supply level as necessary, and the drive voltage of the signal transfer circuit or buffer circuit to which an initialization signal is added and generated is also generated and supplied.
【0013】このようにして電圧発生回路41で発生さ
れた正負の選択電圧を基に、抵抗分割回路42で所定の
バイアス値の電圧、つまり信号電圧−Vb、+Vb、補
正信号電圧−Vc、+Vcと中間電圧Vmを得、これを
バッファ回路43を介して出力する。この時信号電圧と
なるべき電圧は正負の各々において、絶対値が異なる2
組ずつ、合計4つ準備されている。Based on the positive and negative selection voltages generated by the voltage generating circuit 41 in this way, the voltage of a predetermined bias value in the resistance dividing circuit 42, that is, the signal voltage -Vb, + Vb, the correction signal voltage -Vc, + Vc. Then, the intermediate voltage Vm is obtained and is output through the buffer circuit 43. At this time, the voltage to be the signal voltage has different absolute values for each of positive and negative.
There are 4 sets in total.
【0014】これら選択電圧+VH、−VLや信号電圧
−Vb、+Vbの大きさは、原則的に電圧平均化法に準
じて求められるもので、例えばXGA画面分割のとき走
査線数は384本(1/384デューティの駆動)で最
適バイアス値は1:20.6であり、中間電圧VmとG
NDレベルを一致させた時、選択電圧±30.0ボルト
信号電圧±Vbは±1.46ボルトである。グランドレ
ベルを0ボルトからずらしたり、Vmの値を正負の選択
電圧の中央値から変更した場合、電圧値そのものは正負
で異なった値となるが、液晶に印加する電圧レベル比は
略保たれ、正負の各々に必要である。そして補正信号電
圧−Vc、+Vcは1走査時間の全ての時間において印
加されるため極めて小さくてよく、上述した正負均衡の
場合、10インチから15インチまでの大きさの表示に
おいて、±1.47ボルトから±1.59ボルトであっ
た。そしてこのような十数mVから数百mVの電圧を電
源回路4で形成してこれを電源回路内部で切り替えて供
給するよりも、これらのバイアス電圧を全て電源回路4
から外部へ供給し、信号回路3の内部で走査期間毎に選
択するほうが、スイッチングで切り代わる電力量が少な
いので電源回路4の負担が小さく、しかも各信号回路3
での集積回路の負担も分散され小さいので、好ましい。The magnitudes of the selection voltages + VH, -VL and the signal voltages -Vb, + Vb are determined in principle according to the voltage averaging method. For example, when the XGA screen is divided, the number of scanning lines is 384 ( The optimum bias value is 1: 20.6 at 1/384 duty driving), and the intermediate voltage Vm and G
When the ND levels are matched, the selection voltage ± 30.0 volts and the signal voltage ± Vb are ± 1.46 volts. When the ground level is shifted from 0 volt or the value of Vm is changed from the median value of the positive and negative selection voltages, the voltage value itself becomes different depending on whether the voltage is positive or negative, but the voltage level ratio applied to the liquid crystal is substantially maintained. Necessary for positive and negative. The correction signal voltages −Vc and + Vc may be extremely small because they are applied at all times of one scanning time. In the case of the positive / negative balance described above, ± 1.47 is displayed in the display of the size of 10 inches to 15 inches. It was ± 1.59 Volts from Volts. Rather than forming such a voltage of several tens to several hundreds of mV by the power supply circuit 4 and switching and supplying the voltage inside the power supply circuit, all of these bias voltages are supplied to the power supply circuit 4.
It is preferable to supply the power from the outside to the outside and to select inside the signal circuit 3 for each scanning period, because the power amount switched by switching is small, and the load on the power supply circuit 4 is small.
The load on the integrated circuit in the above is also dispersed and small, which is preferable.
【0015】一方、データである画信号は、画像コント
ローラやマイクロコンピュータから信号授受回路5のバ
ッファ回路51を介して与えられ、極性信号Mは、画像
コントローラやマイクロコンピュータから与えられる場
合もあるが図のように信号授受回路5で生成してもよ
い。そして印加電圧が正の電圧から負の電圧に切り代わ
るときと負の電圧から正の電圧に切り代わるときとで、
その波形の歪み方が不平衡となる場合には、信号授受回
路5に表示制御53を設けて、たとえばラッチパルスと
表示不動作信号によりフリップフロップや論理和ゲート
を働かせ、ラッチパルスの期間を含む短い期間におい
て、一度、信号回路2や走査回路2が中間電圧Vmを出
力し、印加電圧を実質的に略ゼロにした後、所定の信号
電圧や走査電圧を出力するように構成すれば、液晶セル
に印加される電圧波形の歪みがほぼ平衡し、表示不良が
なくなる。On the other hand, an image signal which is data is given from the image controller or the microcomputer through the buffer circuit 51 of the signal transfer circuit 5, and the polarity signal M may be given from the image controller or the microcomputer. Alternatively, the signal transfer circuit 5 may generate the signal. And when the applied voltage switches from the positive voltage to the negative voltage and when the negative voltage switches to the positive voltage,
If the waveform is distorted unbalanced, the signal transfer circuit 5 is provided with a display control 53 to activate a flip-flop or a logical sum gate by a latch pulse and a display non-operation signal, including the period of the latch pulse. If the signal circuit 2 and the scanning circuit 2 output the intermediate voltage Vm once in a short period of time to make the applied voltage substantially zero and then output the predetermined signal voltage and scanning voltage, the liquid crystal The distortion of the voltage waveform applied to the cell is almost balanced, and the defective display is eliminated.
【0016】この駆動により、走査回路2の集積回路の
出力段は従来の略倍の耐電圧を必要とするが、走査線数
に応じた低速処理であり、出力段で3つの電位のうち一
つを選択するので交流化信号の切り替え時の大きな電流
は発生しない。一方信号回路3は上述の例でわずか5ボ
ルト以内という低電圧しか扱わず、高速駆動に適してい
るばかりか、波形崩れもきわめて生じ難い。そしてなお
生じる不平衡な電圧に対しては、画面情報を演算乃至は
比較することで、低い電圧が重畳された信号電圧で液晶
セルに1走査時間中印加され実効値を調整するので、一
部時間のみ電圧重畳する場合に比較してより小さい電圧
をスムーズにスイッチングでき、他の画素に与える影響
も少なく、かつ、信号回路用集積回路の負担を増やすこ
となく、大容量表示を高い表示品位を保って行うことが
できる。Due to this driving, the output stage of the integrated circuit of the scanning circuit 2 requires a withstand voltage approximately double that of the conventional one, but it is a low-speed process corresponding to the number of scanning lines and one of the three potentials at the output stage. Since one of them is selected, no large current is generated when switching the AC signal. On the other hand, the signal circuit 3 handles only a low voltage of 5 V or less in the above example, and is suitable not only for high-speed driving but also for waveform collapse. With respect to the unbalanced voltage that is still generated, the effective value is adjusted by applying or lowering the screen information to the liquid crystal cell for one scanning time by calculating or comparing the screen information. Smaller voltage can be smoothly switched compared to the case where voltage is superimposed only for time, there is little influence on other pixels, and high capacity display with high display quality is achieved without increasing the load on the integrated circuit for signal circuits. You can keep it.
【0017】[0017]
【発明の効果】本発明は上述のように、走査回路は正負
の選択電圧を走査電圧として用い、画信号に応じて選択
電圧の中間値近傍の4種類の信号電圧を用い、画信号に
応じて実効値を補正しながら低電圧で安定して駆動する
ことができ、表示容量が大きくなって画信号が著しく増
加しても、信号回路は負担は少なく高速処理でき、表示
品位のよい画像を表示できる。As described above, according to the present invention, the scanning circuit uses the positive and negative selection voltages as the scanning voltage, and the four kinds of signal voltages in the vicinity of the intermediate value of the selection voltage according to the image signal are used. It can be driven stably at a low voltage while correcting the effective value, and even if the display capacity increases and the image signal increases significantly, the signal circuit is less burdensome and can process at high speed, resulting in an image with good display quality. Can be displayed.
【図1】本発明実施例の液晶表示装置のブロック図であ
る。FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.
【図2】本発明実施例に係る信号回路のブロック図であ
る。FIG. 2 is a block diagram of a signal circuit according to an embodiment of the present invention.
【図3】本発明実施例に係る信号回路のドライバの回路
図である。FIG. 3 is a circuit diagram of a driver of a signal circuit according to an embodiment of the present invention.
1 液晶セル 2 走査回路 3 信号回路 4 電源回路 5 信号授受回路 1 liquid crystal cell 2 scanning circuit 3 signal circuit 4 power supply circuit 5 signal transfer circuit
Claims (1)
と、該液晶セルの一方の電極群に走査電圧として与える
走査回路と、前記液晶セルの他方の電極群に信号電圧を
画信号に応じて与える信号回路と、前記走査回路に与え
る前記選択電圧と前記信号回路に与える前記走査回路の
正の選択電圧と負の選択電圧の中間値近傍の信号電圧を
供給する電源回路とを具備した液晶表示装置において、
前記電源回路は、絶対値の異なる複数組の前記信号電圧
を出力し、前記信号回路は、極性信号と画信号に応じて
複数の信号電圧のうちから選択して液晶セルに出力する
ことを特徴とする液晶表示装置。1. A liquid crystal cell having mutually orthogonal electrode groups, a scanning circuit for supplying one electrode group of the liquid crystal cell as a scanning voltage, and a signal voltage to the other electrode group of the liquid crystal cell according to an image signal. A liquid crystal display comprising: a signal circuit for giving a signal; and a power supply circuit for supplying a signal voltage near the intermediate value between the selection voltage given to the scanning circuit and the positive selection voltage and the negative selection voltage of the scanning circuit given to the signal circuit. In the device,
The power supply circuit outputs a plurality of sets of signal voltages having different absolute values, and the signal circuit selects from a plurality of signal voltages according to a polarity signal and an image signal and outputs the selected signal voltage to a liquid crystal cell. Liquid crystal display device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8948796A JPH09281462A (en) | 1996-04-11 | 1996-04-11 | Liquid crystal display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8948796A JPH09281462A (en) | 1996-04-11 | 1996-04-11 | Liquid crystal display device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09281462A true JPH09281462A (en) | 1997-10-31 |
Family
ID=13972111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8948796A Pending JPH09281462A (en) | 1996-04-11 | 1996-04-11 | Liquid crystal display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09281462A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100590920B1 (en) * | 1999-06-30 | 2006-06-19 | 비오이 하이디스 테크놀로지 주식회사 | Driving method of liquid crystal display device |
-
1996
- 1996-04-11 JP JP8948796A patent/JPH09281462A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100590920B1 (en) * | 1999-06-30 | 2006-06-19 | 비오이 하이디스 테크놀로지 주식회사 | Driving method of liquid crystal display device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6249270B1 (en) | Liquid crystal display device, drive circuit for liquid crystal display device, and method for driving liquid crystal display device | |
USRE42993E1 (en) | Liquid crystal driver and liquid crystal display device using the same | |
JP3777913B2 (en) | Liquid crystal driving circuit and liquid crystal display device | |
US20020063703A1 (en) | Liquid crystal display device | |
US20020190973A1 (en) | Signal drive circuit, display device, electro-optical device, and signal drive method | |
JP3335560B2 (en) | Liquid crystal display device and driving method of liquid crystal display device | |
JPH10111673A (en) | Driving device and driving method for liquid crystal display device | |
JP3906665B2 (en) | Liquid crystal drive device | |
JPH0876083A (en) | Liquid crystal driving device, control method thereof, and liquid crystal display device | |
JP3415727B2 (en) | Driving device and driving method for liquid crystal display device | |
JP3426723B2 (en) | Liquid crystal display device and driving method thereof | |
KR100485508B1 (en) | Liquid crystal display device and driving method thereof | |
JP2001343944A (en) | Driving method and driving device for liquid crystal display device | |
JPH09281462A (en) | Liquid crystal display device | |
JPH08114784A (en) | Liquid crystal display device | |
JPH05265402A (en) | Method and device for driving liquid crystal display device | |
JPH08272339A (en) | Liquid crystal display | |
JP3545088B2 (en) | Liquid crystal display | |
JPH0950003A (en) | Liquid crystal display device | |
JP2003223148A (en) | Method for driving liquid crystal display device and liquid crystal display device | |
JP2000242233A (en) | Driving circuit of display device | |
JPH06324642A (en) | Liquid crystal display | |
JP3545090B2 (en) | Liquid crystal display | |
JPH0922274A (en) | Liquid crystal display device | |
JPH08136893A (en) | Liquid crystal display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040106 |