JPH09134888A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a semiconductor substrate from being etched when a film for mask is removed. SOLUTION: After a silicon nitride film 22, an interlayer insulating film 23, a polysilicon film 24, and a silicon oxide film 25 are successively formed on a semiconductor substrate 1, first openings 27 and 28 and sides walls are formed in the silicon oxide film 25 and the polysilicon film 24 is etched by using the openings 27 and 28 and side walls as a mask. Then the insulating film 23 is etched until the silicon nitride film 22 is exposed so that the polysilicon film 24 can become the protective film of the insulating film 23 by using the openings, side walls, and etched film 24 as a mask and the mask is removed. After etching the insulating film 23, the polysilicon film 24 is removed by using the silicon nitride film 22 as an etching stopper. Finally, second openings 30a and 31a are formed in the silicon nitride film 22 and insulating film 23 by etching the exposed part of the film 22 by using the insulating film 23 as a mask.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention prevents the semiconductor substrate from being etched when the mask film is removed after the opening is formed in the interlayer insulating film using the mask film as a mask. The present invention relates to a semiconductor device manufacturing method for reducing the number of steps.

[0002]

2. Description of the Related Art FIGS. 6 to 8 are cross-sectional views showing a conventional method of manufacturing a semiconductor device. In each drawing, the left side of the drawing is a memory cell forming portion, and the right side is an overlay inspection mark forming portion.
Hereinafter, a conventional method of manufacturing a semiconductor device will be described with reference to FIGS. First, the element isolation region 2 is formed on the semiconductor substrate 1, the source / drain region 3 is formed in the active region surrounded by the element isolation region 2 of the semiconductor substrate 1, and the gate oxide film 4 is provided on the channel region. To form the gate electrode 5. Next, the insulating film 6 and the sidewall insulating film 7 are formed so as to cover the gate electrode 5. next,
An interlayer insulating film 8 is laminated on it (FIG. 6A). At this time, the interlayer insulating film 8 is formed thicker than the overlay inspection mark forming portion because the gate electrode 5 and the like are formed below the memory cell forming portion.

Next, a polysilicon film 9 is formed on the interlayer insulating film 8.
Then, a silicon oxide film 10 is sequentially laminated, a resist is applied on the silicon oxide film 10, and a patterned resist film 11 is formed by photolithography (FIG. 6).
(B)). Next, the silicon oxide film 10 is patterned using the resist film 11 as a mask to form the first opening 12,
13 is formed and the resist film 11 is removed (see FIG. 6).
(C)). Next, a silicon oxide film is stacked so as to cover the silicon oxide film 10, and anisotropic etching is performed on the entire surface to form sidewalls 14 on the sidewalls of the first openings 12 and 13 (FIG. 7A. )).

Next, the polysilicon film 9 is anisotropically etched using the silicon oxide film 10 and the sidewalls 14 as a mask. Next, using the silicon oxide film 10 and the sidewalls 14 as masks, the polysilicon film 9 is used as a protective film for the interlayer insulating film 8 to perform anisotropic etching of the interlayer insulating film 8 until the semiconductor substrate 1 is exposed and the silicon oxide film is exposed. 10 and the sidewall 14 are removed to form second openings 15 and 16 (FIG. 7B). The opening width of the opening 16 at this time is formed larger than the opening width of the opening 15, and the opening width of the opening 15 is, for example, 0.1 to 0.
3 μm, and the opening width of the opening 16 is, for example, 10 to 20 μm.
It is formed by m. Next, the resist 17 is applied to the entire surface (FIG. 7C).

Next, the resist 17 is etched back to the position where the second opening 15 on the source / drain region 3 is filled with the resist 17a (FIG. 8A).
At this time, the opening width of the second opening 16 on the overlay inspection mark forming portion is set to the second opening 15 on the memory cell forming portion.
Therefore, the resist 17a remains only on the side wall of the second opening 16. Next, the polysilicon film 9 is removed using the resist 17a as a mask (FIG. 8B). Next, the resist 17a is removed. Then, the second opening 15 as a contact hole and the second opening 16 as an overlay inspection mark are formed (FIG. 8C).

[0006]

When forming an opening with an opening width smaller than the minimum opening width that can be formed by photolithography of a resist, the conventional method of manufacturing a semiconductor device is performed as described above. Since the resist 17a remains only on the side wall of the second opening 16 in the second opening 16 on the overlay inspection mark forming portion, the semiconductor substrate 1 is removed when the polysilicon film 9 is removed. The exposed portion of the area not covered by the resist 17a is etched, and the second
The upper surface of the semiconductor substrate 1 exposed in the opening 16 is roughened.

A problem with the roughened upper surface of the semiconductor substrate 1 will be described with reference to FIGS. 9 to 12. First, a case where the second opening 16 is formed without roughening the upper surface of the semiconductor substrate 1 will be described. As shown in FIG. 9, the upper surface portion of the semiconductor substrate 1 exposed in the second opening 16 is a mark portion 18. Then, a conductive film 19 is stacked on the second opening 16, and a patterned resist film 20 is formed on the conductive film 19. In order to inspect the registration of the resist film 20 and the mark portion 18 at this time, for example, an image is taken from the upper surface with a CCD camera, and FIG.
An image as shown in 0 (a) is obtained. Then, the color analysis of this image is performed, the detection waveform as shown in FIG. 10B is extracted, and the interval when this detection waveform exceeds a predetermined threshold value h is measured to obtain the resist film 20. The overlay of the mark portion 18 and the mark portion 18 is inspected.

Next, the case where the upper surface of the semiconductor substrate 1 is rough and the opening 16 is formed as in the conventional case will be described. As shown in FIG. 11, the upper surface portion of the semiconductor substrate 1 exposed in the opening 16 is a mark portion 21. Then, as in the case shown above, the conductive film 1 is formed on the opening 16.
9 is laminated, and a patterned resist film 20 is formed on the conductive film 19. Then, an image is taken from the top surface with a CCD camera to obtain an image as shown in FIG.
Then, color analysis of this image is performed, a detection waveform as shown in FIG. 12B is extracted, and the interval when this detection waveform exceeds a predetermined threshold value h is measured, whereby the resist film 20 is obtained. And the overlay of the mark portion 21 are inspected.

As is clear from a comparison between FIGS. 10B and 12B, in the case where the semiconductor substrate 1 is not rough and has a flat mark portion 18, the edge of the mark portion 18 is clear. As a result, the detected waveform becomes steep and the overlay inspection can be reliably performed. However, in the case of the rough mark portion 21, the edge of the mark portion 21 is not clear, so that there is a problem that the detection waveform becomes broad and the overlay detection accuracy deteriorates. This also means that the opening width of the alignment mark is, for example, 1 to
Since this is 7 μm, which is larger than the opening width of the opening on the memory cell formation portion, such a phenomenon occurs similarly, and there is a problem that the alignment accuracy deteriorates.

Further, in order to remove the polysilicon film 9,
There is a problem in that the resist 17 is applied, the resist 17 is etched back, the polysilicon film 9 is removed, and then the resist 17 is removed, which results in a large number of steps.

The present invention has been made to solve the above problems, and removes a film as a mask for forming an opening without etching the semiconductor substrate and reducing the number of steps. It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of manufacturing the semiconductor device.

[0012]

Means for Solving the Problems Claim 1 according to the present invention.
In the method of manufacturing a semiconductor device, the first film is laminated on the semiconductor substrate, and the second film made of a material having different etching characteristics from the first film is laminated on the first film. Then, a third film made of a material having different etching characteristics of the first and second films and a material having different etching characteristics is laminated on the second film, and the third film of the third film is formed on the third film. A fourth film made of a material having different etching characteristics and different etching characteristics is stacked, the fourth film is patterned, and the fourth film is formed on the side wall of the first opening formed in the fourth film. A side wall made of a material having the same etching property as that of the second film is formed, and the third film is etched using the fourth film and the sidewall as a mask until the second film is exposed. The third film is used as the second film by using the film and the sidewall as a mask. The second film is etched as a protective film of the film until the first film is exposed, the fourth film and sidewalls are removed, and the third film is removed using the first film as an etching stopper. The exposed portion of the first film is etched by using the second film as a mask to form the second opening in the first and second films.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first aspect, wherein the first film is a silicon nitride film and the third film is a polysilicon film. .

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first aspect, wherein the first film is formed by sequentially laminating a lower layer film and an upper layer film on a semiconductor substrate. Is different from the etching characteristics of the second and third films, and the etching characteristics of the lower layer film is different from the etching characteristics of the upper layer film and the third film.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the third aspect, wherein the second film is etched using the third film as a mask until the first film is exposed. , The third film is used as a mask to etch only the upper layer film of the exposed portion of the first film, and the lower layer film of the first film is used as an etching stopper to remove the third film.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the third or fourth aspect, wherein the lower layer film is a silicon oxide film and the upper layer film is a silicon nitride film.
The third film is made of a polysilicon film.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein the second opening formed in the first and second films according to any one of the first to fifth aspects is formed. D
When used as a storage node contact hole of a RAM, a first film is formed so as to cover the gate electrode, and is formed so as to cover the first film and the gate electrode, and
The first film is used as an etching stopper on the gate electrode when the bit line contact hole is formed in the fifth film having different etching characteristics from those of the first film.

According to a thirty-third aspect of the present invention, the second opening formed in the first and second films according to any one of the first to fifth aspects has the opening diameter of the second opening. It is intended to include those having different sizes.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 and 2 show Embodiment 1 of the present invention.
2A to 2C are cross-sectional views showing the method for manufacturing a semiconductor device. In each drawing, the left side is a memory cell forming portion and the right side is an overlay inspection mark forming portion. The method of manufacturing the semiconductor device according to the first embodiment will be described below with reference to FIGS.

First, as in the conventional case, the element isolation region 2 is formed on the semiconductor substrate 1, the source / drain region 3 is formed in the active region surrounded by the element isolation region 2 of the semiconductor substrate 1, and the channel is formed. A gate electrode 5 is formed on the region via a gate oxide film 4. Next, the insulating film 6 and the sidewall insulating film 7 are formed so as to cover the gate electrode 5. Next, a silicon nitride film 22 is formed as a first film so as to cover the insulating film 6, the sidewall insulating film 7, and the semiconductor substrate 1.
Are laminated with a thickness of, for example, 100 Å to 1000 Å. Next, the silicon nitride film 22
A second silicon oxide film made of a material having a different etching property from the silicon nitride film 22;
An interlayer insulating film 23 as a film of
(A)). At this time, the thickness of the interlayer insulating film 23 is, for example, 5000 Å to 10 Å on the memory cell forming portion.
While having a thickness of 000 angstroms,
On the overlay inspection mark, the thickness becomes thin, for example, 2500 Å to 5000 Å.
This is because the gate electrode 5 and the like are formed on the memory cell formation portion, but none are formed on the overlay inspection mark formation portion.

Next, on the inter-layer insulating film 23, a polysilicon film 24 as a third film made of a material having different etching characteristics from the silicon nitride film 22 and the interlayer insulating film 23, for example, 1000 angstrom is formed. Laminate to a thickness of ~ 5000 Å. Next, on the polysilicon film 24, a silicon oxide film 25 as a fourth film made of a material having different etching characteristics from the etching characteristics of the polysilicon film 24 is laminated. Next, a resist is applied on the silicon oxide film 25 to form a patterned resist film 26 by photolithography (FIG. 1B).

Next, the silicon oxide film 25 is patterned using the resist film 26 as a mask, and the first opening 2 is formed.
7 and 28 are formed, and the resist film 26 is removed (see FIG. 1).
(C)). Next, a silicon oxide film having the same etching characteristics as that of the silicon oxide film 25 is stacked so as to cover the silicon oxide film 25, and anisotropic etching is performed on the entire surface to form each first opening 27, Sidewalls 29 are respectively formed on the side walls of 28 (see FIG. 2).
(A)).

Next, the polysilicon film 24 is anisotropically etched using the silicon oxide film 25 and the sidewall 29 as a mask. Next, using the silicon oxide film 25 and the sidewalls 29 as a mask, the polysilicon film 24 is used as a protective film for the interlayer insulating film 23, and anisotropic etching of the interlayer insulating film 23 is performed until the silicon nitride film 22 is exposed. The film 25 and the side wall 29 are removed to form openings 30 and 31 (FIG. 2B). The opening width of the opening 31 at this time is formed larger than the opening width of the opening 30, and the opening width of the opening 30 is, for example, 0.1 μm.
m to 0.3 μm, and the opening width of the opening 31 is, for example, 10
It is formed in the same manner as in the conventional case, with a thickness of μm to 20 μm.
Next, the polysilicon film 24 is removed by using the silicon nitride film 22 as an etching stopper, for example, using an F compound gas such as SF ₆ and NF ₃ or a gas containing these (FIG. 2C).

Next, using the interlayer insulating film 23 as a mask, the exposed portion of the silicon nitride film 22 is etched using a gas such as CF ₄ to form a second opening 30a in the silicon nitride film 22 and the interlayer insulating film 23. 31a (FIG. 2)
(D)).

In the method of manufacturing the semiconductor device of the first embodiment having the above structure, the removal of the polysilicon film 24 is performed.
Since the silicon nitride film 22 is used as an etching stopper, the semiconductor substrate 1 exposed in the second openings 30a and 31a is not etched, and the number of steps is reduced to remove the polysilicon film 24. It can be carried out. Further, when the second opening portions 30a and 31a having different opening widths on the semiconductor substrate 1 are provided, the second opening portion 31a having a large opening width used as an overlay inspection mark, an alignment mark, or the like. Since the semiconductor substrate 1 exposed at 1 can be formed without etching, accurate overlay inspection and alignment can be performed.

Embodiment 2 FIG. In the first embodiment, the first
Although the case where the film is formed of a single layer of the silicon nitride film 22 as the film, the present invention is not limited to this. For example, as shown in FIG. 3, the first film is a lower layer film having a thickness of about 100 Å. 32 and thickness 100-1000
An upper layer film 33 having a thickness of about angstrom is sequentially formed and laminated on the semiconductor substrate 1. The etching characteristics of the upper layer film 33 are different from the etching characteristics of the interlayer insulating film 23 and the polysilicon film 24. Become. The etching characteristics of the lower layer film 32 are different from the etching characteristics of the upper layer film 33 and the polysilicon film 24, and are made of, for example, a silicon oxide film.

Next, the step of removing the first film when the first film is composed of the lower film 32 and the upper film 33 as described above will be described with reference to FIG. First, through the steps similar to those in the first embodiment, the opening 34 is formed by etching using the polysilicon film 24 as a mask until the upper layer film 33 is exposed (FIG. 3A). Next, using the upper layer film 33 as an etching stopper, the polysilicon film 24 is removed under the same conditions as those shown in the first embodiment (FIG. 3B).

Next, using the interlayer insulating film 23 as a mask, the exposed portion of the silicon nitride film 33 is etched using a gas such as CF ₄ to form an opening 34a (FIG. 3).
(C)). Next, the exposed portion of the lower layer film 32 is exposed to, for example, CHF ₃
Etching is performed using such a gas to form the second opening 34b in the lower layer film 32, the upper layer film 33 and the interlayer insulating film 23 (FIG. 3D). At this time, since the etching characteristics of the interlayer insulating film 23 and the etching characteristics of the lower layer film 32 are the same, the interlayer insulating film 23 is slightly reduced by the film thickness of the lower layer film 32, but this does not matter.

The method of manufacturing the semiconductor device according to the second embodiment having the above-described structure not only exhibits the same effects as those of the first embodiment, but the first film is covered with the polysilicon film 24. The upper layer film 33 and the lower layer film 32 having different etching characteristics are formed, and the upper layer film 33 and the lower layer film 3 are formed.
Since the etching characteristics between the two are also different, the upper layer film 33 as an etching stopper is not the polysilicon film 2.
Even if the polysilicon film 24 is etched when it is removed, the lower layer film 32 having a different etching property from the polysilicon film 24 serves as an etching stopper. Therefore, the removal of the polysilicon film 24 is exposed through the second opening 34b. 1 can be performed without surely etching.

Embodiment 3 Although the second embodiment has shown the example in which the exposed portions of the upper layer film 33 and the lower layer film 32 as the first film are removed after the polysilicon film 24 is removed, the present invention is not limited to this. As shown in FIG. 4, through the steps similar to those of the second embodiment, etching is performed using the polysilicon film 24 as a mask until the upper layer film 33 is exposed to form an opening 34 (FIG. 4).
(A)). Next, using the polysilicon film 24 as a mask, the exposed part of the upper layer film 33 is removed by etching using a gas such as CF ₄ to form an opening 34a (FIG. 4B).

Next, using the lower layer film 32 as an etching stopper, the polysilicon film 24 is removed under the same conditions as those shown in the first embodiment (FIG. 4C). next,
The exposed portion of the lower layer film 32 is etched using a gas such as CHF ₃ to form a second opening 34b in the lower layer film 32, the upper layer film 33 and the interlayer insulating film 23 (FIG. 4).
(D)).

The method of manufacturing the semiconductor device according to the third embodiment having the above-described structure not only exhibits the same effects as those of the first embodiment, but also removes the exposed portion of the upper film 33. After that, since the polysilicon film 24 is removed using the lower layer film 32 as an etching stopper, the removal of the polysilicon film 24 can be performed without etching the semiconductor substrate 1 exposed in the second opening 34b. Not only can it be done, but the polysilicon film 2
Since the exposed portion of the upper layer film 33 is removed in the previous step of removing 4, it is possible to reliably remove the exposed portion of the upper layer film 33.

Embodiment 4 FIG. 5 is a sectional view showing a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention. Although the location of the second opening 30a is not particularly specified in each of the above-described embodiments, the case where the second opening 30a is used as a storage node contact hole of a DRAM will be described here.

First, the element isolation region 2, the source / drain region 3, the gate oxide film 4, the gate electrode 5, the insulating film 6, and the sidewall insulating film 7 are formed on the semiconductor substrate 1 as in the first embodiment. After that, the silicon nitride film 22 is laminated on the entire surface so as to cover the gate electrode 5. Next, on the silicon nitride film 22, an interlayer insulating film 23a made of, for example, a silicon oxide film as a fifth film having a different etching property from the silicon nitride film 22 is laminated (FIG. 5A). next,
A resist film is applied on the interlayer insulating film 23a to form a patterned resist film by photolithography, and the interlayer insulating film 23a is etched by using the resist film as a mask and the silicon nitride film 22 as an etching stopper to form an opening 35.
Are formed (FIG. 5B). At this time, the silicon nitride film 2
Since 2 serves as an etching stopper, the opening 35 is surely formed as a self-aligned contact without etching the gate electrode 5 even if the patterning of the resist film is slightly misaligned.

Next, the exposed portion of the silicon nitride film 22 is removed by using the interlayer insulating film 23a as a mask to form a bit line contact hole 35a (FIG. 5C). next,
A bit line 36 is formed on the interlayer insulating film 23a while filling the bit line contact hole 35a (FIG. 5D). Next, the interlayer insulating film 23b is laminated so as to cover the bit line 36 to form the interlayer insulating film 23. Then, through the same steps as those in the first embodiment, second opening 30a as a storage node contact hole is formed. Next, a storage node 37 is formed on the interlayer insulating film 23 while filling the second opening 30a and D
A RAM is formed (FIG. 5 (e)).

The method of manufacturing the semiconductor device of the fourth embodiment having the above-described structure not only exhibits the same effects as those of the first embodiment, but the silicon nitride film is formed when the bit line contact hole 35a is formed. Since the exposed portion of the silicon nitride film 22 is removed after forming the opening 35 using 22 as an etching stopper, the bit line contact hole 35a can be formed without etching the gate electrode 5 at all.

Further, although the silicon nitride film 22 is shown as an example of the first film in the fourth embodiment, the present invention is not limited to this. For example, the upper layer shown in the second and third embodiments. It goes without saying that the first membrane consisting of the membrane and the underlying membrane can be used as well.

Further, in each of the above embodiments, the first to fourth
Although the film has been described by defining each of the films as a silicon nitride film, a silicon oxide film, a polysilicon film, etc., the film is not limited to these, as long as the relationship of the etched characteristics of each film can be similarly set. It goes without saying that the same effect can be obtained regardless of which material is used, and the same effect can be obtained.

[0039]

As described above, according to the first aspect of the present invention, the first film is laminated on the semiconductor substrate, and the etching property of the first film and the etching target of the first film are formed on the first film. A second film made of materials with different characteristics is laminated, and on the second film,
Each of the first and second films is laminated with a third film made of a material having a different etching property and a material having a different etching property, and the etching property of the third film is different from that of the third film on the third film. A fourth film made of a material is laminated, the fourth film is patterned, and the etching property and the etching property of the fourth film are provided on the side wall of the first opening formed in the fourth film. Form sidewalls made of the same material,
The third film is etched using the fourth film and the sidewall as a mask until the second film is exposed, and the third film is used as a mask and the third film is used as a protective film for the second film. As a result, the second film is etched until the first film is exposed, the fourth film and the sidewalls are removed, the third film is removed using the first film as an etching stopper, and the second film is removed. Since the exposed portion of the first film is etched as a mask and the second opening is formed in the first and second films, the removal of the third film is performed by using the first film as an etching stopper. , The semiconductor substrate exposed at the second opening is not etched, and
It is possible to provide a method for manufacturing a semiconductor device capable of removing the third film by reducing the number of steps.

According to a second aspect of the present invention, in the first aspect, the first film is made of a silicon nitride film and the third film is made of a polysilicon film. Since the polysilicon film of the third film is surely removed by using the nitride film as an etching stopper, the semiconductor substrate exposed in the second opening is not etched,
Moreover, it is possible to provide a method for manufacturing a semiconductor device in which the number of steps can be reduced and the third film can be removed.

According to a third aspect of the present invention, in the first aspect, the first film is formed by sequentially stacking a lower layer film and an upper layer film on a semiconductor substrate, and an etching target characteristic of the upper layer film is Unlike the respective etching characteristics of the second and third films, the etching characteristics of the lower layer film are different from the etching characteristics of the upper layer film and the third film, so that the removal of the third film is different from that of the first film. A semiconductor in which either the upper layer film or the lower layer film is used as an etching stopper, the semiconductor substrate exposed in the second opening is not etched, and the number of steps can be reduced to remove the third film. It is possible to provide a method of manufacturing a device.

According to a fourth aspect of the present invention, in the third aspect, the second film is etched using the third film as a mask until the first film is exposed, and then the third film is exposed. Is used as a mask to etch only the upper layer film of the exposed portion of the first film, and the lower layer film of the first film is used as an etching stopper for the third film.
Since the third film is removed, the removal of the third film is performed by using the lower film of the first film as an etching stopper, and the semiconductor substrate exposed in the second opening is not etched.
Moreover, it is possible to provide a method for manufacturing a semiconductor device in which the number of steps can be reduced and the third film can be removed.

According to a fifth aspect of the present invention, in the third or fourth aspect, the lower layer film is a silicon oxide film,
Further, since the upper film is a silicon nitride film and the third film is a polysilicon film, the removal of the polysilicon film of the third film is performed by removing the silicon nitride film and the lower film silicon of the first film. Since any one of the oxide films more reliably acts as an etching stopper, the semiconductor substrate exposed in the second opening is not etched, and the number of steps can be reduced to remove the third film. It is possible to provide a method for manufacturing a semiconductor device.

According to a sixth aspect of the present invention, the second opening formed in the first and second films according to any one of the first to fifth aspects is connected to the storage node contact of the DRAM. When used for a hole, the first film is formed so as to cover the gate electrode, is formed so as to cover the first film and the gate electrode, and the etching characteristics of the first film are different from those of the etching target. Since the first film was used as an etching stopper on the gate electrode when forming the bit line contact hole in the film of No. 5, a semiconductor capable of forming the bit line contact hole without etching the gate electrode It is possible to provide a method of manufacturing a device.

Further, according to claim 7 of the present invention, the second opening formed in the first and second films according to any one of claims 1 to 5 has a large opening diameter. Since the second openings include, for example, the overlay inspection mark and the alignment mark, and the contact hole are formed at the same time,
It is possible to provide a method of manufacturing a semiconductor device in which the semiconductor substrate exposed at any of the second openings is not etched.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the method for manufacturing the semiconductor device in the first embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the method of manufacturing a semiconductor device according to the second embodiment of the present invention.

FIG. 4 is a sectional view showing the method for manufacturing the semiconductor device in the third embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the method of manufacturing a semiconductor device according to the fourth embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.

FIG. 7 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.

FIG. 8 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.

FIG. 9 is a cross-sectional view of an overlay inspection mark forming portion for explaining a problem of a conventional semiconductor device manufacturing method.

FIG. 10 is a diagram showing a method of detecting overlay of the overlay inspection mark forming portion shown in FIG.

FIG. 11 is a cross-sectional view of an overlay inspection mark forming portion for explaining the problems of the conventional semiconductor device manufacturing method.

FIG. 12 is a diagram showing a method of detecting overlay of the overlay inspection mark forming portion shown in FIG.

[Explanation of symbols]

1 semiconductor substrate, 22 silicon nitride film, 23, 23
a, 23b Interlayer insulating film, 24 Polysilicon film, 25
Silicon oxide film, 26 resist film, 27, 28 first opening, 29 sidewall, 30a, 31a,
34b 2nd opening part, 32 lower layer film, 33 upper layer film,
35a Bit line contact hole.

Claims (7)

[Claims] 1. A step of laminating a first film on a semiconductor substrate, and a second film made of a material having a different etching property from the first film on the first film. A step of laminating, a step of laminating a third film made of a material having different etching characteristics of the first and second films on the second film, and the third film. Formed on the fourth film is a step of laminating a fourth film made of a material having a different etching property from the third film, and patterning the fourth film. A step of forming a sidewall made of a material having the same etching property as the fourth film on the sidewall of the first opening, and using the fourth film and the sidewall as a mask, The etching of the film of No. 3 is performed by the above second The process of performing until the film is exposed, and the etching of the second film using the fourth film and the sidewall as a mask, the third film as a protective film of the second film, and the first film Until the film is exposed and removing the fourth film and the sidewall, removing the third film using the first film as an etching stopper, and using the second film as a mask. Etching the exposed portion of the first film to form a second opening in the first and second films. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first film is a silicon nitride film and the third film is a polysilicon film. 3. The first film is formed by sequentially stacking a lower film and an upper film on a semiconductor substrate, and the etching characteristics of the upper film are different from the etching characteristics of the second and third films. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the etching characteristics of the lower layer film are different from the etching characteristics of the upper layer film and the third film. 4. The third film is used as a mask to etch the second film until the first film is exposed, and then the third film is removed.
A step of etching only the upper layer film of the exposed portion of the first film using the above film as a mask, and a step of removing the third film using the lower layer film of the first film as an etching stopper. The method for manufacturing a semiconductor device according to claim 3, wherein 5. The semiconductor device according to claim 3, wherein the lower layer film is a silicon oxide film, the upper layer film is a silicon nitride film, and the third film is a polysilicon film. Manufacturing method. 6. The second opening formed in the first and second films according to claim 1 is D.
When used as a storage node contact hole of a RAM, a first film is formed so as to cover the gate electrode, is formed so as to cover the first film and the gate electrode, and the first film is to be etched. A method of manufacturing a semiconductor device, wherein the first film is used as an etching stopper on the gate electrode when forming a bit line contact hole in a fifth film having different characteristics and etching characteristics. 7. The second openings formed in the first and second films according to claim 1 include those having different opening diameters. A method of manufacturing a semiconductor device, comprising: