JPH09129876A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) Abstract: A local leak current from a sidewall insulating film formed on a sidewall of a gate electrode is prevented. A silicon oxide film 4 formed by a CVD method at about 675 ° C. is heat-treated at a temperature of 900 ° C. or more, a pattern of a gate electrode is formed, and a side surface of the gate electrode 3 is heated at a temperature of 800 to 900 ° C. Is thermally oxidized to form a thermal oxide film 6. As a result, the lower pattern of the gate electrode and the width of the silicon oxide film 4 are matched with each other, and then the sidewall insulating film 8 is formed. [Effect] Since the silicon oxide film 4 has a dense structure by heat treatment, the dimensional stability of the silicon oxide film 4 in the subsequent heat treatment and etching treatment becomes high, and as a result, the sidewall insulating film 8 having a good shape is formed. It becomes possible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, for example, an M having an LDD (Lightly Doped Drain) structure having a sidewall insulating film on the side wall of a gate electrode.
It is particularly suitable when applied to a method for manufacturing an OS transistor.

[0002]

2. Description of the Related Art Referring to FIG. 2, a conventional LDD structure M
A method of manufacturing the OS transistor will be described.

First, as shown in FIG. 2A, after a gate oxide film 102 is formed on a silicon substrate 101, a polysilicon film 103 containing impurities and silicon by a CVD method are formed on the gate oxide film 102. An oxide film 104 is sequentially formed, and they are patterned to process the polysilicon film 103 into the shape of a gate electrode.

Next, in order to reduce the leakage current from the side surface of the gate electrode made of the polysilicon film 103, pre-cleaning is performed, and then a silicon oxide film 111 is formed on the side surface of the gate electrode 103 by a thermal oxidation method.

After that, a silicon oxide film 108 is formed on the entire surface by a CVD method and is anisotropically etched to form a sidewall oxide film made of the silicon oxide film 108 on the side wall of the gate electrode 103.

The silicon substrate 1 in the LDD structure
The illustration and description of the step of introducing impurities into 01 are omitted.

[0007]

However, in the above-described conventional manufacturing method, the silicon oxide film 104 is scraped off by the pre-cleaning performed before forming the silicon oxide film 111 on the side surface of the gate electrode 103, or the silicon oxide film 104 is removed. 2 (b) due to the fact that the silicon oxide film 104 contracts due to the heat when the oxide film 111 is thermally oxidized, and further the silicon oxide film 111 grows excessively on the side surface of the gate electrode 103. ), The gate electrode 103
Of the sidewall oxide film 108, resulting in a step difference between the pattern of the side wall oxide film 108 and the silicon oxide film 104 thereabove.
There is a problem that the portion of becomes thin and the leakage current from that portion increases.

Therefore, an object of the present invention is to provide, for example, a method of manufacturing a semiconductor device capable of forming a sidewall insulating film having a shape that does not increase a leak current on a sidewall of a gate electrode.

[0009]

According to a method of manufacturing a semiconductor device of the present invention for solving the above-mentioned problems, a first method is to form a gate insulating film on a semiconductor substrate and then form a conductive film on the gate insulating film. Step, a second step of forming a first oxide film on the conductive film, and a first temperature condition higher than a temperature condition at the time of forming the first oxide film in the second process. Third step of heat-treating the oxide film, a fourth step of processing the conductive film into the shape of the gate electrode, and a temperature condition higher than the temperature condition at the time of forming the first oxide film in the second step. And, by thermal oxidation under a temperature condition equal to or lower than the temperature condition of the heat treatment in the third step,
Forming a second oxide film on a side surface of the gate electrode;
And the step of

[0010]

In the manufacturing method of the present invention, since the first oxide film formed on the gate electrode is heat-treated under a specific temperature condition, a second oxide film is then thermally oxidized on the side surface of the gate electrode. The first oxide film does not shrink due to the heat at that time. Further, the heat treatment densifies the first oxide film, and for example, the etching rate for HF that is usually used for pre-cleaning performed before the thermal oxidation of the side surface of the gate electrode is about 1/2 of that before the heat treatment. Become. Therefore, the amount of the first oxide film that is shaved during the pre-cleaning can be significantly reduced. That is, the dimensional stability of the first oxide film in the subsequent heat treatment or etching treatment becomes high.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described according to preferred embodiments.

FIG. 1 shows an example in which the present invention is applied to a method of manufacturing a MOS transistor having an LDD structure.

First, as shown in FIG. 1A, after a gate oxide film 2 is formed on a silicon substrate 1, an impurity-doped polysilicon film 3 is formed on the gate oxide film 2 by a CVD technique. Is deposited to a thickness of about 2000Å, and the temperature condition is set to about 675 on the polysilicon film 3.
A silicon oxide film 4 having a thickness of about 2500 Å is deposited by the CVD method at ℃.

Next, as shown in FIG. 1 (b), the silicon oxide film 4 is exposed to 9% in an O ₂ atmosphere by an oxidation diffusion technique.
Heat treatment is performed at 00 ° C. for 30 minutes. By this heat treatment, the silicon oxide film 4 becomes dense, and at a temperature of 900 ° C. or lower in the subsequent process, it does not become denser than this. That is, it does not contract. In addition, the heat treatment causes the H of the silicon oxide film 4 to rise.
The etching rate for F is about 1/2.

Next, as shown in FIG. 1C, the silicon oxide film 4 is processed into a gate electrode pattern by photolithography and etching. That is, the silicon oxide film 4 is selectively removed by etching using the resist 5 patterned on the silicon oxide film 4 as a mask.

Next, as shown in FIG. 1 (d), the polysilicon film 3 is processed into the shape of a gate electrode. At this time, as shown in the drawing, side etching of about 210 Å compared with the silicon oxide film 4 is performed. Give. In this example, the gate length was 0.5 μm. At this time, the polysilicon film 3 is processed by anisotropic etching using the resist 5 as a mask, but in order to improve the selectivity of anisotropic dry etching,
After removing the resist 5 after etching the silicon oxide film 4, the polysilicon film 3 may be etched using the silicon oxide film 4 as a mask.

Next, as shown in FIG. 1 (e), 0.5%
Pre-wash with HF solution for 1 minute.
The silicon oxide film 4 is removed by about 100Å.

Next, as shown in FIG. 1F, a heat treatment is performed in an O ₂ atmosphere at a temperature of 800 to 900 ° C. for 30 minutes to thermally oxidize the side surface of the gate electrode made of the polysilicon film 3. . By this thermal oxidation, a silicon thermal oxide film 6 of about 200 Å is formed on the side surface of the gate electrode 3. As a result, the width of the gate electrode pattern formed of the gate electrode 3 and the silicon thermal oxide film 6 and the width of the silicon oxide film 4 thereover substantially match, and no step is formed between them.

After that, a low-concentration impurity diffusion layer (L) having a shallow junction depth is formed in the silicon substrate 1 on both sides of the gate electrode pattern.
DD layer) 9 is formed.

Next, as shown in FIG. 1G, a silicon oxide film 8 having a thickness of about 2000 Å is deposited on the entire surface by the CVD technique.

Next, as shown in FIG. 1H, the silicon oxide film 8 is anisotropically dry-etched to form a sidewall oxide film made of the silicon oxide film 8 on the sidewall of the gate electrode pattern. At this time, in this example, there is no step between the gate electrode pattern formed of the gate electrode 3 and the silicon thermal oxide film 6 and the silicon oxide film 4 on the gate electrode pattern.
As indicated by A in (b), the side wall oxide film 8 does not locally have a thin film portion.

After that, a high-concentration impurity diffusion layer 10 having a deep junction depth is formed in the silicon substrate 1 on both sides of the sidewall oxide film 8.

Through the above steps, M having an LDD structure
An OS transistor is formed.

In the example described above, the temperature condition for forming the silicon thermal oxide film 6 is set to 800 to 900 ° C., but this temperature condition is higher than the temperature condition for forming the silicon oxide film 4. In addition, the temperature condition may be equal to or lower than the temperature condition during the heat treatment described with reference to FIG. Under such temperature conditions, the silicon oxide film 4 does not shrink when the silicon thermal oxide film 6 is formed.

The present invention is not limited to the method for manufacturing a MOS transistor, but can be applied to, for example, a method for manufacturing a field shield element isolation structure having a shield gate insulating film and a shield gate electrode.

[0026]

According to the present invention, since the shape of the sidewall insulating film provided on both sides of the gate electrode can be stably formed, the leakage current through the sidewall insulating film can be reduced. The characteristics of the semiconductor element can be improved and the power consumption of the semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a method of manufacturing a MOS transistor according to an embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing a method of manufacturing a conventional MOS transistor.

[Explanation of symbols]

 1 Silicon substrate 2 Gate oxide film 3 Polysilicon film (gate electrode) 4 Silicon oxide film 6 Silicon thermal oxide film 8 Silicon oxide film (sidewall oxide film)

Claims (1)

[Claims] 1. A first step of forming a conductive film on the gate insulating film after forming a gate insulating film on a semiconductor substrate, and a second step of forming a first oxide film on the conductive film. A step of: heat treating the first oxide film under a temperature condition higher than the temperature condition when the first oxide film was formed in the second process; A fourth step of processing into a second step, and higher than the temperature condition at the time of forming the first oxide film in the second step and equal to or lower than the temperature condition of the heat treatment in the third step. A fifth step of forming a second oxide film on the side surface of the gate electrode by thermal oxidation under temperature conditions.