JPH0883795A - Method for forming element isolation region - Google Patents

Abstract

PURPOSE: To eliminate the generation of an uneven part in a boundary between formed element isolation regions without generating void in a silicon layer to be used by forming the region by a buffered LOCOS method. CONSTITUTION: Nitrogen-doped amorphous silicon is deposited by using a CVD method thereby to form a silicon layer 31 having a thickness of about 50nm on a thin oxide film 21. The layer 31 is used as a buffer when a field oxide film is formed by selective oxidation with a silicon nitride mask 4a as a mask.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an element isolation region in a semiconductor device.

[0002]

2. Description of the Related Art In a silicon semiconductor integrated circuit, an active area to be an element is surrounded by an element isolation region covered with a relatively thick field oxide film and is isolated from other active areas. As a method for forming this field oxide film, there is a polybuffered LOCOS method. 11 to 13 show this poly-buffered LOCO.
6A and 6B are a process cross-sectional view and a plan view for explaining the S method.
First, as shown in FIG. 11A, a thin oxide film 21 is formed on the surface of the silicon substrate 1, and then, as shown in FIG. 11B, silicon made of non-doped polysilicon is formed on the thin oxide film 21. The layer 31b is formed.

Then, as shown in FIG. 11C, a silicon nitride layer 4 is formed on the silicon layer 31b. Next, as shown in FIG. 11D, a resist pattern 5 is formed by using a lithography technique. And FIG.
As shown in (e), using this resist pattern 5 as an etching mask, the silicon nitride layer 4 is selectively removed by using an etching technique to form a silicon nitride mask 4a.

Next, as shown in FIG. 11 (f), the resist pattern 5 is removed, and as shown in FIG. 12 (g), thermal oxidation is performed using the silicon nitride mask 4a as a mask to form a silicon layer as a buffer layer. 31b and the silicon substrate 1 are selectively oxidized to form a thick oxide film 22c. Here, the presence of the silicon layer 31b relieves the stress applied to the silicon substrate 1. Further, the stress generated in the substrate is also reduced by reducing the oxidation amount of the silicon substrate 1 when forming the field oxide film. Then, if the silicon nitride mask 4a is removed, an element isolation region covered with a thick oxide film 22c is formed as shown in FIG. 12 (i) and 13 will be described later.

Further, the above polybuffered LOCOS
In the method, the silicon layer 31b in the selectively oxidized region is directly oxidized without being etched, but the method is not limited to this and may be as follows. 14 to 16 are a cross-sectional view and a plan view for explaining a step of forming a field oxide film by another example of the polybuffered LOCOS method.

First, a thin oxide film 21 is formed on the surface of the silicon substrate 1 as shown in FIG.
As shown in FIG. 4B, a silicon layer 31c made of non-doped polysilicon is formed on the thin oxide film 21.
Thus, by inserting the non-doped polysilicon film between the silicon nitride mask 4a and the thin oxide film 21 which will be described later, the stress applied to the silicon substrate 1 during the selective oxidation can be relaxed.

Then, as shown in FIG. 14C, a silicon nitride layer 4 is formed on the silicon layer 31c. Next, as shown in FIG. 14D, a resist pattern 5 is formed by using a lithography technique. And in FIG.
As shown in (e) and (f), the resist pattern 5 is used as an etching mask to remove the silicon nitride layer 4, and subsequently the portion of the silicon layer 31c other than below the resist pattern 5 by an etching technique.

Next, as shown in FIG. 14G, after removing the resist pattern 5, the thin oxide film 21 is selectively removed. Subsequently, as shown in FIG. 15H, a thick oxide film 22c is selectively formed on the silicon substrate 1 by thermal oxidation using the silicon nitride mask 4a as a mask. Here, due to the presence of the silicon layer 31c, the silicon substrate 1
The stress applied to is relaxed. Then, by removing the silicon nitride mask 4a and the silicon layer 31c remaining under the silicon nitride mask 4a without being oxidized, FIG.
As shown in, the element isolation region covered with the thick oxide film 22c is formed. Note that FIG. 15 (j) and FIG. 16 will be described later.

[0009]

Since the conventional configuration is as described above, there are the following problems.
In the above-mentioned conventional poly-buffered LOCOS method, as can be seen from FIGS. 11 (f) and 12 (g), a silicon layer made of non-doped polysilicon is provided between the thick silicon nitride mask 4a and the thin oxide film 21. 31b is inserted. Therefore, when the silicon layer 31b and the silicon substrate 1 are selectively oxidized by using the silicon nitride mask 4a, as shown in FIG. 12 (h), an oxidized region called bird's beak is formed on the silicon substrate 1 and the silicon layer 31b.
And between the silicon layer 31b and the silicon nitride mask 4a.

As a result, the cross section of the field oxide film at the boundary of the element isolation region immediately after the selective oxidation has an overhang structure, and in the subsequent steps such as gate electrode formation, disconnection at the step or etching residue Problems such as occurrence occur. Furthermore, this poly-buffered LOCOS
According to the method, after the selective oxidation of the silicon substrate 1, as shown in FIG. 12, a void (hole) 9 may be formed in the stress concentration portion of the silicon layer 31b. When the void 9 is generated, the thin oxide film 21 exposed at the bottom of the void 9 is removed when the silicon layer 31b after the selective oxidation is removed.
Will be etched.

Then, as shown in FIG. 13, when the thin oxide film 21 is etched, the formed holes 9 are formed.
There is a case where the silicon substrate 1 itself exposed through is etched. In such a state, the following problems occur. If a diffusion layer is formed in a region including the etched portion after the subsequent steps, the etched portion may cause a junction leak. Also, if a MOS gate electrode is formed on this, not only a normal channel cannot be formed, but also a gate oxide film defect is caused.

In order to prevent the formation of the holes 9, it is possible to make the thin oxide film 21 thick. However, if the thin oxide film 21 is thickened, the bird's beak region originally desired to be reduced is enlarged, and the effect of adopting the polybuffered LOCOS method is reduced. Furthermore, this poly-buffered L
In addition to the above problems, the OCOS method has a problem that the boundary (bird's beak edge) between the active area and the field oxide film area formed by the thick oxide film 22c becomes uneven.

In this polybuffered LOCOS method,
When the exposed silicon layer 31b is selectively oxidized, the oxidation rate of the silicon layer 31b is made of polysilicon.
The lateral oxidation from the edge of the oxidation mask does not proceed uniformly because it depends on the plane orientation of the crystal grains. Therefore, FIG.
As shown in (i) and FIG. 13 (k), the boundary between the active area and the field oxide area formed by the thick oxide film 22c becomes uneven. And this makes it difficult to define fine active areas. Further, due to the unevenness of the boundary, the breakdown voltage of the gate oxide film formed in the active area may vary. Further, when forming a gate electrode of a fine MOSFET of 0.25 μm or less, this irregular asperity has various problems such as adversely affecting pattern formation by lithography.

On the other hand, the aforementioned poly-buffered LOCO
The other examples of the S method also have the following problems as described above. One of them is that after the selective oxidation of the silicon substrate 1, as shown in FIG. 15, voids (holes) 9 are formed in the stress concentration portion of the silicon layer 31c. When the void 9 is generated, as shown in FIG. 13, the thin oxide film 21 exposed at the bottom of the void 9 is etched when the silicon layer 31c is removed after the selective oxidation. Then, as shown in FIGS. 16 (k) and 16 (l), the silicon substrate 1 is exposed and the silicon substrate 1 itself is etched to form the hole 9a therein.

In order to prevent this, as described above,
There is also a method of thickening the thin oxide film 21 as the pad oxide film. However, if this is done, the bird's beak region originally desired to be reduced is enlarged, and the polybuffered LOCO is reduced.
The effect of adopting the S method is reduced. In addition, FIG.
2 (i) and FIG. 13 (k), also in this case, as shown in FIG. 15 (j) and FIG. 16 (l), the field oxide film area formed by the active area and the thick oxide film 22c is formed. The boundary (bird's beak edge) becomes uneven. Then, similarly to the above, it is difficult to determine a fine active area.

The present invention has been made to solve the above-mentioned problems, and is a buffered LOCOS.
It is an object of the present invention to prevent formation of voids in the silicon layer used and formation of irregularities at the boundaries of the formed element isolation regions by forming the element isolation regions by the method. Also,
Because of these, conventional poly-buffered LOC
It is an object of the present invention to prevent the formation process from becoming too long as compared with the OS method.

[0017]

According to the method of forming an element isolation region of the present invention, a thin oxide film is first formed on a semiconductor substrate, and then an impurity that prevents crystallization of silicon is formed on the thin oxide film. A silicon layer made of added silicon is formed. Next, after forming an oxidation resistant film having oxidation resistance on the silicon layer, a part of the oxidation resistant film is selectively removed to form an oxidation mask made of the oxidation resistant film. And
It is characterized in that the silicon layer and the semiconductor substrate are oxidized using the oxidation mask as a mask to form an element isolation region. In addition, after removing at least a part of a region of the silicon layer other than under the oxidation mask, the element isolation region is formed using the oxidation mask as a mask.

Further, it is characterized in that the impurities to be added are added while being changed in the film thickness direction of the silicon layer. In addition, a silicon layer is formed on the first silicon film and a second silicon film formed on the first silicon film.
The first and second silicon films are formed so that the added states of the impurities are different from each other. Further, the first silicon film is characterized by being made of a material having a characteristic that the oxidation rate is higher than that of the second silicon film. Further, the silicon layer is characterized by being doped with an impurity that prevents crystallization of silicon and reduces the oxidation rate of silicon. Then, the silicon layer is added with a combination of impurities that prevent crystallization of silicon and reduce the oxidation rate of silicon, and impurities that prevent crystallization of silicon and increase the oxidation rate of silicon. It is characterized by

[0019]

In the silicon layer, the movement of the silicon atoms constituting the silicon layer is suppressed, and the silicon layer is in a state in which rearrangement is difficult. Further, the oxidation rate of the silicon layer varies depending on the concentration and type of impurities added to the silicon layer.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Before explaining one embodiment of the present invention,
The outline of the present invention will be described. According to the present invention, as a silicon layer formed under an oxidation mask used for selective oxidation for forming a field oxide film, microcrystalline polysilicon doped with impurities of nitrogen, oxygen, and carbon, or amorphous silicon doped with those impurities is used. It is the one that is used. Also, a layered structure in which these impurities are doped is combined, or a multilayer structure is formed by combining these with non-doped amorphous silicon.

In the microcrystalline polysilicon doped with these impurities, the growth of crystal grains is remarkably slowed even when heat-treated. Further, amorphous silicon doped with these impurities has a property of being microcrystallized because it does not easily become a normal polycrystal even if it is heat-treated.
Therefore, even under a high-temperature heat treatment such as thermal oxidation in which stress is applied, the silicon atoms forming the silicon film are in a state of being hard to move, and the generation of voids can be suppressed. Since the crystal grains are small and uniform, the oxidation also progresses uniformly, and the boundary does not become uneven.

Further, when nitrogen or carbon is used as an impurity, in addition to the characteristic of being uniformly oxidized, the characteristic of slowing the oxidation rate also occurs. Therefore, it is possible to suppress the occurrence of voids, which has been a problem in the conventional method, eliminate the uneven state at the boundary portion of the field oxide film, and reduce the bird's beak region. On the other hand, it is possible to control the silicon layer to have a multi-layer structure in which different impurities are doped as described above, or to make the cross-sectional shape of the field oxide film gentle by changing the doping impurity concentration in the film thickness direction. it can.

An embodiment of the present invention will be described below with reference to the drawings. Example 1. 1 and 2 are sectional views showing steps for explaining one embodiment according to the present invention. 2 (j)
FIG.

This embodiment will be described below with reference to FIGS. First, as shown in FIG. 1A, a thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1 by performing heat treatment at 900 ° C. in a dry oxidizing atmosphere. The thin oxide film 21 is formed to relax the stress of the silicon substrate 1 and to serve as an etch stopper at the time of removing the upper silicon layer in the process described later.

Then, as shown in FIG. 1B, CVD
Nitrogen-doped amorphous silicon is deposited using the method to form a silicon layer 31 with a thickness of about 50 nm into a thin oxide film 21.
Form on top. In this deposition by the CVD method, the deposition temperature is set to 500 ° C., and SiH ₄ or Si _{2 is used} as a source gas.
Ammonia gas is used in addition to H ₆ , and nitrogen is doped simultaneously with the deposition of amorphous silicon. Nitrogen as an impurity has a function of preventing crystallization of silicon and additionally reducing an oxidation rate.

Although nitrogen is used as the impurity to be doped in the silicon layer 31 here, impurities such as carbon and oxygen may be used. Further, in the present embodiment and the embodiments described later, the CVD method will be described as an example of the silicon layer deposition method and the impurity doping method, but the silicon layer deposition method is not limited to the CVD method. For example, the deposition of the silicon layer and the doping of the impurities may be simultaneously performed by the sputtering method.

The impurities such as nitrogen, carbon and oxygen with which the silicon layer 31 is doped may have a concentration in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . If the doping amount of these impurities is less than 1 × 10 ²¹ cm ⁻³ , the effect of suppressing the growth of crystal grains will not be exhibited sufficiently. Further, the doping amount of these impurities is 3 × 10
^When it exceeds ²² cm ⁻³ , the compound is formed, not the state in which impurities are doped. For example, when nitrogen is doped, silicon becomes a nitride film if the doping amount is so large.

The silicon layer has a function of relieving the stress of the substrate at the stage of forming the field oxide film, but if it becomes a nitride film in this way, it will not be oxidized at all, and the nitride film will be very small. Since it is rigid, the stress generated in the substrate cannot be relaxed. This also applies to carbon. Further, when oxygen is doped, if the doping amount is too large, it becomes an oxide film, and a silicon oxide film is formed in an unnecessary portion.

Subsequently, as shown in FIG. 1C, a thickness of about 200 nm which serves as a mask for field oxidation (selective oxidation).
A silicon nitride (Si ₃ N ₄ ) layer 4 is formed. Then
A photoresist layer is formed on the silicon nitride layer 4 and then, as shown in FIG.
Patterning is performed as shown in (d), whereby a resist pattern 5 is formed. Instead of photoresist, X-ray sensitive resist or electron beam resist is used.
The resist pattern 5 may be formed by a lithography technique using an electron beam or an electron beam.

Next, as shown in FIG. 1E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask, whereby the silicon nitride mask 4a (oxidation mask) is formed.
To form. This etching is performed by a reactive ion etching (RIE) method using a fluorocarbon gas. Then, by this etching, the portion of the lower silicon layer 31 other than below the silicon nitride mask 4a is exposed.

Next, as shown in FIG. 1 (f), after removing the resist pattern 5 by ashing treatment using oxygen radicals, liquid treatment with a mixed liquid of ammonia and hydrogen peroxide and peroxidation are performed. RCA cleaning is performed by liquid treatment with a mixed liquid of hydrogen and hydrochloric acid. Subsequently, as shown in FIG. 2G, thermal oxidation is performed by heating at a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor using the silicon nitride mask 4a as a mask, thereby exposing the exposed silicon layer 31. The surface of the silicon substrate 1 is oxidized to form a thick oxide film 22 having a thickness of 450 nm. The oxidation temperature of 1000 ° C. is one example, and other temperatures, for example, 700 to 1
There is no problem if it is in the range of about 150 ° C.

Then, the thin oxide film formed on the surface of the silicon nitride mask 4a is removed by etching with dilute hydrofluoric acid, and then the silicon nitride mask 4a is selectively removed by hot phosphoric acid. Further, the silicon layer 31 is selectively removed by the RIE method using a chlorine-based gas, and as shown in FIG. 2H, a silicon substrate in which an element isolation region covered with a thick oxide film 22 is formed. Get one. Finally, as shown in FIG. 2I, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1 in the region surrounded by the thick oxide film 22.

By using the method described above, voids are not generated in the silicon layer 31 as in the conventional case, and holes are formed in the silicon substrate 1 as shown in the plan view of FIG. 2 (j). Nothing. Further, the boundary portion of the thick oxide film 22 does not become uneven. Furthermore, since the impurities are doped into the silicon layer 31 at the time of forming the silicon layer 31, the problem can be solved without increasing the number of steps as compared with the conventional method.

Embodiment 2 FIG. 3 and 4 are a sectional view and a plan view showing a process for explaining a second embodiment according to the present invention. The second embodiment will be described below with reference to FIGS. First, as shown in FIG. 3A, a thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1 by performing heat treatment at 900 ° C. in a dry oxidizing atmosphere. Next, as shown in FIG. 3B, a silicon film 32 made of non-doped amorphous silicon and having a film thickness of about 25 nm is deposited and formed, and subsequently, a nitrogen-doped film having a different impurity addition state is formed thereon. Thickness about 25n
A silicon film 33 of m is deposited and formed.

The silicon film 32 is made of SiH ₄ or Si ₂
The temperature is about 500 ° C by the CVD method using H ₆ as the source gas.
Are deposited and formed. In addition, the silicon film 33 is formed by depositing the silicon film 32 and then using SiH ₄ as a source gas.
Alternatively, ammonia gas is used in addition to Si ₂ H ₆ , and deposition is performed at a temperature of about 500 ° C. The doping nitrogen concentration of the silicon film 33 is 1 × 10 ²¹ cm ^−3.
To 3 × 10 ²² cm ^-3 is preferable. Since the silicon film 33 is doped with nitrogen, it has a lower oxidation rate than the silicon film 32.

Next, as shown in FIG. 3C, a silicon nitride (Si ₃ N ₄ ) layer 4 having a thickness of about 200 nm, which serves as a field oxidation mask, is formed. Next, a photoresist layer is formed on the silicon nitride layer 4 and, as shown in FIG. 3D, a resist pattern 5 is formed by using a photolithography technique. Instead of the photoresist, a resist sensitive to X-rays or an electron beam resist may be used, and the resist pattern 5 may be formed by a lithography technique using X-rays or electron beams.

Next, as shown in FIG. 3E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask 4a. This etching is performed by the RIE method using a fluorocarbon gas. By this etching, the portion of the lower silicon film 33 other than below the silicon nitride mask 4a is exposed. Subsequently, as shown in FIG. 3F, the resist pattern 5 is removed by an ashing process using oxygen radicals. And RC
Wash with A wash.

Next, as shown in FIG. 4 (g), the silicon nitride mask 4a is used as a mask to perform thermal oxidation by heating to a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor to expose the exposed silicon. A thick oxide film 2 having a thickness of 450 nm is formed by oxidizing the films 32 and 33 and the surface of the silicon substrate 1.
2a is formed. As described above, the oxidation temperature of 1000 ° C. is an example, and there is no problem if the temperature is other than that, for example, in the range of 700 to 1150 ° C.

Next, the thin oxide film on the surface of the silicon nitride mask 4a formed by this thermal oxidation is removed with dilute hydrofluoric acid, and the silicon nitride mask 4a is selectively removed by etching with hot phosphoric acid. Further, this time, the silicon films 32 and 33 are selectively removed by etching by the RIE method using a chlorine-based gas (FIG. 4H), and an element isolation region covered with the thick oxide film 22a is formed. Then, as shown in FIG. 4I, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1.

As described above, holes are formed in the silicon substrate 1 as shown in the plan view of FIG. 4 (j) without generating voids in the silicon layer composed of the silicon films 32 and 33 as in the conventional case. It doesn't get lost. Further, the boundary portion of the thick oxide film 22a does not become uneven. Further, unlike the above-described embodiment, since the silicon films 32 and 33 having different oxidation rates are used, the cross-sectional shape of the thick oxide film 22a to be the field oxide film is controlled. In addition, in the above-described embodiment, when forming a single silicon layer, even if the doping nitrogen is made to have a higher concentration toward the upper portion, the same effect as in the second embodiment can be obtained.

Example 3. Although the non-doped amorphous silicon is used as the silicon film 32 in the embodiments shown in FIGS. 3 and 4, the present invention is not limited to this. As the silicon film 32, amorphous silicon doped with oxygen that increases the oxidation rate is used,
The state of addition of impurities may be different from that of the silicon film 33.

As described above, by using the amorphous silicon doped with oxygen, it is possible to suppress the growth of polycrystalline grains of the silicon film 32 when forming the thick oxide film 22a as the field oxide film. Further, since oxygen is doped, the rate of oxidation of the silicon film 32 is increased, and the difference in the rate of oxidation from the silicon film 33 doped with nitrogen is larger than that in the above-described embodiment. Because of these, the thick oxide film 22a
It is possible to further moderate the inclination of the cross-sectional shape while suppressing the occurrence of irregularities at the boundary portion of the.

By the way, in the above embodiment, although amorphous silicon is used for the silicon layer, the same effect can be obtained even if microcrystalline polysilicon is used. In the low pressure CVD method, by setting the deposition temperature to about 500 ° C., amorphous silicon can be deposited and formed on the silicon oxide layer. Here, the deposition temperature is set to 650
℃ and, using SiH ₄ or Si ₂ H ₆ as a source gas, in addition ammonia gas is also introduced, if so doped with nitrogen as an impurity, microcrystalline polysilicon which nitrogen is doped can be deposited.

Although one silicon layer is doped with one impurity in the above embodiment, the present invention is not limited to this, and two or more impurities may be doped. For example, if amorphous silicon doped with oxygen and nitrogen is used as the silicon layer, the oxidation rate can be slightly increased, and in addition, the growth of crystal grains can be further suppressed.

Here, the growth of crystal grains cannot be suppressed very much only by doping with oxygen without increasing the oxidation rate. On the other hand, if the growth of crystal grains is further suppressed, this will increase the doping amount of oxygen,
The oxidation rate becomes too fast. However, as described above, if not only oxygen but also nitrogen and carbon are doped at the same time, the oxidation rate will not be too fast. That is, by doping the silicon layer with an impurity that increases the oxidation rate and an impurity that decreases the oxidation rate, it becomes possible to accurately control the state of oxidation from the end of the silicon layer during selective oxidation. The cross-sectional shape of the oxide film can be controlled more finely.

Example 4. In the above embodiment, as a method of shortening the oxidation time and controlling the cross-sectional shape of the field oxide film, the upper layer portion of the silicon layer in the region to be selectively oxidized before the selective oxidation, that is, a portion doped with an impurity that slows down the oxidation rate is used. Can be removed by etching.
According to this method, since the impurities that delay the oxidation do not exist in the field-oxidized silicon layer, the oxidation progresses faster than in the above-described embodiment. On the other hand, under the oxidation mask, there remains a layer that is doped with impurities that retard oxidation and inhibit recrystallization. Therefore, the phenomenon that the tip of the bird's beak becomes uneven and the problem that a void is generated in the silicon layer under the oxidation mask are prevented as in the above-described embodiment.

5 and 6 are a sectional view and a plan view showing a process for explaining a fourth embodiment according to the present invention. The fourth embodiment will be described below with reference to FIGS. First, as shown in FIG. 5A, a thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1 by performing heat treatment at 900 ° C. in a dry oxidizing atmosphere. Next, as shown in FIG. 5B, a silicon film 32 made of non-doped amorphous silicon or oxygen-doped amorphous silicon with a thickness of about 25 nm is deposited and formed. A silicon film 33 having a film thickness of about 25 nm doped with nitrogen is deposited and formed.

The silicon film 32 is made of SiH ₄ or Si ₂
The temperature is about 500 ° C by the CVD method using H ₆ as the source gas.
Are deposited and formed. Further, the silicon film 33 is deposited and formed subsequent to the deposition and formation of the silicon film 32, using ammonia gas in addition to SiH ₄ or Si ₂ H _{6 as} a source gas, and also at a temperature of about 500 ° C. This silicon film 33
The concentration of the doped nitrogen may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . Since the silicon film 33 is doped with nitrogen, it has a lower oxidation rate than the silicon film 32.

Next, as shown in FIG. 5C, a silicon nitride (Si ₃ N ₄ ) layer 4 having a thickness of about 200 nm which serves as a mask for field oxidation is formed. Next, a photoresist layer is formed on the silicon nitride layer 4, and as shown in FIG. 5D, a resist pattern 5 is formed by using a photolithography technique. In addition, instead of photoresist, X
The resist pattern 5 may be formed by a lithography technique using X-rays or electron beams, using a resist sensitive to rays or an electron beam resist.

Next, as shown in FIG. 5E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask 4a. This etching is performed by the RIE method using a fluorocarbon gas. Then, by this etching, the portion of the silicon film 33 other than the portion under the silicon nitride mask 4a is exposed. Then, as shown in FIG. 5F, the upper silicon film 33 is removed by etching using the resist pattern 5 as a mask by the RIE method using a chlorine-based gas. At this time, the lower silicon film 32 is not removed by etching. Next, as shown in FIG. 5G, the resist pattern 5 is removed by an ashing process using oxygen radicals. Next, RC
Wash with A wash.

Then, as shown in FIG. 6H, thermal oxidation is carried out by heating to a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor using the silicon nitride mask 4a as a mask. The silicon film 32 exposed by this thermal oxidation
And the end of the silicon film 33 and the surface of the silicon substrate 1 in a region other than under the silicon nitride mask 4a are oxidized,
A thick oxide film 22a having a film thickness of 0 nm is formed. It should be noted that the oxidation temperature of 1000 ° C. in this thermal oxidation is an example, and there is no problem if the temperature is other than that, for example, in the range of 700 to 1150 ° C.

Next, the thin oxide film on the surface of the silicon nitride mask 4a formed by this thermal oxidation is removed with dilute hydrofluoric acid, and the silicon nitride mask 4a is selectively removed by etching with hot phosphoric acid. Further, this time, the silicon films 32 and 33 are selectively removed by etching by the RIE method using a chlorine-based gas (FIG. 6I) to form an element isolation region covered with the thick oxide film 22a. Then, as shown in FIG. 6J, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1.

When the method described above is used, no void is generated in the silicon layer composed of the silicon films 32 and 33 unlike the conventional method. Therefore, as shown in the plan view of FIG. 6K, no holes are formed in the silicon substrate 1.
Furthermore, the boundary portion of the thick oxide film 22a does not become uneven. Further, unlike the above-mentioned embodiment, since the silicon films 32 and 33 having different oxidation rates are used, the cross-sectional shape of the thick oxide film 22a to be the field oxide film is controlled. In addition, the first embodiment
In the above, when forming a single-layer silicon layer, even if the doping nitrogen is made to have a higher concentration toward the upper portion and the high concentration region is removed by etching, the same effect as this embodiment can be obtained.

By the way, in the first embodiment, the thermal oxidation is performed without processing the silicon layer 31 (FIGS. 1F to 1G, etc.), but the present invention is not limited to this. . As shown in the following embodiments, the nitride film serving as an oxidation mask may be etched using the resist pattern formed so as to cover the element formation region as a mask, and then the silicon layer may be selectively removed. . In this selective removal, the silicon layer in the region other than under the oxidation mask may be entirely removed. Alternatively, the silicon layer may be left to have a certain thickness, that is, the silicon layer in a region other than under the oxidation mask may be thinned.

By doing so, when the element isolation region is formed by thermal oxidation, the step between the oxide film surface of the element isolation region and the silicon surface of the active region can be reduced. As a result, the accuracy and yield of pattern formation in the subsequent gate electrode wiring process can be improved.

Example 5. 7 and 8 are sectional views showing steps for explaining the fifth embodiment according to the present invention.
Note that FIG. 8K is a plan view. Hereafter, this FIG.
This embodiment will be described according to 8. First, FIG. 7 (a)
As shown in FIG. 6, a heat treatment is performed at 900 ° C. in a dry oxidizing atmosphere to form a silicon substrate 1 having a thickness of 6 to 12
A thin oxide film 21 having a thickness of nm is formed. This thin oxide film 2
1 is formed for the purpose of showing below in the step of selective oxidation described later. First, it is formed to relieve the stress generated in the silicon substrate 1. When removing the silicon layer as the buffer layer after the selective oxidation,
It is formed to serve as an etching stopper.

Then, as shown in FIG. 7B, CVD
Method is used to deposit nitrogen-doped amorphous silicon to form a thin oxide film 2 with a silicon layer 31a having a thickness of about 50 nm.
Form on 1. In the deposition by this CVD method, the deposition temperature is 500 ° C., and the source gas is SiH ₄ or Si ₂
Ammonia gas is used in addition to H ₆ , and nitrogen is doped simultaneously with the deposition of amorphous silicon. This nitrogen is an impurity that prevents crystallization of silicon and additionally reduces the oxidation rate.

Here, the doped nitrogen concentration may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . If the doping amount of impurities such as nitrogen, carbon, and oxygen is less than 1 × 10 ²¹ cm ⁻³ , the effect of suppressing the growth of crystal grains will not be exhibited sufficiently. If the doping amount exceeds 3 × 10 ²² cm ⁻³ , the compound is not formed in the impurity-doped state but the compound is formed. For example, when nitrogen is doped, if the amount of doping is so large, silicon becomes a nitride film.

A part of the silicon layer (buffer layer) is oxidized at the stage of forming the field oxide film so that the stress of the substrate is relaxed. In addition, the amorphous silicon and microcrystalline polysilicon states allow the stress to be absorbed rather than being in a very rigid state. However, if it becomes a nitride film as described above, it is not oxidized at all, and since the nitride film is very hard, it is impossible to relax the stress generated in the substrate. This also applies to carbon. Further, when oxygen is doped, if the doping amount is too large, it becomes an oxide film, and a silicon oxide film is formed in an unnecessary portion.

Subsequently, as shown in FIG. 7C, a thickness of about 200 nm which serves as a mask for field oxidation (selective oxidation).
A silicon nitride (Si ₃ N ₄ ) layer 4 is formed. Then
A photoresist layer is formed on the silicon nitride layer 4,
As shown in (d), a resist pattern 5 is formed by using a photolithography technique. Instead of the photoresist, a resist sensitive to X-rays or an electron beam resist may be used, and the resist pattern 5 may be formed by a lithography technique using X-rays or electron beams.

Next, as shown in FIG. 7E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask 4a. This etching is performed by a reactive ion etching (RIE) method using a fluorocarbon gas. Then, this etching exposes a portion of the lower silicon layer 31a other than below the silicon nitride mask 4a.

Subsequently, as shown in FIG. 7F, the exposed portion of the silicon layer 31a is removed by etching by the RIE method using a chlorine-based gas, using the resist pattern 5 as a mask. Next, as shown in FIG. 7G, the resist pattern 5 is removed by an ashing process using oxygen radicals. Then, the exposed thin oxide film 21 on the silicon substrate 1 is removed by etching with a hydrofluoric acid-based etching solution to expose the surface of the silicon substrate 1 in a region other than below the silicon nitride mask 4a.

Next, RCA cleaning of the silicon substrate 1 is performed by a liquid treatment with a mixed liquid of ammonia and hydrogen peroxide and a liquid treatment with a mixed liquid of hydrogen peroxide and hydrochloric acid. Subsequently, as shown in FIG. 8H, the silicon nitride mask 4a is formed.
As a mask in an oxygen atmosphere containing water vapor for 100
Thermal oxidation is carried out by heating to a temperature of 0 ° C. As a result, the exposed side surface of the silicon layer 31a and the surface of the silicon substrate 1 are oxidized, and the thick oxide film 2 having a thickness of 450 nm is formed.
2b is formed. Then, the thin oxide film formed on the surface of the silicon nitride mask 4a is removed by etching with diluted hydrofluoric acid, and the silicon nitride mask 4a is selectively removed by hot phosphoric acid.

Further, the silicon layer 31a is selectively removed by the RIE method using a chlorine-based gas.
As shown in (i), a silicon substrate 1 having an element isolation region covered with a thick oxide film 22b is obtained. Finally,
As shown in FIG. 8 (j), the thin oxide film 21 is removed,
The surface of the silicon substrate 1 in the region surrounded by the thick oxide film 22b is exposed.

By using the above method, unlike the prior art, no void is generated in the silicon layer 31a. Therefore, as shown in the plan view of FIG. 8K, no holes are formed in the silicon substrate 1. Further, the boundary portion of the thick oxide film 22b does not become uneven. Further, since the impurities are doped into the silicon layer 31a at the time of forming the silicon layer 31a, the number of steps does not increase as compared with the conventional method, and the problem can be solved.
Further, in this embodiment, since the silicon layer 31a is doped with nitrogen, the oxidation rate becomes slower and the bird's beak can be shortened.

Example 6. 9 and 10 are a sectional view and a plan view showing a process for explaining a sixth embodiment according to the present invention. The sixth embodiment will be described below with reference to FIGS. First, as shown in FIG. 9A, by performing a heat treatment at 900 ° C. in a dry oxidizing atmosphere,
A thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1.
To form. Next, as shown in FIG. 9B, a silicon film 32a made of non-doped amorphous silicon and having a film thickness of about 25 nm is deposited and formed, and subsequently, a silicon film 33a having a film thickness of about 25 nm doped with nitrogen is formed thereon.
Are deposited and formed.

The silicon film 32a is made of SiH ₄ or Si.
By the CVD method using ₂ H ₆ as a source gas, the temperature is about 500 ° C.
Are deposited and formed. In addition, the silicon film 33a is used as a source gas of Si after the deposition of the silicon film 32a.
Ammonia gas is used in addition to H ₄ or Si ₂ H ₆ , and deposition is performed at a temperature of about 500 ° C. The concentration of nitrogen doped in the silicon film 33a is 1 × 10 ²¹
The range from cm ^-3 to 3 x 10 ²² cm ^-3 is good. Since the silicon film 33a is doped with nitrogen, it has a lower oxidation rate than the silicon film 32a.

Next, as shown in FIG. 9C, a silicon nitride (Si ₃ N ₄ ) layer 4 having a thickness of about 200 nm which serves as a mask for field oxidation is formed. Next, a photoresist layer is formed on the silicon nitride layer 4, and as shown in FIG. 9D, a resist pattern 5 is formed by using a photolithography technique. Instead of the photoresist, a resist sensitive to X-rays or an electron beam resist may be used, and the resist pattern 5 may be formed by a lithography technique using X-rays or electron beams.

Next, as shown in FIG. 9E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask 4a. This etching is performed by the RIE method using a fluorocarbon gas. Then, by this etching, the portion of the lower silicon film 33a other than the portion below the silicon nitride mask 4a is exposed.

Subsequently, in this state, this time, by the RIE method using chlorine gas, the silicon films 32a and 33a are selectively removed as shown in FIG. The surface of the thin oxide film 21 in the other area is exposed. Next, as shown in FIG. 9G, the resist pattern 5 is removed by an ashing process using oxygen radicals.

Next, the exposed thin oxide film 21 is removed by wet etching using a hydrofluoric acid-based etching solution, and then the silicon substrate 1 is cleaned by RCA cleaning. Then, as shown in FIG. 10H, thermal oxidation is performed by heating to a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor using the silicon nitride mask 4a as a mask. As a result, the exposed silicon films 32a, 33
450 nm by oxidizing the side surface of a and the surface of the silicon substrate 1.
Forming a thick oxide film 22b.

Next, the thin oxide film on the surface of the silicon nitride mask 4a formed by this thermal oxidation is removed with dilute hydrofluoric acid, and the silicon nitride mask 4a is selectively removed by etching with hot phosphoric acid. Further, this time, the silicon films 32a and 33a are selectively removed by etching by the RIE method using a chlorine-based gas (FIG. 10 (i)), and the thick oxide film 22b is formed.
Forming an element isolation region covered with. And FIG.
As shown in (j), the thin oxide film 21 is removed to expose the surface of the silicon substrate 1.

By using the above method, no void is generated in the silicon films 32a and 33a unlike the conventional case. Therefore, as shown in the plan view of FIG.
No holes are formed in the silicon substrate 1. Further, the boundary portion of the thick oxide film 22b does not become uneven. Further, unlike the fifth embodiment, the silicon films 32a and 33a having different oxidation rates are used.
As a result, the cross-sectional shape of the thick oxide film 22b, which becomes the field oxide film, is controlled to be a gentler shape. In the above embodiment, the same effect can be obtained even if the silicon layer is a single layer and the concentration of the doping nitrogen is higher toward the top when forming this layer.

Example 7. Although non-doped amorphous silicon is used as the silicon film 32a in the sixth embodiment, the present invention is not limited to this. Amorphous silicon doped with oxygen that increases the oxidation rate may be used as the silicon film 32a so that the addition state of impurities is different from that of the silicon film 33a.

By using amorphous silicon doped with oxygen, it is possible to suppress the growth of polycrystalline grains of the silicon film 32a when forming the thick oxide film 22b as the field oxide film. If oxygen is doped, the silicon nitride mask 4a
The oxidation rate of the silicon film 32a from the lower part of the end of the is increased, and the difference in the oxidation rate from the nitrogen-doped silicon film 33a becomes larger than that in the above-described embodiment.
Therefore, according to this embodiment, the thick oxide film 22b is formed.
It is possible to further moderate the inclination of the cross-sectional shape while suppressing the occurrence of irregularities at the boundary portion of the.

By the way, in the above Examples 4 to 7,
Although amorphous silicon is used for the silicon layer as the buffer layer, the same effect can be obtained by using microcrystalline polysilicon. In the low pressure CVD method, by setting the deposition temperature to about 500 ° C., amorphous silicon can be deposited and formed on the silicon oxide layer.
Here, the deposition temperature is set to 650 ° C., and Si is used as a source gas.
If H ₄ or Si ₂ H ₆ is used and ammonia gas is also introduced to dope nitrogen as an impurity, microcrystalline polysilicon doped with nitrogen can be deposited and formed.

In the fourth to seventh embodiments, one silicon layer is doped with one impurity.
The present invention is not limited to this, and two or more impurities may be doped. For example, if amorphous silicon doped with oxygen and nitrogen is used as the silicon layer, the oxidation rate is slightly increased, and in addition,
It is possible to further suppress the growth of crystal grains.

Here, in the case of only oxygen doping, if the oxidation rate is not raised so much, this means to reduce the doping amount, and the growth of crystal grains cannot be suppressed so much. On the other hand, if the growth of crystal grains is further suppressed, this will increase the doping amount of oxygen,
The oxidation rate becomes too fast. However, as described above, if not only oxygen but also nitrogen and carbon are doped at the same time, the oxidation rate will not be too fast. That is, by doping the silicon layer with an impurity that increases the oxidation rate and an impurity that decreases the oxidation rate, it becomes possible to accurately control the state of oxidation from the end of the silicon layer during selective oxidation. The cross-sectional shape of the oxide film can be controlled more finely.

[0079]

As described above, according to the present invention, when a local oxide region (field oxide film) is formed by the LOCOS method, silicon is formed on a thin oxide film (pad oxide film) on a semiconductor substrate. The layer is made of microcrystalline polysilicon or amorphous silicon doped with impurities such as nitrogen, carbon, or oxygen. Therefore, the field oxide film area (element isolation region)
The boundary (bird's beak edge) is not uneven, and voids can be suppressed. In addition, the cross-sectional shape of the field oxide film can be controlled by forming the silicon layer into a multi-layer structure in which impurities are added in different states.

Similarly, since the amount of impurities added to the silicon layer is changed in the film thickness direction, there is an effect that the cross-sectional shape of the field oxide film can be controlled. And since I tried to add two or more impurities in combination,
It is possible to delicately control the oxidation rate from the edge of the silicon layer and suppress the crystal growth. Therefore, there is an effect that the cross-sectional shape of the field oxide film can be controlled more finely.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a step for explaining a method for forming an element isolation region according to an embodiment of the present invention.

2A and 2B are a cross-sectional view and a plan view showing a process for explaining a method for forming an element isolation region, following FIG.

FIG. 3 is a cross-sectional view showing a step for explaining a method of forming an element isolation region in another embodiment of the present invention.

4A and 4B are a cross-sectional view and a plan view showing a process for explaining a method for forming an element isolation region, following FIG.

FIG. 5 is a cross-sectional view showing a step for explaining a method of forming an element isolation region in another example of the present invention.

6A and 6B are a cross-sectional view and a plan view showing a process for explaining a method for forming an element isolation region, following FIG.

FIG. 7 is a cross-sectional view showing a step for explaining a method of forming an element isolation region in another example of the present invention.

FIG. 8 is a cross-sectional view and a plan view showing a step for explaining the method for forming the element isolation region, following FIG. 7;

FIG. 9 is a cross-sectional view showing a step for explaining a method of forming an element isolation region in another example of the present invention.

FIG. 10 is a cross-sectional view and a plan view showing a step for explaining the method for forming the element isolation region, following FIG. 9;

FIG. 11 is a cross-sectional view showing a step for explaining a conventional polybuffered LOCOS method.

FIG. 12: Polybuffered LOCO following FIG. 11
9A and 9B are a cross-sectional view and a plan view showing a step for explaining the S method.

FIG. 13 is a poly-buffered LOCO following FIG.
9A and 9B are a cross-sectional view and a plan view showing a step for explaining the S method.

FIG. 14 is a cross-sectional view showing a step for explaining another conventional poly-buffered LOCOS method.

15 is a polybuffered LOCO following FIG.
9A and 9B are a cross-sectional view and a plan view showing a step for explaining the S method.

16 is a poly-buffered LOCO following FIG.
9A and 9B are a cross-sectional view and a plan view showing a step for explaining the S method.

[Explanation of symbols]

1 ... Silicon substrate, 4 ... Silicon nitride layer, 4a ... Silicon nitride mask (oxidation mask), 5 ... Resist pattern,
21 ... Thin oxide film, 22 ... Thick oxide film, 31 ... Silicon layer.

Claims (10)

[Claims] 1. A step of forming a thin oxide film on a semiconductor substrate, a step of forming a silicon layer made of silicon to which impurities for preventing crystallization of silicon are added on the thin oxide film, and the step of forming a silicon layer on the silicon layer. A step of forming an oxidation resistant film having oxidation resistance, a step of selectively removing a portion of the oxidation resistant film to form an oxidation mask made of the oxidation resistant film, and the step of using the oxidation mask as a mask. And a step of oxidizing a silicon layer and a semiconductor substrate to form an element isolation region. 2. The element isolation region forming method according to claim 1, wherein after removing at least a part of a region of the silicon layer other than under the oxidation mask, the element isolation region is formed using the oxidation mask as a mask. A method for forming an element isolation region, comprising: 3. The method for forming an element isolation region according to claim 1, wherein the impurity is added while being changed in a film thickness direction of the silicon layer. 4. The method for forming an element isolation region according to claim 1, wherein the silicon layer has a multilayer structure including at least a first silicon film and a second silicon film formed on the first silicon film, A method for forming an element isolation region, characterized in that the first and second silicon films are formed so that the added states of impurities are different. 5. The method for forming an element isolation region according to claim 4, wherein the first silicon film is made of a material having a characteristic that an oxidation rate is faster than that of the second silicon film. A method for forming a characteristic element isolation region. 6. The method for forming an element isolation region according to claim 1, wherein the silicon layer prevents crystallization of silicon, and
A method for forming an element isolation region, characterized in that an impurity that reduces the oxidation rate of silicon is added. 7. The method for forming an element isolation region according to claim 1, wherein the silicon layer includes impurities that prevent crystallization of silicon and reduce an oxidation rate of silicon, and a crystal of silicon. A method for forming an element isolation region, characterized in that the element isolation region is added in combination with an impurity that inhibits formation of silicon and increases the oxidation rate of silicon. 8. The element isolation region forming method according to claim 1, wherein the impurity contains at least one element selected from nitrogen, carbon, and oxygen. Method of forming isolation region. 9. The method for forming an element isolation region according to claim 1, wherein the silicon layer is formed by using a CVD method. 10. The method for forming an element isolation region according to claim 1, wherein the silicon layer is formed by using a sputtering method.