JPH0880030A - Power converter - Google Patents

Abstract

PURPOSE: To prevent the damage of a semiconductor element by simultaneously monitoring the states of the signals of a primary-side conduction controller and a secondary-side conduction controller for an insulator even at the time of a malfunction, interrupting the signal of the primary-side conduction controller when the malfunction is detected and stopping the control of a power converter. CONSTITUTION: An insulator 30 is tuned on in a section (a), in which a gate signal U is emitted normally, and an output from an inversion gate 23 reaches L, but an output from a gate-signal on detecting gate 20 reaches H and a malfunction mode is not detected because a primary-side gate signal is tuned on. Abnormality is generated on the secondary-side gate drive circuit side, an output from an inversion gate 33 reaches H in a section (b) in which an insulator 29 is turned on, an output from an erroneous off-mode detecting gate 21 reaches H and an erroneous off mode is detected. A malfunction signal is held by a latch gate 22, transistors 18, 19 are turned on through a malfunction detecting gate 26A and a final malfunction detecting gate 35, and the gate signals of U phase and X phase are interrupted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter used in, for example, an elevator controller.

[0002]

2. Description of the Related Art FIG. 10 shows a main circuit of a voltage type inverter used in a conventional elevator control apparatus. It has a three-phase AC power source 1, a rectifier 2 for rectifying a three-phase AC voltage of the power source 1, and a rectifier. A smoothing capacitor 3 for smoothing the output voltage of 2, an inverter 4 for converting the DC voltage smoothed by the smoothing capacitor 3 into three-phase AC power of variable voltage and variable frequency,
A three-phase induction motor 5 driven by the output power of the inverter 4 and a current detector 6 for detecting the current flowing through the smoothing capacitor 3.

The inverter 4 includes a plurality of semiconductor devices 4U which are turned on / off by a conduction control signal such as a bipolar junction transistor (BJT), a power transistor (GTR), an insulated gate bipolar transistor (IGBT), a gate turn-off thyristor (GTO). , 4X, 4V,
4Y, 4W, and 4Z are bridge-connected. In this case, the semiconductor elements 4U and 4X, 4V and 4Y, 4W and 4Z are respectively connected to the R phase, S phase and T phase of the three-phase induction motor 5 and are connected so as to form the same arm.
Each semiconductor element is on / off controlled by the conduction control device 100, for example, in the order of 4U → 4Z → 4V → 4X → 4W → 4Y, and each phase arm is switched while returning 4U-4X, 4V-4Y, 4W. The semiconductor elements of each combination of -4Z are controlled so as not to be fired at the same time.

FIG. 11 is a diagram showing an example of a conventional conduction control device 100, which includes a primary side conduction control means such as a primary side gate control device 7 (including a speed control circuit, a current control circuit and a pulse width modulation control circuit). , A secondary side conduction control means, for example, a secondary side gate drive device 11, and the primary side gate control device 7 outputs the final gate 8 for gate signal firing output by each control device (not shown) and the output of the final gate 8. A transistor driver 9 for driving the primary side of an input isolation device 13 which will be described later, a current limiting resistor 10,
It is composed of a power supply P15, and includes a speed control circuit, a current control circuit, and a pulse width modulation control (PWM control) circuit (not shown) in addition to these components.

The gate drive device 11 includes an input insulating device 13 composed of insulating means for insulating the main circuit of the primary side gate control device 7 and the semiconductor element 4U, for example, a photo coupler, and a secondary side of the input insulating device 13. A secondary-side gate signal amplifier 14 for current-amplifying a small gate signal of the output, a secondary-side DC smoothing capacitor 16 for supplying a positive or negative DC voltage to a gate for determining ON / OFF of the semiconductor element 4U, and a current limiting resistor. 12 and a gate resistor 15 that limits the current flowing to the gate of the semiconductor element 4U,
The gate signal is input in accordance with the gate command output of the gate control device 7, and is insulated and current is amplified to supply the gate current to the semiconductor element 4U. The primary side gate control device 7 and the gate drive device 11 are electrically connected by an electric wire 101.

In such a structure, when the gate signal for ignition is output from the gate control device 7 and the final gate 8 for ignition becomes "H", the transistor driver 9 is turned on and the power source P15-electric wire. A primary side current flows between 101-the primary side of the insulating device 13, the limiting resistor 12, the electric wire 101, the limiting resistor 10, the transistor driver 9 and the common terminal.

At this time, the gate signal amplification device 14 is connected from the positive side of the secondary side DC smoothing capacitor 16 of the insulation device 13.
Upper transistor inside-gate resistance 15-semiconductor element 4
Since the gate-emitter-U smoothing capacitor 16 flows into the negative side of U, the semiconductor element 4U is turned on.

[0008]

However, since the gate drive device 11 is directly connected to the main circuit of the inverter 4, the semiconductor element 4 which constitutes the inverter 4 is formed.
U, 4X, 4V, 4Y, 4W, 4Z, especially the primary side due to a malfunction of the input insulation device 13 due to dv / dt when the high speed switching element IGBT switches, or a malfunction of the secondary side gate signal amplification device 14 itself. There is a case where the secondary controller malfunctions only on the secondary side irrespective of the gate signal of the gate controller 7. When the malfunction occurs, the semiconductor devices 4U, 4
There was a possibility of damaging X, 4V, 4Y, 4W, and 4Z.

In order to prevent the malfunction, the input isolation device 13
Although there is a method of using a device having a high noise resistance, there is a possibility that the secondary drive device 11 may malfunction depending on the conditions of the gate drive device 11, and high energy noise may be mixed in by external noise. In this case, it is difficult to avoid the malfunction.

The present invention has been made in order to eliminate the above-mentioned problems, and an object of the present invention is to provide a power conversion device capable of preventing short-circuit damage or heat damage of a semiconductor element.

[0011]

In order to achieve the above object, the invention corresponding to claim 1 (corresponding to the embodiment shown in FIGS. 1 and 2) is a semiconductor device (4U, 4V, 4W, 4).
(X, 4Y, 4Z) two or more arms connected in series are connected in parallel, and the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. Power converter that outputs AC power or DC power from a point, a primary-side conduction control device (7) that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and the primary-side conduction An insulating device (13A, 13B) that electrically insulates between a control device (7) and a conduction control terminal of the semiconductor element, and the semiconductor according to the control command signal output from the primary side conduction control device through the insulating device. Secondary side conduction control device (11) for outputting as a conduction control signal for conducting an element
And a primary side detector (2 for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input terminals of the respective arms.
0, 27) and a first secondary side insulation detection device (3) for detecting that a conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device.
0) and a second secondary side insulation detection device (29) for detecting that a non-conduction control signal is given to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device.
And if the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is detected that the state is an erroneous off mode. If the false off mode detection device (21) and the first secondary side insulation device detect the conduction control signal while the primary side detector is detecting the non-conduction control signal, the state is the false on mode. A false on-mode detection device (24) for detecting that the output is false, and a holding device that holds the output when the false off-mode detection device detects the false off-mode or the false on-mode detection device (erroneous on-mode). 22,
25) and a semiconductor device which is provided on the primary side control device side and shuts off both conduction control signals of the semiconductor devices serially connected to the arm of the power converter when each holding device holds a malfunction. Continuity signal interruption device (18, 1
9), a dead time detection device (28) for detecting a non-conduction period during which the semiconductor elements connected in series to the arm of the power converter are both non-conduction, and the dead time detection device detects the non-conduction period. In this case, the power converter is provided with a releasing device (26A, 26B, 35) for releasing the holding device that has stored the malfunction due to the output of the dead time detecting device.

In order to achieve the above object, the invention (corresponding to the embodiment of FIGS. 3 and 4) according to claim 2 has two semiconductor elements (4U, 4V, 4W, 4X, 4Y, 4Z).
At least two arms connected in series are connected in parallel, and by alternatingly conducting the semiconductor elements of the same arm, AC power or DC power is supplied from the midpoint where the semiconductor elements of each arm are connected. A power converter for outputting, a primary side conduction control device (7) for outputting a control command signal for conducting a semiconductor element of the same arm of the power converter, and conduction between the primary side conduction control device and the semiconductor element. Isolation device that electrically insulates between control terminals (1
3), a secondary side conduction control device (11) for outputting as a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulating device, and each of the arms. A primary side detector (20, 27) for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input terminals, and the secondary side conduction control device. First secondary side insulation detecting device (30) for detecting that a conduction control signal is applied to the semiconductor elements respectively connected to the input terminals, and respectively connected to the input terminals of the secondary side conduction control device. A second secondary side insulation detection device (29) for detecting that a non-conduction control signal is given to the semiconductor device, and the primary side detector detects a conduction control command signal. When said second secondary side insulation detecting device detects the non-conduction control signal, the off-mode detector erroneously detects that the status is off mode erroneous (21)
If the first secondary side insulation device detects the conduction control signal while the primary side detector is detecting the non-conduction control signal, it is detected that the state is an erroneous ON mode. When the mode detecting device (24) and the false on mode detecting device or the false off mode detecting device operate,
A disconnecting device (18A-) that turns off and disconnects the conduction control signals of the primary side conduction control device of the malfunctioning phase together.
18F) and the output of the false on-mode detector or the false off-mode detector to a power converter control command device (44) that controls all of the power converters of the primary side conduction control device. It is an electric power converter provided with the electric power converter control device stop device which stops a control device itself.

In order to achieve the above object, the invention according to claim 3 (the invention corresponding to the embodiment of FIG. 5) is such that two semiconductor elements (4U, 4V, 4W, 4X, 4Y, 4Z) are connected in series. Power for connecting at least two connected arms in parallel and outputting alternating-current power or direct-current power from the midpoint where the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. A converter, a primary side conduction control device (7) for outputting a control command signal for conducting a semiconductor element of the same arm of the power converter, and between the primary side conduction control device and the conduction control terminal of the semiconductor element. Isolation device for electrical insulation of electricity (13)
A secondary side conduction control device (11) for outputting as a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through this insulating device; and an input terminal of each arm. Primary side detectors (20, 27) for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input side of the secondary side conduction control device. A first secondary side insulation detecting device (30) for detecting that a conduction control signal is applied to each of the semiconductor elements connected to each of the semiconductor elements and an input terminal of the secondary side conduction control device. A second secondary side insulation detecting device (29) for detecting that a non-conduction control signal is given to the semiconductor element, and a second side insulation detecting device (29) for detecting the conduction control command signal when the primary side detector detects the conduction control command signal. When the second secondary side insulation detecting device detects the non-conduction control signal, the erroneous off mode detecting device (21) for detecting that the state is the erroneous off mode and the primary side detector are non-conducting controlled. An erroneous ON mode detection device (24) for detecting that the state is the erroneous ON mode when the first secondary side insulation device detects the conduction control signal while detecting the signal; When the mode detection device operates and enters the short-circuit mode, a comparator (50) that compares the direct current detecting the current flowing in the DC main circuit with the short-circuit current operation reference, and the short-circuit current operation by the comparator (50) When the reference is larger than the detected DC current, the stop mode of the power converter is released so that the power converter can be controlled again, and conversely, the short-circuit current operation reference is detected by the comparator by the DC power detected by the comparator. If less than determines that the short-circuit current flows, the control device of the power converter to remain in the stop mode, restarting so as not to power converter control operation restart determiner (51, 53,
54, 56, 55).

In order to achieve the above object, the invention according to claim 4 (the invention corresponding to the embodiment of FIG. 7) is that two semiconductor elements (4U, 4V, 4W, 4X, 4Y, 4Z) are connected in series. Power for connecting at least two connected arms in parallel and outputting alternating-current power or direct-current power from the midpoint where the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. A converter, a primary side conduction control device (7) for outputting a control command signal for conducting a semiconductor element of the same arm of the power converter, and between the primary side conduction control device and the conduction control terminal of the semiconductor element. Isolation device for electrical insulation of electricity (13)
A secondary side conduction control device (11) for outputting as a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through this insulating device; and an input terminal of each arm. Primary side detectors (20, 27) for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input side of the secondary side conduction control device. A first secondary side insulation detecting device (30) for detecting that a conduction control signal is applied to each of the semiconductor elements connected to each of the semiconductor elements and an input terminal of the secondary side conduction control device. A second secondary side insulation detection device (29) for detecting that a non-conduction control signal is applied to the semiconductor element, and a semiconductor element connected in series to the arm of the power converter. Dead time detection device (28) for detecting a non-conduction period during which the semiconductor device is provided with a non-conduction period, and an insulation detection device (33A, 33B, 34A, 34B) for detecting a conduction signal of a semiconductor element provided on the secondary side insulation detection device side. ), A holding device (66, 67) for holding the conduction signal when the insulation detection device detects the conduction signal, and a conduction control in a short-circuit mode in which both the semiconductor elements connected to the same arm are simultaneously conducted. When a signal is output, the short circuit mode is detected, when the conduction signals of the semiconductor elements of the same arm detected by the dead time detection device are both turned off, the dead time is detected. Only the detection cycle section of the dead time detected by the time detection device, or permanently or only when the short circuit current exceeds the set value By blocking the signals of the controller device to stop the control of the power converter (68)
It is a power converter provided with.

In order to achieve the above object, the invention according to claim 5 (the invention corresponding to the embodiment of FIG. 8) is such that two semiconductor elements (4U, 4V, 4W, 4X, 4Y, 4Z) are connected in series. Power for connecting at least two connected arms in parallel and outputting alternating-current power or direct-current power from the midpoint where the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. A converter, a primary side conduction control device (7) for outputting a control command signal for conducting a semiconductor element of the same arm of the power converter, and between the primary side conduction control device and the conduction control terminal of the semiconductor element. Isolation device for electrical insulation of electricity (13)
A secondary side conduction control device (11) for outputting as a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through this insulating device; and an input terminal of each arm. Primary side detectors (20, 27) for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input side of the secondary side conduction control device. A first secondary side insulation detecting device (30) for detecting that a conduction control signal is applied to each of the semiconductor elements connected to each of the semiconductor elements and an input terminal of the secondary side conduction control device. A second secondary side insulation detecting device (29) for detecting that a non-conduction control signal is given to the semiconductor element, and a second side insulation detecting device (29) for detecting the conduction control command signal when the primary side detector detects the conduction control command signal. When the second secondary side insulation detecting device detects the non-conduction control signal, the erroneous off mode detecting device (21) for detecting that the state is the erroneous off mode and the primary side detector are non-conducting controlled. An erroneous ON mode detection device (24) for detecting that the state is the erroneous ON mode when the first secondary side insulation device detects the conduction control signal while detecting the signal; A malfunction detecting device (40) for detecting malfunction by detecting the malfunction on mode by the mode detecting device or the malfunction off mode detecting device, and a malfunction detecting device when the malfunction detecting device detects malfunction. A power conversion device comprising a malfunction detection memory device (70) for storing an output and a notification device (71) for notifying the outside when the malfunction detection signal is detected.

In order to achieve the above object, the invention according to claim 6 (the invention corresponding to the embodiment of FIG. 9) is such that two semiconductor elements (4U, 4V, 4W, 4X, 4Y, 4Z) are connected in series. Power for connecting at least two connected arms in parallel and outputting alternating-current power or direct-current power from the midpoint where the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. A converter, a primary side conduction control device (7) for outputting a control command signal for conducting a semiconductor element of the same arm of the power converter, and between the primary side conduction control device and the conduction control terminal of the semiconductor element. Isolation device for electrical insulation of electricity (13)
A secondary side conduction control device (11) for outputting as a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through this insulating device; and an input terminal of each arm. Primary side detectors (20, 27) for detecting that the control command signal is output from the primary side conduction control device to the semiconductor elements respectively connected to the input side of the secondary side conduction control device. A first secondary side insulation detecting device (30) for detecting that a conduction control signal is applied to each of the semiconductor elements connected to each of the semiconductor elements and an input terminal of the secondary side conduction control device. A second secondary side insulation detecting device (29) for detecting that a non-conduction control signal is given to the semiconductor element, and a second side insulation detecting device (29) for detecting the conduction control command signal when the primary side detector detects the conduction control command signal. When the second secondary side insulation detecting device detects the non-conduction control signal, the erroneous off mode detecting device (21) for detecting that the state is the erroneous off mode and the primary side detector are non-conducting controlled. An erroneous ON mode detection device (24) for detecting that the state is the erroneous ON mode when the first secondary side insulation device detects the conduction control signal while detecting the signal; A malfunction detecting device (38, 39, 40) for detecting malfunction by detecting the malfunction on mode by the mode detecting device or the malfunction off mode detecting device, and the malfunction detecting device detecting malfunction. , A counter (72) that counts the number of malfunction detections, a timer (73) that clears this counter, and a counter that is set before this timer clears the counter. If exceeded specified number of times, it is assumed that there is some control abnormality in its operating state, a power conversion apparatus having Setsu換Ru system protection sequence unit (74) to the protection operation mode.

In order to achieve the above object, the invention corresponding to claim 7 (the invention corresponding to the embodiment of FIG. 6) is defined in claim 1.
The power converter according to claim 6, wherein the power converter is connected to a converter (34) for rectifying the AC power of the AC power supply and an output terminal of the converter, and the DC power is 3 A power conversion device comprising an inverter (4) for converting into phase power, and capable of returning regenerative energy generated in a load connected to the inverter to the AC power supply side via the converter.

[0018]

According to the invention corresponding to claim 1, even when the erroneous ON mode or the erroneous OFF mode is caused by the malfunction of the insulation device or the secondary side conduction control device side, the insulation device and the secondary side conduction control device are connected with the primary side conduction control device. The state of the signal of the secondary side conduction control device is monitored at the same time, and when a malfunction is detected, the signal of the primary side conduction control device is cut off and the control of the power converter is stopped. It is possible to prevent damage due to electric current or heat damage due to over-switching, and also prevent deterioration of the semiconductor element, and improve the reliability of power converter control.

According to the invention according to claim 2, when the secondary conduction control malfunctions, all conduction control signals are cut off.
Since the control of the power converter is stopped, if there is a phase in which detection fails even if a malfunction occurs, such as when a control error occurs due to some disturbance factor and a malfunction is likely to occur. If any of the phases can be detected, the conduction control signal can be cut off, and the reliability as protection is further improved.

According to the invention according to claim 3, when a malfunction is detected, all the conduction control signals are cut off to stop the control of the power converter. However, the interruption method is only the secondary side conduction control device. Since the breaker of the primary side continuity control device is activated, if a malfunction occurs such that a control error occurs due to some disturbance factor and a malfunction is likely to occur Even if there is, if any phase can be detected, the conduction control signal can be cut off and the reliability as protection is further improved.

According to the fourth aspect of the present invention, a restart determination device for detecting whether a short-circuit current actually flows due to a malfunction of the secondary side conduction control device and restarting or determining a permanent failure. Since the above is provided, it is possible to prevent an expanded failure when the semiconductor element is actually damaged.

According to the invention corresponding to claim 5, when the malfunction occurs in the primary side control device or the secondary side conduction control device, 2
Only the wrong ON mode (short-circuit mode) of the drive circuit of the secondary side conduction control device and its malfunction is detected, and short circuit protection is performed. Therefore, all of the primary side conduction control device and the secondary side conduction control device are included. This is effective for malfunctioning due to false ON.

According to the invention corresponding to claim 5, when a malfunction occurs on the secondary side continuity control device side, the occurrence is stored and a notification is made to recognize that the malfunction has occurred due to a control abnormality. Therefore, even if a malfunction occurs and one-cycle control is stopped in the past, there is no way to confirm the malfunction when returning to the inverter control again in the next cycle, so there is no failure, but there is some control abnormality. In order to judge that, it is possible to confirm later that a malfunction has occurred, and this can be used as a clue for investigating abnormalities.

According to the invention according to claim 6, when an erroneous operation occurs on the secondary side conduction control device side, the number of erroneous operations is counted, and if the erroneous operation exceeds the set number of times within a certain fixed period, the operating state Decides that there is some kind of control abnormality and protects the power converter, so if it is only within one cycle switching period of one day, if it can be protected only during that period, it will not cause service deterioration, but how many times If the operation is repeated, the control system becomes difficult to follow due to the malfunction and the stability deteriorates, and it is possible to prevent the semiconductor element from being damaged even if the malfunction is repeated many times.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. Here, differences from the conventional example of FIGS. 10 and 11 will be mainly described, and the same portions as those of FIGS. The reference numerals are given and the description thereof is omitted. Less than,
Embodiments of the present invention will be described with reference to the drawings.

<First Embodiment> FIG. 1 is a schematic block diagram for explaining the first embodiment of the present invention. Devices denoted by reference characters A and B in the drawing are described in FIG. The same as the above, the symbol A indicates a U-phase device, and the symbol B indicates an X-phase device. Further, an X-phase secondary side gate drive device (U-phase secondary side gate signal amplifying device 14A, secondary side gate resistor 15A, secondary side gate signal erroneous off mode detection insulating device 29, secondary side gate signal). False ON-mode detection insulating device 30, pull-up resistors 31, 32, inverting gates 33, 34, and primary side malfunction mode detection circuit (U-phase gate signal ON detection gate 20, inverting gate 23, erroneous OFF mode detection gate 21, false ON mode detection gate 2
4. The erroneous off mode detection latch gate 22 and the erroneous on mode detection latch gate 25) are omitted, but they are exactly the same as the U-phase circuit.

The U- and X-phase primary side gate signal cutoff transistors 18 and 19 are turned on when an erroneous on mode or an erroneous off mode is detected. U-phase gate signal ON detection gate 20
Outputs "H" when the gate signal generated by the primary side gate control device 7 is turned on. The X-phase gate signal ON detection gate 27 outputs "H" when the gate signal generated by the primary side gate control device 7 is turned on.

When the semiconductor device 4U is turned off, the secondary side gate signal erroneous off mode detection insulating device 29 is turned on when a current flows in the gate direction from the emitter. The insulating device 30 for detecting the secondary gate signal erroneous ON mode is the semiconductor element 4
When U is turned on, it is turned on when a current flows from the gate toward the emitter. In addition, pull-up resistors 31, 32
It has.

The inverting gate 33 outputs "H" when the insulating device 29 is turned on. The inverting gate 34 outputs "H" when the insulating device 30 is turned on. The inverting gate 23 inverts the output of the inverting gate 34. The false OFF mode detection gate 21 outputs "H" when the U-phase signal is ON and the output of the gate signal ON detection gate 20 is "H", and when the insulating device 29 is turned ON.

The false off mode detection latch gate 22 latches the signal when the output of the false off mode detection gate 21 detects "H". False ON mode detection gate 24 is U
When the phase signal is off and the gate output of the gate signal on detection gate 20 is "L", when the insulation device 30 is on "H"
Is output.

The false on-mode detection latch gate 25 latches the signal when the output of the false on-mode detection gate 24 detects "H". U-phase malfunction detection gate 26A is U
When the erroneous off mode detection latch gate 22 or the erroneous operation on mode detection gate 25 operates in phase, "H" is output. The X-phase malfunction detection gate 26B performs the same operation as the U-phase malfunction detection gate 26A.

The X-phase primary-side malfunction detection device 36 has the same structure as the gate circuit composed of U-phase 20, 23, 21, 24, 22, and 25. The U- and X-phase final malfunction detection gate 35 outputs "H" when a malfunction is detected from one of the malfunction detection gates 26A and 26B.
The dead time detection gate 28 outputs "H" while the U-phase and X-phase gate signals U and X are both off.

The operation of the first embodiment thus constructed will be described below with reference to the timing chart shown in FIG. First, in the section (a) in FIG. 2 in which the gate signal U is normally output, the insulating device 30 is turned on and the output of the inverting gate 23 becomes “L”. The output of the gate 20 becomes "H" and the malfunction mode is not detected.

Next, the output of the inversion gate 33 becomes "H" and the output of the erroneous off mode detection gate 21 during the period when the abnormality occurs on the secondary side gate drive circuit side and the insulating device 29 is turned on. Becomes "H", and an erroneous off mode is detected. After that, the latch gate 22 holds the malfunction signal, turns on the transistors 18 and 19 through the malfunction detection gate 26A and the final malfunction detection gate 35, and shuts off the U-phase and X-phase gate signals. In the dead time period in which both the U and X phases are turned off, the output of the dead time detection gate 28 becomes "H", and the malfunction signal previously latched by the latch gate 22 is released and the normal operation is restored.

In addition, during the periods C and D in FIG. 2, the erroneous ON mode is detected by the same operation as above. Similarly, when a similar malfunction occurs in the X phase, the U and X phase gate signals can be cut off through the malfunction detection gate 26B and the final malfunction detection gate 35.

According to the first embodiment, the signal isolator or 2
Even if the malfunction occurs in the secondary side gate control device, the status of the primary side gate signal and the secondary side gate signal of the insulation device is monitored at the same time, and the malfunction is detected even when the mode is in the false on mode or the false off mode. Immediately cut off the primary side gate signal to stop the inverter control, for example, it is possible to prevent damage to the semiconductor element 4U due to a short-circuit current or thermal damage due to over-switching, and prevent deterioration of the semiconductor element 4U. The reliability of can be improved.

<Second Embodiment> FIG. 3 is a view showing the schematic arrangement of a second embodiment of the present invention, which is U-X, V-Y, W.
-Z phase In any of the phases, when the gate drive device malfunctions, all the gates are cut off, and the inverter control is stopped.

Devices having suffixes A to F in FIG. 3 have been described in FIGS. The difference from the embodiment of FIG. 1 is the addition of the configuration described below. W and Z phase final malfunction detection gate 37 and the secondary side drive circuit 3 shown in the embodiment of FIG.
8 shows the entire circuit including the secondary side malfunction detection circuit and the primary side malfunction detection circuit in the U phase of the block diagram, and the detailed circuit is exactly the same as FIG. Similarly, V phase 2
Secondary drive circuit 39 and Z-phase secondary drive circuit 4
0 is provided.

The inverter control stop detection gate 41 is U-
When a malfunction is detected in any of the X-phase, V-Y phase and W-Z phase, an inverter control stop command is output. The inverter control command gate 42 is the inverter control stop detection gate 4
1 and the inverter control command signal (a) are input,
When the inverter control command gate 42 does not detect a malfunction (when "H" is output), it issues a normal inverter control command, and when a malfunction of the inverter control command gate 42 is detected ("L").
At the time of output), the inverter control is stopped.

The inverter control command device 44 creates a signal for firing a semiconductor element, such as 34U, which constitutes an inverter, through a speed control circuit, a current control circuit, a voltage control circuit, and a PWM control circuit (not shown). The gate drive device 45 receives the inverter control semiconductor device firing signal from the inverter control command control device 44 and drives the semiconductor device connected to the main circuit.

The feature of the embodiment of FIG. 3 is that when a malfunction is detected on the side of the gate drive device 45, the malfunction mode is detected by the inverter control stop detection gate 41 and the output is sent to the inverter control command device 44, and the inverter control command device 44 is operated. The inverter control is stopped by stopping the inverter control and cutting off all the gates on the control command device 44 side.

In the embodiment of FIG. 3, U-X, V-Y, W,
When any one of the Z phases detects a malfunction, by shutting off the gates of all the phases, a control error occurs due to some disturbance factor, and a malfunction easily occurs.
Even if a malfunction occurs, even if there is a phase that has failed to be detected, if any phase can be detected, the gate can be shut off, and the reliability as protection is further improved.

<Third Embodiment> FIG. 4 is a schematic block diagram showing only a part of the third embodiment of the present invention. As with the embodiment of FIG. 3, all gates are cut off when a malfunction is detected. Although the inverter control is stopped, the method of shutting off is only on the side of the gate drive device 45, and is performed by turning on the gate shut-off transistors 18A to 18F.

In the embodiment of FIG. 4, U-X, V-Y, W-
When any one of the Z phases detects a malfunction, by shutting off the gates of all the phases, a control error occurs due to some disturbance factor, and a malfunction easily occurs.
Even if an erroneous operation occurs, even if there is a phase that has failed to be detected, if any phase can be detected, the gate can be shut off and the reliability as protection further improves.

<Fourth Embodiment> FIG. 5 is a schematic structural view showing a fourth embodiment of the present invention.
5 shows a restart determination circuit for detecting whether a short-circuit current actually flows due to the malfunction of 5 and restarting or determining a permanent failure. The output signal IDC in FIG. 5 is the detection signal of the DC current detector 6 described in FIG. The short-circuit current operation reference setting volume 47 sets a reference at which the semiconductor element is damaged by the short-circuit current. In addition to this, limiting resistor 4
6, input resistors 48 and 49, a comparator 50, and inverting gates 51, 52 and 56. The comparator 50 compares the reference voltage set by the volume 47 with the voltage of the IDC, and outputs a signal of "L" when the IDC is high.

The inverter control command cutoff gate 41 is the same as that described in FIG. 3, the primary side gate control circuit malfunctions in the permanent failure detection gate 53, and the output of the comparator 50 is "L". It becomes "H" at the time of output. The latch gate 54 outputs “H” from the permanent failure detection gate 53,
When the permanent failure mode is entered, the output signal is latched.
The inverter control continuation determination gate 55 determines whether the inverter control is continued or a permanent failure occurs.

Next, the operation of the fourth embodiment constructed as described above will be explained. That is, the current detector 6 detects that a short-circuit current has flown, and when the comparator 50 operates, it is determined that the semiconductor element, for example, 4U may have been damaged due to the fact that the short-circuit current has actually flowed, and the gate is further gated. When the drive device 45 detects a malfunction, the permanent failure detection gate 53
Becomes "H" and the latch gate 54 latches the permanent failure mode. Further, the gate 55 determines whether to stop the inverter control, and the gate 42 issues an inverter control stop command. At this time, because of a permanent failure, to recover (b)
It is necessary to reset the system more to clear the latch.

If the gate drive device side 45 detects a malfunction but the comparator 50 side does not detect that a short-circuit current is flowing, the latch gate 54 does not detect a permanent failure, and inverter control is continued. To be done. However, the gate drive device 45 detects the malfunction mode until the next dead time period, and the gate 42 instructs the gate to be shut off. As a result, in addition to the effects similar to those of the second embodiment described above, it is possible to prevent an expanded failure when the semiconductor element is actually damaged.

<Fifth Embodiment> FIG. 6 shows a configuration of a converter control device using a semiconductor switching element as a converter device. Reference numeral 34 in FIG. 6 is a converter device. The same as in the inverter control, the DC mains is used when boosting the three-phase AC power supply to a voltage higher than the rectified DC voltage and when performing the regenerative control for returning the regenerative energy of the three-phase induction motor 5 to the three-phase AC power supply. Since the semiconductor elements connected in series in the circuit are alternately switching-controlled, the short-circuit protection device according to the present invention due to the malfunction of the secondary side gate control circuit can be applied to this converter control device.

<Sixth Embodiment> FIG. 7 is a circuit diagram showing a sixth embodiment of the present invention.
When a malfunction occurs on the secondary side, only the erroneous ON mode (short-circuit mode) of the secondary-side drive circuit and its malfunction is detected, and short-circuit protection is performed.

In FIG. 7, the device names shown in FIG. 1 are omitted. The devices with suffixes A and B are U-phase and X-phase devices, respectively. The U-phase ON signal detection latch gate 66 latches when an ON signal is output on the secondary side of the U-phase gate drive device. The X-phase ON signal detection latch gate 67 latches when an ON signal is output on the secondary side of the X-phase gate drive device. U-
The X-phase short-circuit mode detection gate 68 includes the latch gate 66,
When both 67's detect the ON signal and output the latch signal, the U-X phase detects that it is in the short-circuit mode and outputs the gate cutoff command. This configuration is V-Y phase, W-
The same applies to the Z phase.

In operation, when an ON command is output from the secondary side gate drive circuit that directly drives the semiconductor elements 4U and 4X, the insulating device 30A in the U phase and the insulating device 30 in the X phase.
B operates and outputs an ON signal. Upon receiving this ON signal, the ON signal detection latch gates for the U phase and the X phase respectively latch and when both ON signals are detected during the switching period of one cycle, the U-X phase short circuit mode detection gate 68 becomes "H". Thus, the transistors 18A and 18B are turned on and the gates of the U and X phases are cut off. Also, the gates 20, 27,
28, a dead time period is detected, and the ON signals of the gates 66 and 67 are unlatched during the dead time period.
In FIG. 7, the gate cutoff method is the U-X phase and one phase only, and the gate cutoff restoration method is the release at the timing of the dead time, but the release and restoration methods described in the second and third embodiments may be considered separately. .

As an effect of the embodiment of FIG. 7, it is natural that the secondary side gate drive circuit of the gate drive device at the final stage of the semiconductor element detects the short-circuit mode.
It is effective against all malfunctions including the secondary side gate drive circuit and the secondary side gate drive circuit against erroneous turn-on, and the short circuit mode can be detected only by this circuit.

<Seventh Embodiment> FIG. 8 is a schematic block diagram showing a seventh embodiment of the present invention. When a malfunction occurs on the secondary side gate drive device side, the occurrence thereof is memorized. , An alarm is issued to recognize that a malfunction has occurred due to a control abnormality.

The elevator system controller 69 controls overall elevator control including microcomputer control. The malfunction detection memory device 70 is held by software or hardware. When a malfunction occurs, the alarm reporting device 71
The sound or the like is used to externally recognize that the malfunction mode has occurred.

As the operation of the embodiment having such a configuration, when the drive device 45 detects a malfunction mode and the inverter control stop detection gate 41 outputs "L", the elevator system control device 69 malfunctions. Or the alarm is issued by the alarm issuing device 71 to sensuously recognize the malfunction mode.

The effect is that even if a malfunction occurs and the one-cycle control is stopped, there is no method for confirming the malfunction when returning to the inverter control again in the next cycle, so no failure occurs, but it is judged that there is some control abnormality. Therefore, it is possible to confirm that a malfunction has occurred later and use it as a clue for investigating abnormalities.

<Eighth Embodiment> FIG. 9 is a schematic block diagram showing an eighth embodiment of the present invention. When an erroneous operation occurs on the secondary side gate drive device side, the number of times of the erroneous operation is counted to a certain level. If a malfunction occurs more than a set number of times in a period, it is judged that the operating state has some kind of control abnormality, the elevator system is protected, and the elevator is stopped.

The counter 72 counts the number of times the malfunction mode is detected, and the timer 73 sets the continuous detection time in order to determine that the operating state is abnormal when malfunctions occur continuously. . The system protection sequence device 74 performs system protection to stop the elevator by determining that there is some control abnormality when the malfunction occurs continuously within the set time of the timer 73 and the counter 72 exceeds the set number of times.

As the operation of the embodiment having the above-mentioned configuration, the counter 72 is reset when the set malfunction detection time elapses as set by the timer 73. If the gate drive device 45 detects a continuous malfunction, the control error is judged and the system is protected when the preset number of times of the counter 72 is exceeded within the reset period of the timer 73.

As an effect, if it is only within one cycle switching period of one day, it is not necessary to reduce the service if it is protected only during that period, but if it is repeated many times,
Due to the malfunction, the control system becomes difficult to follow and the stability is deteriorated, and if the malfunction is repeated many times, the device is also damaged. Therefore, when a malfunction repeatedly occurs, it is possible to improve the reliability of the system protection by taking measures such as temporarily stopping the elevator and returning it again due to system protection or causing a permanent failure.

<Modification> In the above-described embodiment, an inverter composed of an IGBT is taken as an example of a power converter, and a gate drive circuit composed of a primary side conduction control device 7 and a gate drive device 11 including a photo coupler is used. However, the present invention is not limited to this, and may be any power converter having an arm in which semiconductor elements that turn on / off a conduction control signal are connected in series, and a conduction control device (gate drive circuit, base drive circuit) for this power converter. Also, any known circuit may be used. Further, the invention is not limited to the elevator, and may be applied to a power converter applied to an electric vehicle or a general-purpose power converter.

[0063]

According to the present invention, damage due to a short-circuit current due to a short-circuit mode and heat damage due to over-switching can be prevented and deterioration of a semiconductor element can be prevented. Since the load of the converter is not stopped, the service can be improved and a highly reliable power conversion device can be provided.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing only a main part of a first embodiment of a power converter according to the present invention.

2 is an operation timing chart in the embodiment of FIG.

FIG. 3 is a circuit diagram showing only a main part of a second embodiment of the power conversion device of the present invention.

FIG. 4 is a circuit diagram showing a main part of a third embodiment of the power conversion device of the invention.

FIG. 5 is a main circuit diagram showing only a main part of a fourth embodiment of the power converter of the present invention.

FIG. 6 is a main circuit diagram showing only a main part of a fifth embodiment of the power converter of the present invention.

FIG. 7 is a circuit diagram showing only a main part of a sixth embodiment of the power converter of the present invention.

FIG. 8 is a circuit diagram showing only a main part of a seventh embodiment of the power converter of the present invention.

FIG. 9 is a circuit diagram showing only an essential part of an eighth embodiment of the power converter of the present invention.

FIG. 10 is a diagram showing a main circuit configuration of a power conversion device used in a conventional elevator control device.

11 is a circuit diagram of the conventional gate drive device of FIG.

[Description of Reference Signs] 12A, 12B ... U, X-phase primary side current limiting resistor, 14
A, 14B ... U, X phase secondary side gate signal amplifier, 13
A, 13B ... U, X phase input insulation device, 15A, 15B ...
U, X-phase secondary side gate resistance, 16A, 16B ... U, X-phase IGBT, 18, 19 ... U, X-phase gate signal cut-off transistor, 20, 27 ... U, X-phase gate signal ON detection gate, 21 ... False off mode detection gate, 22 ... False off mode detection latch gate, 23, 33, 34 ... Inversion gate, 24 ... False on mode detection gate, 25 ... False on mode detection latch gate, 26A, 26B ... U, X phase malfunction Detection gate, 28 ... Dead time detection gate, 36 ... X
Phase malfunction detection device, 35 ... U, X phase final malfunction detection gate, 29 ... Secondary side gate signal false off mode detection insulating device, 30 ... Secondary side gate signal false on mode detection insulating device, 31, 32 ... Pull-up resistance.

Claims (7)

[Claims] 1. At least two arms in which two semiconductor elements are connected in series are connected in parallel, and the semiconductor elements in each arm are connected by alternately conducting the semiconductor elements in the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. If the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is erroneous to detect that the state is an erroneous off mode. An off mode detection device, and when the first secondary side insulation device detects a conduction control signal while the primary side detector is detecting the non-conduction control signal, the state is an erroneous on mode. False ON mode detection A device, a holding device that holds each output of the false off mode detection device when the false off mode or the false on mode detection device detects the false on mode, and is provided on the primary side control device side. A semiconductor device conduction signal interrupting device that interrupts both conduction control signals of the semiconductor devices connected in series to the arm of the power converter when the holding device holds a malfunction, and connected in series to the arm of the power converter Dead time detection device for detecting a non-conduction period in which both the semiconductor elements are non-conducting, and the holding device for saving malfunction by the output of the dead time detection device when the dead time detection device detects the non-conduction period A power conversion device including a releasing device that releases the power. 2. An arm in which at least two semiconductor elements are connected in series are connected in parallel, and the semiconductor elements in each arm are connected by alternately conducting the semiconductor elements in the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. If the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is erroneous to detect that the state is an erroneous off mode. An off mode detection device, and when the first secondary side insulation device detects a conduction control signal while the primary side detector is detecting the non-conduction control signal, the state is an erroneous on mode. False ON mode detection A device, and when this false on-mode detection device or the false off-mode detection device operates, a disconnection device that turns off the conduction control signals of the primary side conduction control device of the malfunctioning phase up and down together, A power converter that stops the power converter control device itself by inputting the output of the on-mode detection device or the erroneous off-mode detection device to the power converter control command device that controls all the power converters of the primary side conduction control device. A power converter including a controller stop device. 3. An arm in which at least two semiconductor elements are connected in series are connected in parallel, and the semiconductor elements in each arm are connected by alternately conducting the semiconductor elements in the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. If the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is erroneous to detect that the state is an erroneous off mode. An off mode detection device, and when the first secondary side insulation device detects a conduction control signal while the primary side detector is detecting the non-conduction control signal, the state is an erroneous on mode. False ON mode detection The device, when this erroneous on-mode detection device operates and enters the short-circuit mode, a comparator that compares the direct current that has detected the current flowing in the direct current main circuit with the short-circuit current operation reference, and this comparator When the short-circuit current operation reference is larger than the detected DC current, the stop mode of the power converter is released so that the power converter can be controlled again, and conversely, the short-circuit current operation reference is set by the comparator. If it is smaller than the detected DC current, it is determined that a short-circuit current is flowing, the control device of the power converter is kept in the stop mode, and the power converter control operation restart determination device that does not restart is provided. Power converter equipped. 4. An arm in which at least two semiconductor elements are connected in series are connected in parallel, and the semiconductor elements in each arm are connected by alternately conducting the semiconductor elements in the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. A dead time detection device for detecting a non-conduction period during which the semiconductor elements connected in series to the arm of the power converter become non-conduction, and a conduction signal of the semiconductor element provided on the secondary side insulation detection device side. An insulation detection device for detecting, a holding device for holding the conduction signal when the insulation detection device detects a conduction signal, and a short-circuit mode in which both the semiconductor elements connected to the same arm are simultaneously conducted. When this conduction mode control signal is output and this short circuit mode is detected, when both conduction signals of the semiconductor elements of the same arm detected by the dead time detection device are turned off , The power is supplied by shutting off the signal of the primary side semiconductor element conduction control device only in the dead time detection cycle section detected by the dead time detection device or only when the short-circuit current is permanently or exceeds the set value. A power conversion device comprising: a converter for controlling the converter and a power converter control stop device. 5. At least two arms each having two semiconductor elements connected in series are connected in parallel, and the semiconductor elements of each arm are connected by alternately conducting the semiconductor elements of the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. If the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is erroneous to detect that the state is an erroneous off mode. An off mode detection device, and if the first secondary side insulation device detects a conduction control signal while the primary side detector is detecting a non-conduction control signal, the state is an erroneous on mode. False ON mode detection A device, a malfunction detection device that detects malfunction by detecting this malfunctioning ON mode detection device or malfunctioning off mode detection device, and malfunctioning device when this malfunction detection device detects malfunctioning malfunction. A power conversion device comprising: a malfunction detection memory device that stores the output of the detection device; and a notification device that notifies the outside when the malfunction detection signal is detected. 6. At least two arms in which two semiconductor elements are connected in series are connected in parallel, and the semiconductor elements in each arm are connected by alternately conducting the semiconductor elements in the same arm. A power converter that outputs AC power or DC power from a midpoint, a primary-side conduction control device that outputs a control command signal for conducting a semiconductor element in the same arm of the power converter, and this primary-side conduction control device And an insulation device for electrically insulating between the conduction control terminals of the semiconductor element, and a conduction control signal for conducting the semiconductor element according to the control command signal output from the primary side conduction control device through the insulation device. The secondary side conduction control device and the semiconductor element connected to the input terminals of the respective arms are controlled by the primary side conduction control device. A primary side detector that detects that a command signal has been output, and a first detector that detects that a conduction control signal has been applied to semiconductor elements that are respectively connected to the input terminals of the secondary side conduction control device. A secondary side insulation detecting device; and a second secondary side insulation detecting device for detecting that a non-conduction control signal is applied to the semiconductor elements respectively connected to the input terminals of the secondary side conduction control device. If the second secondary side insulation detection device detects a non-conduction control signal while the primary side detector is detecting the conduction control command signal, it is erroneous to detect that the state is an erroneous off mode. An off mode detection device, and when the first secondary side insulation device detects a conduction control signal while the primary side detector is detecting the non-conduction control signal, the state is an erroneous on mode. False ON mode detection A device, a malfunction detection device that detects malfunction by detecting this malfunction-on mode by this malfunction-on mode detection device, or the malfunction-off mode detection device, and this malfunction-detection device detects malfunction. If a counter that counts the number of malfunction detections, a timer that clears this counter, and the specified number of times set by the counter before this timer clears the counter are exceeded, it is considered that there is some control abnormality in the operating state. , A power conversion device having a system protection sequencer for switching to a protection operation mode. 7. The power control device according to claim 1, wherein the power converter is connected to a converter that rectifies the AC power of an AC power supply, and an output end of the converter, A power conversion device comprising an inverter for converting the DC power into three-phase power, and capable of returning regenerative energy generated in a load connected to the inverter to the AC power supply side via the converter.