JPH08340161A - Bus on printed-wiring board - Google Patents

Abstract

PURPOSE: To reduce electromagnetic-wave radiation noise from a printed-wiring board by a method wherein via holes for connecting the layers of a bus wiring on the board are formed so as not to divide greatly internal ground and power layers. CONSTITUTION: In a bus on a multilayer printed-wiring board, via holes 5 for connecting layers of the bus on the board are formed so as not divide greatly internal ground and power layers. For example, the neighbored via holes 5 are arranged on every fifth via hole to the bus and in such a way as to leave a constant interval between them so that the internal ground and power layers are not divided. Thereby, the path 7 of a ground return current of a signal between ICs 2 and 2, which are respectively arranged on the surface and rear of the board, for example, is shortened. Accordingly, the area of a loop becomes small by the shortening of the path 7 of the ground return current of the signal and electromagnetic-wave radiation noise from the board is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to bus wiring on a printed wiring board.

[0002]

2. Description of the Related Art FIG. 4 (a) is an explanatory view of an embodiment of a conventional printed wiring board, and FIG. 4 (b) is a view showing a gap generated in an inner ground layer by a via hole in (a).

Conventionally, bus wiring on a printed wiring board is
For the purpose of designing the board with a high density, even if the wiring is made as close as possible and the via holes are connected to the opposite layer, the via holes are arranged as close as possible.

As shown in FIGS. 4 (a) and 4 (b), when the bus wirings are continuously laid at the highest density, the inner ground layer and power supply layer are largely divided by the via holes. As a result, as shown in FIG. 4B, the generated gap portion 36 forms a loop in which the return current of the ground with respect to the signal cannot be linearly returned and is greatly expanded like the current path 37. The electromagnetic radiation noise of was extremely large.

[0005]

However, in the above-mentioned conventional example, the bus width of the data bus is being expanded from 32 bits to 64 bits along with the recent increase in the speed of the CPU, and from the front surface to the back surface of the printed wiring board. If you try to connect signals using via holes, for example, if you have 64-bit bus wiring, you will need 64 through via holes, and the copper foil pattern on the entire surface of the inner ground layer or power supply layer. A gap is formed by the through via hole, and the ground pattern and the power supply pattern in the inner layer are divided by this gap.

Particularly, when the ground pattern of the inner ground layer is divided by the continuous via hole, the loop of the signal and the ground return current becomes large.
As a result, differential mode and common mode electromagnetic radiation noise from the printed wiring board increases, and there is a problem that the electromagnetic radiation noise regulations in each country such as VCCI and FCC cannot be satisfied.

Therefore, a first object of the present invention is to form a via hole for connecting the layers of the bus wiring on the printed wiring board so as not to continuously divide the inner ground layer and the power supply layer. Is to reduce electromagnetic radiation noise from the printed wiring board.

[0008]

A bus wiring on a printed wiring board according to the present invention has a via hole for connecting layers of the bus wiring on the printed wiring board in the inner layer in the bus wiring on the multilayer printed wiring board. It is characterized in that it is formed so as not to largely divide the ground layer and the power supply layer. The bus wiring on the printed wiring board is preferably one in which the via hole divides the inner ground layer and the power supply layer at intervals of two or more.

[0009]

In the above-mentioned structure, it is assumed that a 64-bit data bus is wired on a 4-layer board. 4 pins (0.254 mm pitch) between pins, mini via (land diameter:
With a pattern rule of 0.6 mm), when a signal is connected from the front side to the back side of the board in a bundle with 64-bit bus wiring in a bundle, these 64 via holes are used for high density of the board. If the space between the inner layer and the outer layer is close to the clearance, the inner layer has a larger clearance than the surface layer due to problems such as processing accuracy. Gaps are created.

In this configuration, when signals are connected using via holes on the front side and the back side of the board in a bundle of 64-bit bus wires, via holes are arranged every 4 bits (every 4 lines). Make sure that the inner ground and power layers are not separated. As a result, it is possible to adopt a structure in which a ground path for a signal return current is always ensured for every 4 bits of the bus.

Therefore, the current loop due to the signal current and the ground return current becomes smaller as compared with the case where the 64-bit bus is continuously arranged close to each other, and the electromagnetic radiation noise from the printed wiring board is reduced.

[0012]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 (a) is an explanatory view of an embodiment of a bus wiring on a printed wiring board according to the present invention, in which adjacent via holes are spaced by four every four intervals with respect to the bus wiring. When arranged, (b) is a diagram showing a gap generated in the inner ground layer by the via hole of (a).

FIGS. 1 (a) and 1 (b) are drawings that best show the features of the present invention, and are perspective views of a substrate showing simply 8 bus lines out of 64 bus wirings as an example. is there. In FIG. 1A, an IC1 for outputting a signal arranged on the front surface of the substrate and an I for receiving a signal arranged on the rear surface of the substrate
C2, a signal line 3 formed on the front surface of the substrate, a signal line 4 formed on the rear surface of the substrate, and a via hole 5 for connecting the signal line 3 on the front surface of the substrate and the signal line on the rear surface of the substrate are shown. In FIG. 1B, dotted lines are projection views of the ICs arranged on the front surface and the back surface of the substrate. A gap 6 is formed in the inner ground layer by the via hole 5, and an arrow 7 conceptually shows the path of the ground return current of the signal from IC1 to IC2.

As shown in FIGS. 1 (a) and 1 (b), every four bus lines are arranged at regular intervals so that adjacent via holes are not separated from each other by the inner ground layer and power supply layer. By arranging so as to leave a space, the path of the ground return current of the signal between the ICs becomes short. Therefore, the loop area due to the signal and the ground return was reduced, and the electromagnetic noise from the board was reduced.

Next, the second and third embodiments will be described.

FIG. 2 (a) is a second embodiment, and is a schematic view of wiring and via holes when two wires are arranged instead of four wires in the first embodiment. )
FIG. 3A is a diagram showing a gap, and FIG. 3A is a diagram showing wiring in a case where the third embodiment is arranged instead of the fourth arrangement in the first embodiment. FIG. 3B is a schematic view of the via hole, and FIG. 6B is a view showing the gap of FIG.

In the second and third embodiments, as shown in FIG. 2 and FIG. 3, the bus wiring in the first embodiment is provided with two lines and three lines next to each other. The through holes are arranged so as to be spaced at regular intervals so that the inner ground layer and power supply layer are not separated. In both cases, the effect of reducing electromagnetic wave radiation noise from the substrate was obtained as in the first embodiment.

[0019]

As described above, according to the present invention, the via hole for connecting the layers of the bus wiring on the printed wiring board is formed so as not to largely divide the inner ground layer and the power supply layer. There is an effect that bus wiring of the printed wiring board can be provided which can reduce electromagnetic wave radiation noise from the printed wiring board.

[Brief description of drawings]

FIG. 1A is an embodiment of a bus wiring on a printed wiring board according to the present invention, in which adjacent via holes are arranged every four bus holes with a constant interval. FIG. 3B is a diagram showing a gap generated in the inner ground layer by the via hole in FIG.

FIG. 2A is a schematic view of wirings and via holes in the case of the second embodiment, in which two wires are arranged instead of four wires in the first embodiment; Is (a)
It is a figure which shows the gap of.

FIG. 3A is a schematic view of wirings and via holes in the case where the third embodiment is arranged instead of the fourth arrangement in the first embodiment instead of the fourth arrangement; Is (a)
It is a figure which shows the gap of.

4A is an explanatory view of an example of a conventional printed wiring board, and FIG. 4B is a view showing a gap generated in an inner ground layer by the via hole in FIG. 4A.

[Explanation of symbols]

1 IC on the front side of the board 2 IC 3 on the back side of the board 3 Signal line on the back side of the board 4 Signal line on the back side of the board 5, 15, 25, 35 Via holes 6, 16, 26, 36 Gap 7, 17, 27, 37 Arrow (Signal Ground return current path)

Claims (2)

[Claims] 1. In a bus wiring on a multilayer printed wiring board, a via hole for connecting layers of the bus wiring on the printed wiring board is formed so as not to largely divide an inner ground layer and a power supply layer. Bus wiring on the printed wiring board characterized by being. 2. The bus wiring on the printed wiring board according to claim 1, wherein the via hole divides the inner ground layer and the power supply layer at intervals of two or more.