JPH08328744A - Analog/digital converter - Google Patents

Abstract

PURPOSE: To provide an analog/digital converter capable of quickly performing recovery from an abnormal state. CONSTITUTION: In this analog/digital converter composed of a conversion part 1 for converting analog signals to digital signals and a processing part 2 connected with the conversion part 1 by a communication line for fetching and processing output digital signals outputted from the conversion part 1 and transmitting control signals for controlling the conversion part 1 to the conversion part 1 in which the conversion part 1 serially transmits conversion values synchronized with clock signals by conversion request signals from the processing part 2, input is inhibited for prescribed time after receiving the prescribed number of the clock signals in the conversion part 1 and the processing part 2 transmits non-effect control signals which are the control signals without an adverse effect to the conversion part 1 to the conversion part 1 for plural times at the time of detecting the abnormality of communication.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital (A / D) converter for converting an analog signal into a digital signal, and particularly to an analog / digital (A / D) converter which is strong against noise abnormalities when communication with a microcomputer is abnormal. The present invention relates to a digital conversion device.

[0002]

2. Description of the Related Art In recent years, in electronic equipment control, for example, in the EFI system for an automobile engine shown in FIG. 4, various sensors detect the state of the engine and the running state, and the microcomputer 22 processes the information from these sensors. Thus, control is performed to drive the vehicle in an optimal state. Most of the information from these various sensors is an electrical signal, and a digital signal and an analog signal are used. When these signals are processed by the microcomputer 22, the digital signals can be directly input to the microcomputer 22 for processing, but in the case of analog signals, it is necessary to convert them into digital signals before being input to the microcomputer 2. is there.

An analog / digital converter 21 is used to convert an analog signal into a digital signal, but a plurality of types of analog signals are sequentially converted into digital signals by one analog / digital converter in order to simplify the configuration. A multi-channel type analog / digital converter for conversion is often used. Further, a communication path for transmitting data and the like is provided between the analog / digital converter 21 and the microcomputer 22, but various communication systems are adopted depending on the application, and control of the engine of the automobile is performed. Has
An SPI communication method is often used in which a communication error such as a synchronization error is unlikely to occur.

Next, an analog / digital converter using SPI communication will be described with reference to FIG. Reference numeral 21 denotes an analog / digital converter, which is connected to a plurality of (24 channels in this example) sensors and inputs analog signals from these sensors. Further, the analog / digital converter 21 is provided with a clock input terminal A1, a data input terminal A2, a data output terminal A3, and a conversion end signal output terminal A4 for communication with the microcomputer 22. Side clock output terminal B1, data output terminal B2, data input terminal B
3, connected to the external interrupt terminal B4.

A clock signal (pulse signal) serving as a synchronizing signal for data communication is input from the clock output terminal B1 to the clock input terminal A1. Further, the conversion command signal (serial signal) from the data output terminal B2 is input to the data input terminal A2, the conversion result signal (serial signal) from the data output terminal A3 is input to the data input terminal B3, and the external A signal indicating that the analog / digital conversion is completed is input to the interrupt terminal B4 from the conversion end signal output terminal A4.

Next, the conversion and communication operations will be described. FIG. 6 is a state diagram showing states of signals. In SPI communication, a clock signal is transmitted only when data is transmitted. In other words, if the microcomputer 22 outputs a clock signal, the data input terminal A2 is simultaneously transmitted.
The data communication between the data output terminal B2 and the data input terminal B3 and the data communication between the data output terminal A3 at the data input terminal B3 are performed by using the clock signal as a synchronization signal. Specifically, the level (H level: high voltage level, L level: low voltage level) of the signal on the communication line at the time of the fall of the clock signal is set as 1 bit of communication data and is transmitted.
The transmitting side sequentially switches the signal level of the communication line in synchronization with the clock signal according to the data to be sent, and the receiving side reads the signal level of the communication line at the falling edge of the clock signal and assembles it into the received data.

For example, a case of transmitting a 4-bit signal "1101" from the microcomputer 22 side to the analog / digital converter 21 side will be described with reference to FIG. Indicates a clock signal, and the microcomputer 2
The second side transmits a pulse signal that changes at a constant cycle during communication to the analog / digital converter 21 side. The number of pulses is the same as the bit length of the data to be transmitted, and is predetermined (4 pulses in this example). Also, the microcomputer 22 uses the falling edge of the clock signal (t1, t2, t
3 and t4), the signal level of the signal line “HHL” corresponding to the communication data “1101” sequentially in the data communication line
H ”(). On the analog / digital converter 1 side, when the clock signal falls (t1,
At t2, t3, t4), the signal level “HHLH” of the communication line is input, and it is determined that the corresponding data “1101” is communicated.

In this example, the case of transmitting from the microcomputer 22 side to the analog / digital converter 21 side has been described, but in the case of transmitting from the analog / digital converter 21 side to the microcomputer 22 side, the microcomputer 22 The same operation is performed in synchronization with the clock signal from. Further, since the transmission line from the microcomputer 22 side to the analog / digital converter 21 side and the transmission line from the analog / digital converter 21 side to the microcomputer 22 side are different lines, the transmission line from the microcomputer 22 In sync with the clock signal,
If each transmits and receives data, bidirectional communication is possible at the same timing.

Next, a general format of transmission data will be described. FIG. 7 shows a format of transmission data (16 bits). (A) is a format of transmission data from the microcomputer 22 side to the analog / digital converter 21 side, and (b) is an analog / digital converter 21 side. Shows the format of data transmitted from the computer to the microcomputer 22 side.
The transmission data from the microcomputer 22 side to the analog / digital converter 21 side is basically command data D1 indicating what kind of operation the analog / digital converter 21 is to perform, and which sensor (which channel). Channel data D2 that specifies whether the signal of (4) is analog-to-digital converted.

The transmission data from the analog / digital converter 21 side to the microcomputer 22 side are basically conversion result data D3 indicating the conversion result of the analog / digital conversion and a check indicating the completion of the analog / digital conversion. Code D4 and conversion terminal data D5 indicating which input terminal has the analog / digital conversion result, that is, which sensor (which channel) has the analog / digital conversion result.
Composed of and.

FIG. 8 is a diagram showing the timing of analog / digital conversion and communication. Next, the timing of analog / digital conversion and communication will be described. When the output signal data of the sensor is required, the microcomputer 22 first writes the command data D1 indicating the conversion command and the channel data D2 indicating the target sensor into the transmission register for transmitting to the analog / digital converter 21,
These data are output together with the clock signal in synchronization with the clock signal (u1). The number of pulses of the clock to be transmitted is the bit length of the data, and is the number of pulses determined in advance between the microcomputer 22 and the analog / digital converter 21.

The analog / digital converter 21 reads and decodes the command data D1 and the channel data D2 indicating the target sensor in synchronization with the input clock signal, and performs analog / digital conversion on the signal of the designated sensor. When the analog / digital conversion is completed, the analog / digital converter 21 outputs the conversion end output terminal A4.
Outputs a conversion end signal indicating that the analog / digital conversion is completed to the external interrupt terminal B4 of the microcomputer 22 and writes the conversion result in a transmission register for transmitting data to the microcomputer 22 (u
2). Upon receiving the conversion end signal, the microcomputer 22 transmits a clock signal by interrupt processing (u3). Then, since the conversion result written in the transmission register on the analog / digital converter 21 side is transmitted in synchronization with the clock signal, the conversion result is read in synchronization with the clock signal, and the analog / digital conversion is performed once. And the communication processing is completed (u4).

[0013]

However, the microcomputer 22
When noise or the like is interfered with during communication between the A / D converter 21 and the A / D converter 21, the following problems occur. As shown in FIG.
During communication of A / D conversion (from the microcomputer 22 to the A / D converter 21
When the noise is in the background during the transmission of the conversion command signal etc.) to the clock signal, the clock signal is as if the number of clocks (pulses) has increased, as shown in.

Since the signal read by the A / D converter 21 is the signal level at the falling edge of the clock signal, the signal level at the falling edge (t5) of the clock increased by noise is also read as a digital signal. Therefore, in the case of a data structure of 4 bits per unit as in this example, an abnormal 1 bit (z1) due to noise is included as data, and the last normal 1 bit (z2) is excluded from the data. Then, this removed data (z2) is taken in as the first 1 bit of the next data,
Further, the subsequent data is also the same (the abnormal data is 1 bit in this example, but it is not limited to 1 bit and may be a plurality of bits).

Therefore, once the data is corrupted due to noise, the subsequent data is also adversely affected, and the A / D converter 21 cannot normally receive the control signal sent from the microcomputer 22 and its operation is messy. As a result, the microcomputer 22 cannot obtain normal sensor output data, and engine control and the like cannot be performed properly.

As described above, in the conventional A / D converter, when a communication error occurs between the analog / digital converter and the microcomputer, the analog / digital conversion value thereafter is also affected, and for example, There is a problem that the engine cannot be properly controlled.

[0017]

In order to solve the above-mentioned problems, the present invention provides a conversion unit for converting an analog signal into a digital signal, and an output digital connected to the conversion unit via a communication line and output from the conversion unit. The conversion unit serially converts the conversion value in synchronization with the clock signal in response to the conversion request signal from the processing unit, the processing unit receiving the signal and transmitting the control signal for controlling the conversion unit to the conversion unit. In the analog-to-digital conversion device that transmits, the conversion unit is prohibited from inputting for a predetermined time after receiving a predetermined number of clock signals, and the processing unit adversely affects the conversion unit when detecting a communication abnormality. A non-influenced control signal, which is a control signal without a signal, is transmitted to the conversion unit a predetermined number of times.

Further, the non-influenced control signal is a reset signal for initializing the converter.

[0019]

With the above means, an unnecessary signal due to noise or the like held in the conversion unit when the conversion unit is abnormal is
Since it is removed by the non-influenced control signal from the processing unit, the conversion unit returns to the normal state.

[0020]

An embodiment of the present invention will be described below with reference to the drawings. In the present embodiment, the engine control device for controlling the engine of the automobile will be described as an example, but the present invention can be applied to a device using an analog / digital conversion device other than the engine control device. FIG. 1 is a configuration diagram showing a configuration of an engine control device for an automobile. Various sensors are connected to the engine control device 5, and signals from these sensors are input and processed, and various actuators are controlled to operate the engine in an appropriate state. The sensor includes a digital sensor that outputs a digital signal such as a pulse and an analog sensor that outputs an analog signal such as a voltage value.

The digital sensor includes a rotation angle sensor that outputs a TDC signal indicating the rotation angle of the engine (top dead center, etc.), a rotation speed sensor that outputs an NE signal indicating the engine rotation speed, and a wheel There is a vehicle speed sensor or the like that outputs a vehicle speed signal indicating the number of revolutions. Further, the analog type sensor detects an intake pipe sensor that detects the pressure in the intake pipe of the engine, a water temperature sensor that detects the water temperature of the radiator, an intake temperature sensor that detects the temperature of intake air, and an oxygen concentration in the exhaust gas. There are an oxygen concentration (O2) sensor, a throttle valve sensor that detects the opening of a throttle valve, and the like.

Reference numeral 3 denotes an input interface for performing a buffering operation or the like for connecting a sensor, which connects a digital sensor and a microcomputer 2, and also an analog sensor and an analog / digital converter (A / D
Converter) 1 is connected. Reference numeral 1 denotes an A / D converter, which converts an analog signal from an analog sensor input via the input interface 3 into a digital signal and outputs the digital signal to the microcomputer 2.

A microcomputer 2 inputs and processes signals from the sensor and controls actuators provided at various places of the engine to control the engine to operate in a state according to the situation. Reference numeral 4 denotes an output interface for connecting the microcomputer 2 and the actuator, which performs a buffering operation and the like. or,
The actuator includes, for example, a spark plug for igniting the engine, an injector for injecting gasoline, and a throttle valve that is provided in parallel with the throttle valve and controls the air amount when the throttle valve is closed (idle rotation) to control the idle speed. There is an idle speed control valve (ISC valve), etc., and a digital signal that changes the digital signal from the microcomputer 2 into an analog signal as needed.
Drive circuits such as an analog converter, a booster circuit for boosting a voltage, and a duty converter circuit that changes into a pulse signal having a duty value corresponding to a digital signal are provided.

Next, the details of the analog / digital conversion device using SPI communication will be described with reference to FIG.
The A / D converter 1 is connected to a plurality of (24 channels [ch] in this example) analog sensors and inputs analog signals from these sensors. Further, the A / D converter 1 is provided with a clock input terminal A1, a data input terminal A2, a data output terminal A3, and a conversion end signal output terminal A4 for communication with the microcomputer 2. Clock output terminal B1, data output terminal B
2, connected to the data input terminal B3 and the external interrupt terminal B4. The connection between these terminals should be
If the D / D converters 1 are mounted on the same printed circuit board, they are connected by the wiring pattern of the printed circuit board,
Also, if it is not mounted on the same printed circuit board,
It is connected by a flexible substrate, a conducting wire (lead wire), or the like.

A clock signal (pulse signal) which is a synchronizing signal for data communication is input to the clock input A1 from the clock output terminal B1. Further, the conversion command signal (serial signal) from the data output terminal B2 is input to the data input terminal A2, the conversion result signal (serial signal) from the data output terminal A3 is input to the data input terminal B3, and the external A signal indicating that the A / D conversion is completed is input to the interrupt terminal B4 from the conversion end signal output terminal A4.

Next, the conversion and communication operation will be described.
In SPI communication, a clock signal is transmitted only when data is transmitted. In other words, if the microcomputer 2 outputs a clock signal, data communication between the data input terminal A2 and the data output terminal B2 and data input are performed at the same time. Terminal B3
Data communication between the data output terminal A3 and the data output terminal A3 is performed by using the clock signal as a synchronization signal. Specifically, the signal level (H level: high voltage level, L level: low voltage level) of the communication line at the falling edge of the clock signal is set as 1 bit of communication data and is transmitted. According to the data to be sent, the signal level of the communication line is sequentially switched in synchronization with the clock signal, and the receiving side reads the signal level of the communication line at the falling edge of the clock signal and assembles it into the received data.

When the A / D converter 1 receives data of a predetermined bit (data length that can be received in one communication),
After that, input is prohibited for a certain period of time (input data is ignored). For example, a counter that counts the number of clocks, a gate that connects and disconnects the input data and the clock to the A / D converter 1, and a counter are predetermined. It is composed of a timer which is activated when the value is counted, resets the counter and turns off the gate for a predetermined time.

Next, the data transmission / reception process performed by the microcomputer 2 will be described. FIG. 3 is a flowchart showing a transmission / reception process performed by the microcomputer 2. This transmission / reception processing is A / D
When the conversion end signal from the converter 1 is received, it is executed by an interrupt. That is, it is performed as a process of fetching the A / D converted value. Since the data transmission method and the format of the transmission data of SPI communication are the same as the contents described in the section "Prior Art", the description thereof will be omitted.

In step S1, it is determined whether or not the operation of the A / D converter 1 is abnormal. If it is abnormal, the process proceeds to step 2, and if it is not abnormal, the process proceeds to step S5. This decision is
The channel data (A
/ D conversion target sensor) and the conversion terminal data (target sensor for A / D conversion) input during the previous transmission / reception processing. That is, if the A / D converter 1 is normal, the sensor specified by the microcomputer 2 and the A
Since the sensors selected by the / D converter 1 are the same and the channel data and the conversion terminal data match, the abnormality of the A / D converter 1 can be detected by comparing the data.

In step S2, a reset signal for initializing the A / D converter 1 is transmitted. This reset signal is transmitted, and the process proceeds to step S3. Incidentally, since the A / D converter 1 holds a part of the data for the previous transmission, the reset command is a 3-bit command D1 (shown in FIG. 6) which is an H level signal or an L level signal. It is desirable that all 16 bits of the transmission data when the D converter 1 is abnormal have the same level (H level or L level) as the reset command. Further, instead of the reset command, non-command data having no meaning may be transmitted (in this case, it is necessary to have the same data shape as the reset command). In addition, the transmission data is arbitrary data, and the operation of the A / D converter 1 and the A / D conversion are performed on the microcomputer 2 side.
The input data from the converter 1 may be ignored.

In step S3, the counter for counting the number of reset signal transmissions when the A / D converter 1 is abnormal is incremented by 1, and the process proceeds to step S4. In step S4, it is determined whether or not the count value of the counter has reached a predetermined value. If the count value has reached the predetermined value, the process ends (the counter is reset), and if it has not reached the predetermined value, the process returns to step S2. This step S
By the processing from 2 to step S4, processing for transmitting the reset signal a predetermined number of times when the A / D converter 1 is abnormal is performed.
Further, in step S5, a process for fetching a normal A / D converted value is performed, and the process ends.

By performing the above processing, A /
When the D converter 1 is abnormal, a reset signal is transmitted to the A / D converter 1 a predetermined number of times. Since the A / D converter 1 prohibits input for a predetermined time each time a reset signal is received, or more precisely, a predetermined number of bits of data is received, each reception of the reset signal adversely affects subsequent data reception. Unnecessary retained data decreases and disappears when the reset signal is received a predetermined number of times. Therefore, according to this embodiment, the A / D converter 1 can be quickly returned to the normal state.

[0033]

As described above in detail, according to the present invention, even if the operation of the conversion unit becomes abnormal due to noise or the like, the A / D conversion unit can be quickly returned to the normal state. .

[Brief description of drawings]

FIG. 1 is a configuration diagram of an engine control device.

FIG. 2 is a block diagram showing details of an A / D conversion unit.

FIG. 3 is a flowchart showing a process performed by the microcomputer 2.

FIG. 4 is a block diagram of an engine EFI system.

FIG. 5 is a block diagram showing details of an A / D conversion unit.

FIG. 6 is a state diagram showing states of signals.

FIG. 7 is a diagram showing a format of transmission data.

FIG. 8 is a diagram showing timings of A / D conversion and communication.

[Explanation of symbols]

 1 ... A / D converter 2 ... Microcomputer 3 ... Input interface 4 ... Output interface 5 ... ... Engine control devices

Claims (2)

[Claims] 1. A converter for converting an analog signal into a digital signal, and a control signal connected to the converter by a communication line for processing an output digital signal output from the converter and controlling the converter. In the analog / digital conversion device, which comprises a processing unit for transmitting to the conversion unit, the conversion unit serially transmits a conversion value in synchronization with a clock signal in response to a conversion request signal from the processing unit. , After inputting a predetermined number of clock signals, input is prohibited for a predetermined time, and the processing unit sends a non-influenced control signal to the conversion unit, which is a control signal that does not adversely affect the conversion unit when a communication abnormality is detected. An analog / digital conversion device characterized by transmitting a predetermined number of times. 2. The analog / digital conversion apparatus according to claim 1, wherein the non-influenced control signal is a reset signal for initializing the conversion unit.