JPH08317312A - Subtitle detection device - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to provide a caption detection device capable of accurately detecting caption information included in a video signal regardless of the content of the video. In a caption detection device for detecting caption information included in a video signal, a selection means for selecting one line of the video signal into a plurality of different level ranges and a plurality of level ranges selected by the selection means are provided. The comparison means for comparing the number of pixels of each belonging video signal with a predetermined threshold value and the judgment means for judging the presence or absence of caption information based on the comparison result of this comparison means are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver having a wide aspect ratio screen having an aspect ratio of 16: 9, and more particularly to a caption detecting device for detecting caption information included in an input video signal. Regarding the improvement of.

[0002]

2. Description of the Related Art As is well known, in a television receiver compatible with a wide aspect screen having a caption detection function such as the one described above, captions are added to the lower non-picture part as shown in FIG. When a letterbox type video signal is received, the vertical deflection angle is variably controlled to vertically extend the image or adjust the position in the vertical direction. The subtitle end position is enlarged and displayed.

FIG. 12 shows such a conventional television receiver. That is, the video signal supplied to the input terminal 11 is supplied to the A / D (analog / digital) conversion circuit 12 and converted into the digital video signal DY, and then, the clock generation circuit 13, the vertical synchronization processing circuit 14, and the horizontal synchronization processing circuit 14. It is supplied to the synchronization processing circuit 15, the video processing circuit 16, the letterbox video detection circuit 17, and the caption detection circuit 18, respectively.

Of these, the clock generation circuit 13 generates and outputs a clock CK having a constant cycle based on the input digital video signal DY. The clock CK output from the clock generation circuit 13 is used for the A / D conversion circuit 12, the vertical synchronization processing circuit 14, and the horizontal synchronization processing circuit 1.
5, video processing circuit 16, letterbox video detection circuit 1
7 and the subtitle detection circuit 18, the vertical deflection control circuit 19, the horizontal deflection control circuit 20 and the like are respectively supplied as operation clocks.

Further, the vertical synchronization processing circuit 14 receives the vertical synchronization signal VREF from the input digital video signal DY.
Are reproduced and output to the letterbox video detection circuit 17, the caption detection circuit 18, and the vertical deflection control circuit 19, respectively. Further, the horizontal synchronization processing circuit 15 receives the horizontal synchronization signal HREF from the input digital video signal DY.
Is reproduced and output to the letterbox video detection circuit 17, the caption detection circuit 18, and the horizontal deflection control circuit 20, respectively.

On the other hand, the video processing circuit 16 subjects the input digital video signal DY to Y / C (luminance signal / color signal) separation processing, color demodulation processing, etc., to thereby obtain a luminance signal Y and a color difference signal I. , Q, and RGB conversion circuit 21
Is output to. The RGB conversion circuit 21 converts the input luminance signal Y and color difference signals I and Q into three types of color signals R,
Converted to G and B, CRT (Ca
thode Ray Tube) 22.

Here, in the letterbox video detection circuit 17, the input digital video signal DY is a current standard television system NTSC in each cycle of the vertical synchronization signal VREF output from the vertical synchronization processing circuit 14. (Na
nationwide television system committee) system,
It is determined whether the letterbox method is used, and the letterbox determination signal LS1 indicating the determination result is output to the vertical deflection control circuit 19.

Further, this letterbox image detection circuit 1
When the input digital video signal DY is determined to be the letterbox system, 7 detects the video start position, and the horizontal synchronization processing circuit is provided between the generation position of the vertical synchronization signal VREF and the video start position. The horizontal synchronization signal HREF output from the counter 15 is counted, and the video start line signal LS2 indicating the count value is output to the vertical deflection control circuit 1
It is output to 9.

Similarly, the letterbox image detection circuit 17
When it is determined that the input digital video signal DY is of the letterbox system, the horizontal sync processing circuit 15 detects the video end position and detects the horizontal sync processing circuit 15 from the position where the vertical sync signal VREF is generated to the video end position. The output horizontal synchronizing signal HREF is counted, and the video end line signal LS3 indicating the count value is output to the vertical deflection control circuit 19.

That is, the letterbox image detection circuit 17 has a function of inputting 1 of the input digital image signal DY.
An average value for each line is calculated, and based on the calculated average value level, it is a non-image part line corresponding to the upper and lower non-image part periods or the main image part video period for each cycle of the horizontal synchronizing signal HREF. Is determined, and the correlation of the determination result for each cycle of the horizontal synchronization signal HREF is detected. This makes it possible to detect the presence of the upper and lower non-image portions, and determine whether or not the image signal is a letterbox type video signal.

Further, since the correlation of the determination result of each cycle of the horizontal synchronizing signal HREF is detected, the correlation is lost at the boundary between the upper and lower non-image areas and the main image area.
It is possible to detect the line that first loses the correlation as the image start position and the line that finally loses the correlation as the image end position. However, in a video in which a subtitle exists in the lower non-picture part, the vertical correlation is lost even between the subtitle start position and the subtitle end position, so the subtitle end position is erroneously detected as the video end position. Therefore, it is necessary to input a signal indicating the subtitle period to the letterbox video detection circuit 17 and stop the detection of the video end position during the subtitle period.

In the television receiver shown in FIG. 12,
The caption detection circuit 18 generates a caption line determination signal SS3 indicating a caption period, and the letterbox video detection circuit 17
I am trying to supply it to. That is, the caption detection circuit 18 determines from the input digital video signal DY whether or not the caption line corresponds to the caption period for each cycle of the horizontal synchronization signal HREF, and the caption line determination indicating the determination result. The signal SS3 is supplied to the letterbox image detection circuit 17.

Further, the caption detection circuit 18 detects the caption end position from the correlation of the caption line determination signal SS3 for each horizontal period, and performs horizontal synchronization between the generation position of the vertical synchronization signal VREF and the caption end position. The horizontal synchronizing signal HREF output from the processing circuit 15 is counted, and the subtitle end line signal SS2 indicating the count value is output to the vertical deflection control circuit 19. Furthermore, this subtitle detection circuit 18
Is an image end line signal LS3 and a caption end line signal SS2 output from the letterbox image detection circuit 17.
It is determined whether or not a subtitle exists in the lower non-image portion based on the above, and the subtitle determination signal SS1 indicating the determination result is output to the vertical deflection control circuit 19.

Then, the vertical deflection control circuit 19 generates a vertical deflection signal VD from the vertical synchronizing signal VREF, and C
It is output to RT22. In this case, the vertical deflection control circuit 19 performs vertical deflection according to the input image based on the letterbox determination signal LS1, the image start line signal LS2, the image end line signal LS3, the caption determination signal SS1 and the caption end line signal SS2. The signal VD is variably controlled. The horizontal deflection control circuit 20 also generates a horizontal deflection signal HD from the horizontal synchronization signal HREF, and the CRT2
It outputs to 2. Then, the CRT 22 enlarges and displays the image by the input color signals R, G, B based on the vertical deflection signal VD and the horizontal deflection signal HD.

Next, FIG. 13 shows the details of the caption detection circuit 18. The caption detection circuit 18 is composed of a caption position detection circuit (see Japanese Patent Laid-Open No. 5-336446) 23 and a caption video determination circuit 24. That is, the digital video signal DY supplied to the input terminal 18a
Is supplied to the comparison circuit 23a and is converted into a rectangular pulse signal by discriminating its magnitude from the threshold value refL1 and then supplied to the gate circuit 23b.

The video end line signal LS3 and the horizontal synchronizing signal H supplied to the input terminals 18b to 18d, respectively.
The REF and the vertical synchronization signal VREF are supplied to the gate signal generation circuit 23c and are used to generate a gate signal indicating the effective video period and the subtitle period. The gate signal generated by the gate signal generation circuit 23c is the same as the gate circuit 2 described above.
3b. The gate circuit 23b operates so that the output signal of the comparison circuit 23a passes only while the gate signal indicates the subtitle period. That is, the gate circuit 23b outputs a rectangular pulse signal corresponding to the caption.

The output signal from the gate circuit 23b is supplied to the subtitle presence determining circuit 23d. The subtitle presence determining circuit 23d, based on the horizontal synchronizing signal HREF and the vertical synchronizing signal VREF, outputs the subtitle line determining signal SS indicating the subtitle period from the output signal of the gate circuit 23b.
3 is generated and output. This subtitle presence determination circuit 23d
The subtitle line determination signal SS3 output from is supplied to the letterbox video detection circuit 17 via the output terminal 18e, and is also supplied to the counter 23e.

This counter 23e, as described above,
The subtitle end line signal SS that counts the horizontal synchronization signal HREF input between the generation position of the vertical synchronization signal VREF and the subtitle end position and indicates the count value.
2 is generated and output. The subtitle end line signal SS2 output from the counter 23e is supplied to the vertical deflection control circuit 19 via the output terminal 18f and is also supplied to the subtitle video determination circuit 24.

The subtitle video determination circuit 24 determines the subtitle determination signal SS1 indicating whether or not a subtitle is present in the input image for each vertical synchronization cycle based on the video end line signal LS3 and the subtitle end line signal SS2. Generate and output terminal 18
It is output to the vertical deflection control circuit 19 via g. The caption video determination circuit 24 compares, for example, the video end line signal LS3 and the caption end line signal SS2,
The subtitle end line signal SS2 is the video end line signal L
When it is a value larger than S3, it is configured to determine that a caption is present, or takes a difference value between the video end line signal LS3 and the caption end line signal SS2,
When the difference value is a positive value equal to or larger than a certain number, it is configured to determine that the subtitle exists. That is, FIG.
In the video shown in (a), the subtitle end line signal S
Since the value of S2 is larger than the value of the video end line signal LS3, the presence of subtitles can be determined.

Here, in the conventional television receiver provided with the caption detection circuit 18 as described above, FIG.
As shown in (b), in the case where a video signal having a black band in the period A is present in the video period of the main image portion and a video signal having a white band in the period B is subsequently input to the input terminal 11, The operation will be described with reference to the timing chart shown in FIG.

In this case, FIG. 14A shows the vertical synchronizing signal V
REF, the same figure (b) shows the horizontal synchronizing signal HREF, the same figure (c) shows the digital video signal DY, and the same figure (d) shows the rectangular pulsed video signal output from the comparison circuit 23a. (E) shows a gate signal output from the gate signal generating circuit 23c, and (f) shows a rectangular pulsed signal corresponding to the caption output from the gate circuit 23b. FIG. 6G shows the caption line determination signal SS3 output from the caption presence determination circuit 23d.

That is, when the digital video signal DY shown in FIG. 14 (c) is supplied, the letterbox video detection circuit 17 erroneously determines that the black band-shaped video period A is a non-image portion, and therefore, the video is not detected. The position where the line is changed to the black belt-shaped video line is regarded as the video end position, and the video end line signal LS3 is output to the caption detection circuit 18. Therefore, from the gate signal generation circuit 23c of the caption detection circuit 18, the input video end line signal LS3 and vertical synchronization signal VR are input.
Based on the EF and the horizontal synchronization signal HREF, FIG.
A gate signal for dividing the effective video period and the subtitle period as shown in (e) is output.

Accordingly, from the gate circuit 23b, among the rectangular pulse-shaped video signals shown in FIG. 14 (d), which are obtained by comparing the digital video signal DY with the threshold value refL1 by the comparison circuit 23a, As shown in (f) of the same figure, a rectangular pulse-shaped signal corresponding to the white band-shaped video period B is extracted and output to the subtitle existence determination circuit 23d. Therefore, the subtitle existence determining circuit 23d regards the white band image period B in the main image portion image period as a subtitle period, and FIG.
The subtitle line determination signal SS3 as shown in FIG. 4 (g) is output. Further, in the counter 23e, the period B
The end position of the white-belt-shaped image is regarded as the caption end position, and the caption end line signal SS2 is output.

As described above, in the conventional caption detection means, the video signal in which the black-belt-shaped image of the period A exists and the white-belt-shaped image of the period B follows is input during the main image portion video period. In this case, the period A is erroneously determined to be the non-image portion, and the period B is regarded as the subtitle period, which causes a problem that the end position of the white band image period B is not detected as the image end position. There is. This means that even if the video signal does not include subtitles, if a video as shown in FIG. 11B is input, it is erroneously determined that subtitles are present.

Further, FIG. 15 shows another example of a conventional wide aspect screen compatible television receiver provided with a subtitle detecting means. In FIG. 15, the same parts as those in FIG. 12 are designated by the same reference numerals and described. The luminance signal Y and the color difference signals I and Q output from the video processing circuit 16 are supplied to the scanning line conversion circuit 25.

The scanning line conversion circuit 25 outputs the letterbox determination signal LS1, the image start line signal LS2 and the image end line signal LS3 output from the letterbox image detection circuit 17, and the caption determination output from the caption detection circuit 18. On the basis of the signal SS1 and the subtitle end line signal SS2 and the clock CK output from the clock generation circuit 13, when the letterbox video signal is input, the image from the video start position to the subtitle end position is enlarged and displayed on the CRT 22. The number of scanning lines is converted by performing scanning line interpolation processing, and is output to the RGB conversion circuit 21.

In the case of this conventional example, the vertical deflection signal VD output from the vertical deflection control circuit 19 is fixed irrespective of the image, which is also different from the television receiver shown in FIG. Also in the television receiver having the configuration shown in FIG. 15, it goes without saying that the above-mentioned problems and inconveniences occur with respect to the subtitle detection.

[0028]

As described above, the conventional caption detection means has a problem that a portion other than the caption is erroneously determined as a caption depending on the contents of the video.
Therefore, the present invention has been made in consideration of the above circumstances, and an object thereof is to provide an extremely good caption detection device capable of accurately detecting caption information included in a video signal regardless of the content of the video. To do.

[0029]

A subtitle detecting apparatus according to the present invention belongs to a selecting means for selecting one line of a video signal into a plurality of different level ranges, and a plurality of level ranges selected by the selecting means. Comparing means for comparing the number of pixels of each video signal with a predetermined threshold value and judging means for judging the presence or absence of subtitle information based on the comparison result of this comparing means are provided.

[0030]

According to the above configuration, the video signal is selected into a plurality of level ranges within one line, and the number of pixels of each video signal belonging to the selected plurality of level ranges is compared with the threshold value. Then, it was decided that it is caption information only when all the comparison results were as specified.
It is possible to accurately detect the subtitle information included in the video signal regardless of the content of the video, unlike the conventional case, in which the white band-shaped video period in the main image part video period is not erroneously determined as the subtitle period. Become.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram showing the caption detection device described in this embodiment, and FIGS. 2 and 3 are timing diagrams for explaining the operation thereof. That is, FIG. 2 shows an operation when a video signal including a caption as shown in FIG. 11 (a) is input, and FIG. 3 shows a conventional example as shown in FIG. 11 (b). The operation when the video signal in question is input is shown. 2 and 3, both (a) shows the vertical synchronizing signal VREF and (b) shows the horizontal synchronizing signal HREF.
, (C) shows the digital video signal DY, (d)
Indicates the subtitle line determination signal SS3.

FIGS. 4 to 7 are timing charts for explaining the details of the operations shown in FIGS. 2 and 3, respectively. That is, FIG. 4 shows the operation when a non-image part line in the upper and lower non-image part periods is input, and FIG. 5 shows the operation when a video line in the main image part video period is input. 6 shows the operation when a subtitle line in the subtitle period is input, and FIG. 7 shows the white band image period B shown in FIG. 11B.
The operation when the white band image line is input is shown.

Then, in FIGS. 4 to 7, both are (a)
Indicates the digital video signal DY for one horizontal synchronization period,
(B) shows the horizontal synchronization signal HREF for one cycle,
(C) shows the level comparison result signal CMPW outputted from the comparison circuit 27, (d) shows the level comparison result signal CMPB outputted from the comparison circuit 28, and (e) shows the level outputted from the gate circuit 29. The comparison result signal CMPG is shown, (f) shows the sampling signal output from the sampling signal generating circuit 33, (g) shows the level comparison result signal CMPB ′ output from the valid period sampling circuit 31, and (h). Indicates the reset signal output from the reset signal generating circuit 37, (i) indicates the count signal CNTW output from the counter circuit 30, (j) indicates the count signal CNTG output from the counter circuit 32, and ( k) indicates the count signal CNTB output from the counter circuit 36.

Here, the operation when a video signal including a caption as shown in FIG. 11A is input will be described with reference to FIGS. 2 and 4 to 6. First, input terminal 2
The digital video signal DY supplied to 6 is supplied to the comparison circuit 2
7 and 28 respectively. Of these, comparison circuit 2
7 is the input digital video signal DY and the threshold value re
When the digital video signal DY is larger than the threshold value refL1, the magnitude is compared with fL1 and at the H (high) level,
A level comparison result signal CM which becomes L (low) level when the digital video signal DY is smaller than the threshold value refL1.
Output PW.

Further, the comparison circuit 28 compares the input digital video signal DY with the threshold value refL2 set to be smaller than the threshold value refL1, and the digital video signal DY is compared to the threshold value refL2. Is also L level, the digital video signal DY has a threshold value ref.
When it is smaller than L2, it outputs the level comparison result signal CMPB which becomes H level.

Therefore, as shown in FIG. 4A, since the digital video signal DY is smaller than both threshold values refL1 and refL2 in the non-picture portion period, the comparison circuit 2
As shown in FIG. 4C, the level comparison result signal CMPW of L level is output from 7 and supplied to the gate circuit 29 and the counter circuit 30, respectively. ), The level comparison result signal CMPB of H level is output and the gate circuit 2
9 and the effective period extracting circuit 31 are supplied respectively.

When the level comparison result signals CMPW and CMPB are both at the L level, the gate circuit 29
That is, the level comparison result signal CMPG of H level is output to the counter 32 only when the digital video signal DY has a magnitude between the threshold values refL1 and refL2. Therefore, in the non-image part period, as shown in FIG. 4E, the level comparison result signal CMPG of L level is supplied to the counter 32.

On the other hand, the sampling signal generating circuit 33 is
A horizontal effective video period is shown in FIG. 4 (f) by counting the clock CK supplied to the input terminal 35 with reference to the horizontal synchronizing signal HREF shown in FIG. 4 (b) supplied to the input terminal 34. Such a sampling signal is generated and output to the valid period sampling circuit 31. This effective period sampling circuit 31 is based on the sampling signal,
Level comparison result signal CMP within the horizontal effective video period
By extracting B, the level comparison result signal CMPB 'as shown in FIG. 4 (g) is output to the counter circuit 36.

Further, the reset signal generating circuit 37 is
In order to initialize each counter circuit 30, 32, 36 by counting the clock CK supplied to the input terminal 35 with reference to the horizontal synchronizing signal HREF shown in FIG. 4B supplied to the input terminal 34. 4 (h), a reset signal is generated and output.

Here, the counter circuit 30 is initialized by the reset signal and then only during the period when the level comparison result signal CMPW output from the comparison circuit 27 is at the H level, that is, the digital video signal DY is the threshold value. refL
The clock CK is counted for a period larger than 1 and the count signal CNTW indicating the count value is output to the comparison circuit 38 as shown in FIG.

Further, the counter circuit 32 is initialized by the reset signal and then, only during the period when the level comparison result signal CMPG output from the gate circuit 29 is at the H level, that is, the digital video signal DY is the threshold value refL.
Clock CK for a period between 1 and refL2
Is counted and a count signal CNTG indicating the count value is output to the comparison circuit 39 as shown in FIG.

Further, the counter circuit 36 is initialized by the reset signal, and then the level comparison result signal CMPB 'output from the effective period extracting circuit 31 is H level.
The clock CK is counted only during the level period, that is, during the period when the digital video signal DY is smaller than the threshold value refL2, and the count signal CNTB indicating the count value is supplied to the comparison circuit 40 as shown in FIG. It is outputting.

That is, according to the configuration and operation described above, the digital video signal DY supplied to the input terminal 26 is supplied.
Within one horizontal cycle period, a pixel having a level higher than the threshold value refL1 and threshold values refL1 and refL2
Pixels having a level between and are classified into pixels having a level smaller than the threshold value refL2, and the number of each pixel is counted. Therefore, in the non-image part period shown in FIG. 4, the number of low level pixels is large as shown in FIG. 4K, and the high level pixels as shown in FIGS. It can be seen that there are no intermediate level pixels.

Then, the comparison circuit 38 compares the input count signal CNTW with the threshold value refC1 in magnitude. When the count value CNTW is equal to or greater than the threshold value refC1, the pixel number comparison result signal SW is determined as a subtitle line determination. It is output to the circuit 41. Further, the comparison circuit 39 compares the input count signal CNTG and the threshold value refC2 to determine whether the count value CNTG is the threshold value refC.
When it is 2 or less, the pixel number comparison result signal SG is output to the subtitle line determination circuit 41. Further, the comparison circuit 40 receives the input count signal CNTB and the threshold value r.
efC3 is compared, and when the count value CNTB is equal to or greater than the threshold value refC3, the pixel number comparison result signal SB
Is output to the subtitle line determination circuit 41.

This subtitle line determination circuit 41 determines whether to set 1 based on the input pixel number comparison result signals SW, SG and SB.
It is determined whether or not the digital video signal DY is a subtitle line for each horizontal period. In this case, the subtitle line determination circuit 4
1 is the horizontal synchronization signal HREF supplied to the input terminal 34
Based on the above, the line to which all the pixel number comparison result signals SW, SG, SB are input is determined to be a subtitle line, and the H level subtitle line determination signal SS3 is output. For this reason,
Since the pixel number comparison result signal SW is not obtained in the non-image part line shown in FIG. 4, the subtitle line determination circuit 41 does not determine the subtitle line and outputs the L level subtitle line determination signal SS3.

Next, as shown in FIG. 5A, during the main image portion video period, the count signals CNTW, CNTG, CNT output from the respective counter circuits 30, 32, 36.
B is as shown in FIGS. 5 (i), (j), and (k), respectively, and it can be seen from FIG. 5 (j) that the number of pixels at the intermediate level is large. In this case, since the count signal CNTG output from the counter circuit 32 becomes the threshold value refC2 or more, the comparison circuit 39 outputs the pixel number comparison result signal SG.
Is not obtained, the subtitle line determination circuit 41 does not determine that it is a subtitle line, and the subtitle line determination signal SS3 of L level is still obtained.
Will be output.

As shown in FIG. 6A, in the subtitle line in the subtitle period, the level of the background portion is low and the level of the subtitle portion is high, and the level changes sharply at the boundary between the background and the subtitle. are doing. Therefore, FIG. 6 (i)
The number of high level pixels as shown in FIG. 6 and the number of low level pixels as shown in FIG.
As shown in (j), it can be seen that the number of intermediate level pixels is reduced.

In this case, the comparison circuit 38 outputs the count signal C
Since NTW becomes equal to or larger than the threshold value refC1, the pixel number comparison result signal SW is output, and the comparison circuit 39 outputs the count signal C.
Since NTG becomes the threshold value refC2 or less, the pixel number comparison result signal SG is output, and the comparison circuit 40 outputs the count signal C.
Since NTB becomes equal to or greater than the threshold value refC3, the pixel number comparison result signal SB is output. Therefore, the subtitle line determination circuit 41 determines that all the pixel number comparison result signals SW, SG, SB
Is supplied, the input line is determined to be a subtitle line, and the H level subtitle line determination signal SS3 is output.

In this way, the subtitle line determination circuit 41
The subtitle line determination signal SS3 output from is supplied to the letterbox video detection circuit 17 via the output terminal 42 and also to the subtitle end line extraction circuit 43. The subtitle end line extraction circuit 43 detects the subtitle end position from the fall of the input subtitle line determination signal SS3, and supplies it to the input terminal 34 with the vertical synchronization signal VREF supplied via the input terminal 44 as a reference. By counting the generated horizontal synchronization signal HREF, the caption end line signal SS2 indicating the count value at the caption end position is generated and output.

The subtitle end line signal SS2 output from the subtitle end line extraction circuit 43 is supplied to the vertical deflection control circuit 19 or the scanning line conversion circuit 25 through an output terminal 45, and at the same time, the subtitle video determination circuit. 46. This subtitle video determination circuit 46 has an input terminal 4
Based on the video end line signal LS3 and the subtitle end line signal SS2 supplied via 7, the above subtitle determination signal SS1 indicating whether or not a subtitle exists in the input image for each vertical synchronization cycle is generated and output. It outputs to the vertical deflection control circuit 19 or the scanning line conversion circuit 25 via the terminal 48.

Next, the operation when a video signal without subtitles as shown in FIG. 11B is input will be described with reference to FIGS. 3 and 7. In this case, the operation of the digital video signal DY shown in FIG. 3C in the upper and lower non-picture part periods and the black band picture period A is the same as when the non-picture part line described in FIG. 4 is input, and The operation in the main image portion video period other than the black band image period A and the white band image period B of the digital video signal DY shown in FIG.
Since the operation is the same as when the main image portion video line described in 1 is input, the description thereof will be omitted, and the operation in the white band image period B will be described here.

That is, as shown in FIG. 7A, when the white band image line of the white band image period B is input,
As shown in (i), the number of high level pixels increases,
As shown in FIGS. 7 (j) and 7 (k), it can be seen that the number of intermediate level pixels and the number of low level pixels are reduced.
In this case, since the count signal CNTB output from the counter circuit 36 becomes the threshold value refC3 or less, the pixel number comparison result signal SB is not obtained from the comparison circuit 40, and the subtitle line determination circuit 41 does not determine the subtitle line. , L level subtitle line determination signal SS3 is output.

Therefore, according to the configuration of the above-described embodiment, the digital video signal DY is selected into pixels of three levels within one horizontal cycle period, and the number of pixels of each level is set to the threshold values refC1 and refC2. , RefC3, and the comparison result is determined to be a subtitle line only when all the comparison results are in accordance with the regulation. Therefore, as in the conventional case, the white band image period B in the main image portion image period B is determined. Will not be erroneously determined as the subtitle period, and the subtitle information included in the video signal can be accurately detected regardless of the content of the video.

FIG. 8 shows a modification of the above embodiment. That is, the digital video signal DY supplied to the input terminal 26 is supplied to the comparison circuits 27 and 28 and the other comparison circuits 49 and 50, respectively. Of these, the comparison circuit 49 compares the input digital video signal DY with the threshold value refL3, and when the digital video signal DY is less than or equal to the threshold value refL3, the comparison circuit 49
Output level.

Further, the comparison circuit 50 compares the input digital video signal DY with the threshold value refL4 set to be smaller than the threshold value refL3, and the digital video signal DY is equal to or larger than the threshold value refL4. When, the H level is output. In this case, the comparison circuits 27, 28, 4
Threshold values refL1, refL given to 9, 50
2, refL3, refL4 is refL1> refL
It is assumed that the relationship of 3>refL4> refL2 is set.

Then, the respective outputs of the comparison circuits 49 and 50 are supplied to the AND circuit 51 to be subjected to a logical product operation.
Therefore, the digital video signal DY supplied to the input terminal 26 has the threshold value refL3 or less and the threshold value ref.
An output of H level can be obtained from the AND circuit 51 only when the size is L4 or more. That is, AND circuit 5
The output of 1 is that the digital video signal DY has a threshold value refL.
3 becomes the level comparison result signal CMPG for determining whether or not it is between 3 and refL4.

That is, in the modification shown in FIG. 8, the digital video signal DY supplied to the input terminal 26 is input.
Are sorted into pixels larger than the threshold value refL1, pixels between the threshold values refL3 and refL4, and pixels smaller than the threshold value refL2. Of course, the same effect as that of the embodiment shown in FIG. 1 can be obtained.

Next, FIG. 9 shows a second embodiment of the present invention. In FIG. 9, the same parts as those in FIG. 1 are described with the same reference numerals. The digital video signal DY supplied to the input terminal 26 is supplied to the comparison circuits 27 and 28 and to the average value circuit 52. Supplied. The average value circuit 52 has a period from an arbitrary start position determined based on the vertical synchronization signal VREF to an end position determined based on the average value calculation period end position data supplied to the input terminal 53. The average value of the input digital video signals DY is calculated, and the calculated digital video average signal AVL is used as a threshold control circuit 54.
It is output to 55.

Of these, the threshold control circuit 54 performs an addition process or a subtraction process on the input reference threshold value refL1 'and the digital video average signal AVL, and the calculated result is used as a threshold value in the comparison circuit 27. It is outputting. Also,
The threshold control circuit 55 also performs addition processing or subtraction processing on the input reference threshold value refL2 ′ and the digital video average signal AVL, and outputs the calculation result as a threshold value to the comparison circuit 28.

In short, in the second embodiment, the threshold value given to the comparison circuits 27 and 28 is changed based on the average value of the digital video signal DY supplied to the input terminal 26. By doing so, even if the level of the non-picture part of the input digital video signal DY varies depending on the input source, it is possible to detect the subtitles accurately correspondingly.

FIG. 10 shows the details of the average value circuit 52. That is, the digital video signal DY supplied to the input terminal 52a is supplied to the sampling circuit 52b. The sampling circuit 52b is used in the timing generation circuit 5
The input digital video signal DY is input to the 1-line averaging circuit 52d only while the sampling signal is output from 2c.
Work to lead to. In this case, the timing generation circuit 52c outputs the vertical synchronization signal V supplied to the input terminal 52e.
Based on REF, determine the start position of the sampling signal,
The end position of the sampling signal is determined based on the end position data of the average value calculation period supplied to the input terminal 53.

The 1-line averaging circuit 52d is
Based on the clock CK supplied to the input terminal 52f,
The average value of one line of the input digital video signal DY is calculated and output to the multi-line averaging circuit 52g.
The plural line averaging circuit 52g calculates an average value for a plurality of lines from the output of the one line averaging circuit 52d based on the horizontal synchronizing signal HREF supplied to the input terminal 52h, and the calculation result is the digital video average signal As the AVL, the threshold control circuit 54,
It is output to 55. The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0063]

As described above in detail, according to the present invention,
It is possible to provide a very good caption detection device that can accurately detect caption information included in a video signal regardless of the content of the video.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing an embodiment of a caption detection device according to the present invention.

FIG. 2 is a timing chart shown for explaining an operation of a vertical cycle in the embodiment.

FIG. 3 is a timing chart shown for explaining an operation in a vertical cycle in the embodiment.

FIG. 4 is a timing chart shown for explaining an operation of a horizontal cycle in the same embodiment.

FIG. 5 is a timing chart shown for explaining the operation of the horizontal cycle in the same embodiment.

FIG. 6 is a timing chart shown for explaining the operation of the horizontal cycle in the embodiment.

FIG. 7 is a timing chart shown for explaining the operation of the horizontal cycle in the same embodiment.

FIG. 8 is a block diagram showing a modification of the embodiment.

FIG. 9 is a block diagram showing a second embodiment of the present invention.

FIG. 10 is a block configuration diagram showing details of an average value circuit in the second embodiment.

FIG. 11 is a diagram illustrating a letterbox display screen on a wide aspect screen.

FIG. 12 is a block configuration diagram showing a television receiver having a conventional caption detection function.

FIG. 13 is a block configuration diagram showing details of a caption detection circuit used in the conventional receiver.

FIG. 14 is a timing chart shown for explaining the operation of the same subtitle detection circuit.

FIG. 15 is a block diagram showing another example of a television receiver having a conventional caption detection function.

[Explanation of symbols]

11 ... Input terminal, 12 ... A / D conversion circuit, 13 ... Clock generation circuit, 14 ... Vertical synchronization processing circuit, 15 ... Horizontal synchronization processing circuit, 1
6 ... Video processing circuit, 17 ... Letterbox video detection circuit, 18 ... Caption detection circuit, 19 ... Vertical deflection control circuit,
20 ... Horizontal deflection control circuit, 21 ... RGB conversion circuit, 22 ... CRT, 23 ... Subtitle position detection circuit, 24 ... Subtitle video determination circuit, 25 ... Scan line conversion circuit, 26 ... Input terminal, 27, 28 ...
Comparing circuit, 29 ... Gate circuit, 30 ... Counter circuit, 31 ... Effective period sampling circuit, 32 ... Counter circuit, 33 ... Extraction signal generating circuit, 34, 35 ... Input terminals,
36 ... Counter circuit, 37 ... Reset signal generating circuit,
38 to 40 ... Comparison circuit, 41 ... Subtitle line determination circuit, 42 ... Output terminal, 43 ... Subtitle end line extraction circuit, 44 ... Input terminal, 45 ... Output terminal,
46 ... Subtitle video determination circuit, 47 ... Input terminal, 48 ... Output terminal, 49, 50 ...
Comparing circuit, 51 ... AND circuit, 52 ... Average value circuit, 53 ... Input terminal, 54, 55
... Threshold control circuit.

Claims (5)

[Claims] 1. In a caption detection device for detecting caption information included in a video signal, a selection means for selecting one line of the video signal into a plurality of level ranges different from each other, and the plurality of selection devices selected by the selection means. Comparing means for comparing the number of pixels of each video signal belonging to the level range with a predetermined threshold value, and determining means for determining the presence or absence of the caption information based on the comparison result of the comparing means. A caption detection device characterized by the following. 2. The selecting means selects pixels constituting one line of the video signal as a first level range, a second level range lower than the first level range, and a second level range. And a third counter that selects a third level range lower than the range, and the comparing means includes a first counter that counts the number of pixels that are selected by the selecting means in the first level range, and the first counter. A first comparison circuit for comparing the obtained count value with a predetermined first threshold value, a second counter for counting the number of pixels sorted by the sorting means in the second level range, and A second comparing circuit for comparing a count value obtained from the second counter with a predetermined second threshold value; and a third counter for counting the number of pixels selected by the selecting means in the third level range. And this third A third comparison circuit that compares a count value obtained from the counter with a predetermined third threshold value, and the determination means determines that the count value from the first comparison circuit is greater than or equal to the first threshold value. An output is obtained, an output having a count value equal to or less than a second threshold value is obtained from the second comparison circuit, and an output having a count value equal to or greater than a third threshold value is obtained from the third comparison circuit. The subtitle detection device according to claim 1, wherein the subtitle detection device determines that the subtitle is a subtitle. 3. The first discriminating circuit, wherein the discriminating means discriminates into the first level range when pixels constituting one line of the video signal are higher than a first threshold level.
When the pixels forming one line of the video signal are between the first threshold level and the second threshold level set to be smaller than the first threshold level, the second And a third discriminating circuit that discriminates into the third level range when the pixels forming one line of the video signal are smaller than the second threshold level. 3. The method according to claim 2, further comprising:
The described subtitle detection device. 4. The first discriminating circuit, wherein the sorting means sorts into the first level range when pixels forming one line of the video signal are higher than a first threshold level.
Pixels forming one line of the video signal have a second threshold level set lower than the first threshold level and a second threshold level set lower than the second threshold level. The second level when between 3 threshold levels
A second discriminating circuit for selecting into the level range of 1), and when the pixels constituting one line of the video signal are smaller than the third threshold level and set to a fourth threshold level which is smaller than the third threshold level. 3. The caption detection device according to claim 2, further comprising a third discriminating circuit that selects into three level ranges. 5. The selecting means calculates an average value calculating means for calculating an average value of the video signal, and a threshold level used for selecting based on the average value calculated by the average value calculating means. It changes, It is characterized by the above-mentioned.
The caption detection device according to any of the above.