JPH08306806A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To provide a semiconductor device which stably operates by using a ferroelectric thin film whose surface is made semiconductive. CONSTITUTION: In a semiconductor element provided with a ferroelectric thin film 14, a gate electrode 13 formed in contact with the first surface of the ferroelectric thin film, and source/drain electrodes 16 which are spaced and formed in contact with the second surface 15 of the ferroelectric thin film, the second surface 15 of the ferroelectric thin film 14 is made semiconductive.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device such as a thin film transistor having a memory effect using a ferroelectric substance.

[0002]

2. Description of the Related Art Ferroelectric materials are known to have hysteresis characteristics. A device having a memory effect can be created by utilizing this hysteresis characteristic. Conventionally,
Semiconductor devices using various types of ferroelectrics have been proposed. US Pat. No. 3,832,700 describes a device using a field effect transistor in which a ferroelectric thin film formed on a semiconductor substrate is used as a gate insulating film. This field effect transistor can store the information by controlling the conductive property of the semiconductor surface below the ferroelectric thin film by the polarization charge of the ferroelectric thin film.

Further, US Pat. No. 4,873,664 describes a storage device using a ferroelectric capacitor in a storage cell. The pp. 2, the memory cell is composed of a combination of a ferroelectric capacitor and a selecting transistor. A typical cross-sectional structure of a memory cell is IEDM'87 pp. 850-
2 in 851. A ferroelectric capacitor is arranged on a substrate on which a transistor is formed with an insulating film interposed. When a positive read pulse is applied to a ferroelectric capacitor, the polarity of the pulse and the direction of the remanent polarization of the ferroelectric material differ, causing polarization reversal, or the direction of the pulse and the remanent polarization are the same, and no polarization reversal occurs. Thus, the amount of charge flowing from the capacitor is different, and information can be read by detecting this difference.

PCT Patent WO 91/06121 describes a storage device using a variable resistance element in which a semiconductor thin film is formed on a ferroelectric thin film. The variable resistance element is disclosed in the drawings pp. As shown in FIG. 3 in 2/5, a lower electrode, a ferroelectric thin film, and a semiconductor thin film are formed in this order on a substrate, and two electrodes are arranged on the semiconductor thin film at intervals. . By controlling the direction of the remanent polarization of the ferroelectric thin film, the conductivity of the semiconductor thin film can be controlled, and information can be read from the resistance between two electrodes on the semiconductor thin film.

[0005]

As described above, various types of semiconductor devices using the ferroelectric thin film have been proposed. However, each of these conventional semiconductor devices has advantages and disadvantages, and has a problem.
In the case of the field effect transistor described in US Pat. No. 3,832,700, it is difficult to form a high quality ferroelectric thin film on a semiconductor substrate, and a film having sufficient ferroelectric characteristics cannot be obtained. However, there are problems such as a large number of defects occurring at the ferroelectric / semiconductor substrate interface. This is due to the mismatch between the crystal lattices of the ferroelectric and the semiconductor and the mutual diffusion of the constituent elements. Interface defects adversely affect the characteristics of the device, such as shortened memory retention time. In order to solve these problems, methods such as providing a buffer layer at the ferroelectric / semiconductor substrate interface have been attempted, but devices with high reliability for practical use have not been manufactured. Further, in the ferroelectric thin film forming step, a material not used in a normal semiconductor process is used, and a heat treatment step is included. In this type of device structure, since the ferroelectric thin film is formed immediately above the semiconductor substrate, the constituent elements of the ferroelectric substance are easily diffused into the integrated circuit element in the semiconductor substrate, which damages the integrated circuit element. It is also a problem to put it away.

Such a problem has been solved to some extent in a device using a ferroelectric capacitor. IE
DM'87 pp. In FIG. 2 of 850 to 851, the ferroelectric capacitor is arranged separately from the integrated circuit element formed on the semiconductor substrate with an insulating film. Therefore, damage to the integrated circuit element on the substrate in the ferroelectric thin film forming step can be suppressed. The ferroelectric thin film is formed on the electrode of metal or conductive oxide. By carefully selecting the electrode material, it is easier to obtain a high-quality ferroelectric thin film than that formed directly on the semiconductor substrate.

However, this type of non-volatile memory device has a problem that the method of reading the stored contents is the so-called destructive reading method in which the information in the memory cell is once destroyed, and the read cycle time is long. In the case of the device structure described in the PCT patent WO91 / 06121, the drawing pp. In FIG. 3 of 2/5, the ferroelectric variable resistance element is arranged directly on the substrate. However, due to the device structure, the ferroelectric variable resistance element may be arranged after the substrate is protected by an insulating film. There is no problem. With such a layout, it is possible to suppress damage to the integrated circuit on the semiconductor substrate in the ferroelectric thin film forming step, as in the case of using a ferroelectric capacitor. However, in this invention, different materials are used for the ferroelectric thin film and the semiconductor thin film. Therefore, a large number of defects are likely to occur at the ferroelectric / semiconductor interface due to diffusion of the respective constituent elements, crystal lattice mismatch, and the like. Therefore, as in the case of US Pat. No. 3,832,700, a device with high stability such as a short memory holding time cannot be obtained.

As described above, none of the conventionally proposed semiconductor devices using a ferroelectric material satisfy all of the ease of integration with a semiconductor integrated circuit, non-destructive readout, and operational stability. It is an object of the present invention to provide a semiconductor device using a new type of ferroelectric material, in which the above-mentioned problems are solved, as compared with such a conventional technique. That is, an object of the present invention is to provide a semiconductor device using a ferroelectric material that can be easily integrated with an integrated circuit on a semiconductor substrate, can be nondestructively read, and can operate stably.

[0009]

According to the present invention, there is provided a semiconductor device comprising:
A ferroelectric thin film, a gate electrode provided in contact with the first surface of the ferroelectric thin film, and two source / drain electrodes provided in contact with the second surface of the ferroelectric thin film and spaced apart from each other. In the provided semiconductor element, the second surface of the ferroelectric thin film is made into a semiconductor.

The depletion layer and the storage layer are formed in the semiconducting region due to the remanent polarization of the ferroelectric region, so that the conductivity of the semiconducting region is changed and read as a resistance change between the source and drain electrodes. it can. The information writing operation, that is, the polarization reversal of the ferroelectric substance is performed by applying a voltage between the gate electrode and the semiconducting region. A semiconductor device proposed by the present invention as another solution is a ferroelectric thin film, a gate electrode provided in contact with the first surface of the ferroelectric thin film, and a second surface of the ferroelectric thin film in contact with the gate electrode. In a semiconductor device having two source / drain electrodes spaced apart from each other, the source / drain region in contact with the source / drain electrode on the second surface of the ferroelectric thin film is p
Type or n-type conductivity type semiconductor film, and the second surface of the ferroelectric thin film sandwiched between the source / drain regions is a channel region semiconductorized to a conductivity type different from that of the source / drain regions. Is characterized by.

When an inversion layer is formed in the channel region due to remanent polarization of the ferroelectric region, the source region and the drain region are electrically connected by this inversion layer. Therefore, the direction of remanent polarization in the ferroelectric region can be determined by whether or not a current flows between the source and drain electrodes. The information writing operation, that is, the polarization reversal of the ferroelectric substance is performed by applying a voltage between the gate electrode and the channel region.

With this structure, the structure of the element is more complicated than in the case of using one type of conductive type semiconducting region described above, but the reading of information becomes easier. Depending on the purpose of use, the two configurations may be used properly. Both cases are characterized by using a ferroelectric thin film having a semiconductor surface. By forming the ferroelectric region and the semiconducting region with the same material, material diffusion does not occur between the ferroelectric region and the semiconducting region. By using a semiconductor thin film on the surface of a ferroelectric thin film, an interface with no defects in the crystal lattice can be obtained at the interface between the ferroelectric region and the semiconducting region.

As the substrate, Si, GaAs, glass, sapphire or the like can be used. When Si or GaAs is used, it is preferable to form an insulating film such as SiO ₂ or SiN _x on the substrate. As the gate electrode, for example, an oxidation resistant conductive material such as Pt, Ir, RuO ₂ is preferable. Between the electrode and the substrate, Ti, Ta or a nitride thereof may be provided as an adhesive layer in order to improve the adhesiveness with the underlying substrate.

The ferroelectric material is preferably a material having a bandgap of 4.5 eV or less, such as PbZrTiO ₃ or BiT.
iO ₁₂ , GaGeTe are used. If the band gap becomes larger than this, it becomes difficult to form a semiconductor. Also,
The remanent polarization of the ferroelectric substance needs to be 0.1 μC / cm ² or more. Below this, the memory effect does not appear. PbZ
The remanent polarization of rTiO ₃ , BiTiO ₁₂ , and GaGeTe is several μC / cm ² to several tens of μC / cm ^2, and they have sufficient remanent polarization to show a memory.

The thickness of the ferroelectric thin film is 20 nm or more and 80
It is preferably 0 nm or less. If the thickness is 20 nm or less, dielectric breakdown is likely to occur, and it becomes difficult to partially form a semiconductor only on the surface when forming a semiconductor. On the other hand, if the thickness is 800 nm or more, the voltage required to invert the polarization becomes too high. In the region where the ferroelectric is made into a semiconductor, the carrier concentration is 10 ¹⁵ m ⁻³ to 10 ²⁷ m
It is preferably in the range of ^-3 . When the carrier concentration is 10 ¹⁵ m ^-3 or less, the conductivity of the semiconducting region becomes low and the operation speed of the device becomes slow. When the carrier concentration is 10 ²⁷ m ⁻³ or more, the change in conductivity in the semiconducting region due to the polarization change in the ferroelectric region becomes too small.

The thickness of the semiconducting region is usually about 1/40 to 1/2 of the thickness of the ferroelectric substance, and is 10 nm or more and 350 nm or more.
nm or less is preferable. If it is 10 nm or less, the resistance of the semiconducting region becomes high. If the thickness is 350 nm or more, the ratio of the total thickness of the semiconducting region to the thickness of the storage layer or the depletion layer generated in the semiconducting region due to the polarization of the ferroelectric region becomes too large, and the resistance change in the semiconducting region becomes small. Will end up.

The source / drain electrodes are made of Al, Pt, I
r, TiN, TiW, TaN and the like are preferable. Source-
The distance between the drain electrodes is preferably 100 μm or less. 1
If the thickness is 00 μm or more, the size of the device becomes too large, and the resistance between the source and the drain becomes too high, which causes a signal delay. A protective film may be provided on the source / drain electrodes. The protective film is an insulating material, and plasma Si
O ₂ or SiN _x can be used. SOG, PS
G, BPSG, etc. may be used. A contact hole is formed in the protective film to make contact between the ferroelectric element and another integrated circuit element. The contact is preferably Al, Cu, W, P-doped poly-Si, or the like.

Next, a preferable method of manufacturing such a semiconductor device will be described. A preferred method of manufacturing a semiconductor device according to the present invention comprises a step of forming a gate electrode on a substrate or a film formed on the substrate, a step of forming a ferroelectric thin film on the gate electrode, and the ferroelectric material. The method further comprises the step of converting the surface of the thin film into a semiconductor and forming a semiconducting region in a part of the ferroelectric thin film, and forming source / drain electrodes at intervals on the semiconducting region. .

A preferred method of manufacturing a semiconductor device presented as another solution by the present invention is a step of forming a gate electrode on a substrate or a film formed on the substrate, and a ferroelectric substance on the gate electrode. Forming a thin film; forming two source / drain regions by semiconducting two spaced-apart regions on the surface of the ferroelectric thin film to p-type or n-type conductivity; and the ferroelectric thin film. The surface of /
And a step of semiconducting a region sandwiched by the drain regions to a conductivity type different from that of the source / drain regions to form a channel region, and forming source / drain electrodes on the source / drain regions respectively. Characterize.

Both cases are characterized by including a step of converting the surface of the ferroelectric thin film into a semiconductor. If the ferroelectric thin film and the semiconductor thin film are formed in different steps, it is difficult to form a good ferroelectric / semiconductor interface. When the surface of the ferroelectric thin film is made into a semiconductor and a part of the ferroelectric thin film is used as a semiconducting region, a good interface with few defects without crystal lattice discontinuity can be obtained.

The above manufacturing method will be described in more detail. A gate electrode is formed on such a substrate or an insulating film formed on the substrate. When the ferroelectric to be formed later is an oxide, the gate electrode is preferably a conductive material having oxidation resistance. For example, Pt, Ir, RuO _{2 and the} like are preferable. When Pt is used, it is preferable to previously form Ti, Ta or a nitride thereof as an adhesion layer in order to further improve the adhesion to the underlying substrate. As the electrode etching method, ion milling, plasma etching, wet etching using HF or the like may be used.

A ferroelectric thin film is formed on this gate electrode. As a method for forming the ferroelectric thin film, a sol-gel method, a sputtering method, a CVD method, a laser ablation method, or the like can be used. Then, the surface of the ferroelectric thin film opposite to the substrate side is made into a semiconductor. The method of converting the ferroelectric into a semiconductor is preferably an impurity diffusion method. For example PbZrTi
In the case of O ₃ , Ta, Bi, La, Ce, Pr, Nd, S
By diffusing m or the like as an impurity, an n-type conductive semiconductor can be obtained. Further, Fe, K, Na, Sc, or the like is used as an impurity for converting the semiconductor to p-type conductivity.

Although a part of the perovskite type oxide can be made into a semiconductor by introducing oxygen defects, it is difficult to control the amount of defects and it is easily affected by the subsequent electrode formation and protective film formation steps. The carrier concentration can be controlled with good reproducibility if the element is made into a semiconductor by a valence control method in which an element having a different valence from the original element constituting the ferroelectric is diffused as an impurity. As a method for forming a semiconductor, an ion implantation method in which ions to be diffused as an impurity into a ferroelectric thin film are implanted with high energy, a method in which an organic metal solution is applied on the surface to thermally diffuse, and the like are used.

Further, source / drain electrodes are formed by a known method on the ferroelectric thin film whose surface is made into a semiconductor, at intervals. A protective film may be provided thereover. A contact hole is formed in the protective film to make a contact between the ferroelectric element and another integrated circuit element.

[0025]

According to the present invention, the ferroelectric region and the semiconducting region are formed by using the ferroelectric thin film whose surface is made into a semiconductor and forming the ferroelectric region and the semiconducting region with the same material. No material diffusion occurs between them, and an interface with few defects is obtained without discontinuity of the crystal lattice at the interface of the ferroelectric region / semiconductive region. Therefore, carriers can be stably operated without being trapped by defects in the interface. Further, the ferroelectric thin film does not need to be directly formed on the substrate, and does not damage the integrated circuit element formed on the substrate. In addition, the stored information can be read nondestructively.

The semiconductor device of the present invention can be used as a storage device by utilizing the memory effect of the ferroelectric substance. Besides, it can be used as a driving element of a liquid crystal display device. When a conventional thin film transistor is used, it is necessary to always apply a gate voltage to the transistor which is turned on in order to maintain the display of the pixel, but the element of the present invention utilizes the memory effect to turn it on. Only when the voltage is applied, the voltage may be applied to the gate.

[0027]

Embodiments of the semiconductor device of the present invention will be described in detail below with reference to the accompanying drawings.

[0028]

[Embodiment 1] FIG. 1 is a sectional view of a basic element of a semiconductor device according to a first embodiment of the present invention. Insulating film 1 on semiconductor substrate 11
A gate electrode 13 is provided on both sides of 2. A ferroelectric thin film 14 is provided on the electrode, and the upper surface of the ferroelectric thin film 14 is a semiconducting region 15 made into a semiconductor. Source / drain electrodes 16 are arranged on the ferroelectric thin film at intervals. This element is protected by an insulating protective film 17,
Each electrode is electrically connected to another circuit element on the substrate by a contact 18.

Next, a manufacturing process of the above basic element will be described. 3 to 14 show the outline of the manufacturing process.
First, the Si substrate 1 on which an integrated circuit is formed as shown in FIG.
300 nm thick SiO ₂ film 12 on top of plasma CV
It was formed by the D method. Then, a thickness of 5 is formed on the SiO ₂ film.
After forming 0 nm of Ti21 by the sputtering method, a thickness of 20
A 0 nm Pt electrode 22 was formed. This Pt / Ti electrode was etched by ion milling and processed into a predetermined shape as shown in FIG.

Then, as shown in FIG. 5, the ferroelectric thin film Pb is formed.
Sol ZrTiO ₃ (Zr / Ti ratio 50/50) 14
-Gel method. The sol-gel method is a thin film forming method using an organic metal as a raw material. A raw material solution obtained by mixing Pb, Zr methoxyethoxide, and Ti methoxyethoxide in methoxyethanol is spin-coated on a substrate and heat-treated at 600 ° C. Then, a PbZrTiO ₃ thin film was formed.

Then, Nb is deposited on the PbZrTiO ₃ thin film.
(OC ₂ H _{5) 5} solution was applied, by heat treatment at 700 ° C. to diffuse Nb from the upper surface of the PbZrTiO _3, and the semiconductor of the surface of the PbZrTiO ₃ to n-type conductivity, semiconductor as shown in FIG. 6 The region 15 is formed. continue,
After removing unnecessary portions of PbZrTiO ₃ by etching as shown in FIG. 7, Ti on PbZrTiO ₃ is removed as shown in FIG.
N was formed and processed into a predetermined shape to form source / drain electrodes 16 arranged at intervals.

Subsequently, as shown in FIG. 9, plasma SiN _x 17 was formed on the surface of the substrate to protect the device. Finally, Figure 1
A contact hole is formed in the protective film as shown in FIG.
Was sputtered to form contacts 18 between the elements, which were connected to other integrated circuit elements. Now, in order to compare with the device thus produced (hereinafter referred to as the device A), the device B was produced by the conventional technique. Hereinafter, a method for producing the element B will be described.

Si having a SiO ₂ film formed as in the device A
Pt / Ti gate electrode is formed on the substrate and Pb is formed on it.
ZrTiO ₃ was formed. Next, I on PbZrTiO ₃
A 60 nm thick n ₂ O ₃ thin film was formed. TiN was formed on the In ₂ O ₃ thin film and processed into a predetermined shape to form source / drain electrodes. Then, as in the case of the element A, a plasma SiN _x protective film is formed on the substrate surface to protect the element, a contact hole is formed in the protective film, and Al is sputtered to make contact between the elements to make another integration. Connected with the circuit element.

The resistance between the source and drain electrodes of the elements A and B was measured. In both cases, even if the voltage applied to the gate electrode was 0, the resistance value between the source and drain electrodes had two values depending on the direction of remanent polarization in the ferroelectric region. The ratio of the resistance values was 109: 1 for the element A and 34: 1 for the element B immediately after polarization inversion of the ferroelectric region. In each of the high resistance state and the low resistance state, the change over time was examined by leaving the gate electrode without applying a voltage, and element A changed as shown in FIG. 17 and element B changed as shown in FIG. In both cases, the logarithm of the resistance value and the logarithm of the time are in a linear relationship, and the high resistance state and the low resistance state after 10 years obtained by extrapolating the experimental values of FIG. 17, that is, after about 3 × 10 ⁸ seconds, are obtained. The resistance ratio was about 23: 1. The difference between these two resistances can be identified by a simple identification circuit, and it was found that the element A can retain memory for 10 years or more and has high stability. On the other hand, in the case of the element B, extrapolation of the experimental values in FIG. 18 revealed that after approximately 6 × 10 ⁷ seconds, the two values were almost the same and identification was not possible. This result shows that the device A, which is an example of the present invention, has higher stability than the device B manufactured by the conventional technique.

[0035]

Second Embodiment FIG. 2 is a sectional view of a basic element of a semiconductor device according to a second embodiment of the present invention. Insulating film 1 on semiconductor substrate 11
A gate electrode 13 is provided on both sides of 2. A ferroelectric thin film 14 is provided on the gate electrode. The upper surface of the ferroelectric thin film located on the gate electrode 13 serves as a channel region 19 which is made into a p-type or n-type conductivity type semiconductor. Source / drain regions 20 which are made into a semiconductor having a conductivity type different from that of the channel region are provided at positions sandwiching the channel region 19 on the upper surface of the ferroelectric thin film. Source / drain electrodes 16 are arranged on the source / drain regions 20. This element is protected by an insulating protective film 17, and each electrode is electrically connected to another circuit element on the substrate by a contact 18.

Next, the manufacturing process of the above basic element will be described. 11 to 16 show the outline of the manufacturing process of the semiconductor device according to the second aspect. First, as in the case of Example 1, Si having an integrated circuit formed as shown in FIG.
A SiO ₂ film is formed on the substrate, and then a Pt / Ti electrode is formed. Then, as shown in FIG. 12, a PbZrTiO ₃ thin film was formed.

Then, on the surface of the PbZrTiO ₃ thin film, Nb (OC
₂ H ₅ ) ₅ solution is applied and heat-treated at 700 ° C. to diffuse Nb from the upper surface of PbZrTiO ₃ ,
The surface of PbZrTiO ₃ was made semiconductive to n-type conductivity to form a channel region 19. As shown in FIG. 13, Al (OC ₃ H ₇ ) ₃ solution is applied to the region sandwiching the channel region and heat-treated at 700 ° C. to diffuse Al to be a p-type conductive semiconductor, and the source / drain region is formed. 20 was formed.

Then, as shown in FIG. 14, PbZrTiO 3
After removing unnecessary portions of ₃ by etching, TiN electrodes 16 were formed on the source / drain regions. Then, in FIG.
As described above, plasma SiNx 17 was formed on the substrate surface to protect the device. Finally, as shown in FIG. 16, a contact hole was formed in the protective film, an Al electrode was sputtered to form a contact 18 between the elements, and the element was connected to another integrated circuit element.

Now, in one of the devices thus produced, the drain current (current I _ds flowing when a voltage of 1 V is applied between the source and drain electrodes) by the gate voltage (voltage V _g applied to the gate electrode). ) Was measured. As a result, it was found that this thin film transistor had hysteresis as shown in FIG. 19 and had memory characteristics. At V _g = 0V, it has two states, an on state in which a drain current flows and an off state in which almost no drain current flows.
The on state and the off state can be easily distinguished. Then V _g =
The change with time of the drain current was examined for each of the ON state and the OFF state at 0V. There was no change in the off state. Regarding the on-state, the logarithm of drain conductance and the logarithm of time show a linear relationship, and extrapolation of experimental values revealed that the drain conductance after 10 years was 30% of the initial value. It has been found that this device can retain memory for more than 10 years and has high stability.

[0040]

As described in detail above, according to the present invention, it is possible to provide a device in which a ferroelectric element and a semiconductor element can be easily integrated, non-destructive reading is possible, and which operates stably and has high reliability. .

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device described in Example 1.

FIG. 2 is a sectional view of a semiconductor device described in a second embodiment.

FIG. 3 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 4 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 5 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 6 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 7 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 8 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 9 is a process of manufacturing the semiconductor device according to the first embodiment.

FIG. 10 is a manufacturing process of the semiconductor device according to the first embodiment.

FIG. 11 is a manufacturing process of the semiconductor device according to the second embodiment.

FIG. 12 is a process for manufacturing the semiconductor device according to the second embodiment.

FIG. 13 is a manufacturing process of the semiconductor device according to the second embodiment.

FIG. 14 is a process for manufacturing the semiconductor device according to the second embodiment.

FIG. 15 is a manufacturing process of the semiconductor device according to the second embodiment.

16 is a manufacturing process of the semiconductor device described in Example 2; FIG.

FIG. 17 shows changes with time in the resistance value between the source and drain electrodes of device A.

FIG. 18 shows changes with time in the resistance value between the source and drain electrodes of device B.

FIG. 19: Gate voltage-drain current characteristic

[Explanation of symbols]

 11 semiconductor substrate 12 insulating film 13 gate electrode 14 ferroelectric thin film 15 semiconducting region 16 source / drain electrode 17 protective film 18 contact 19 channel region 20 source / drain region 21 Ti 22 Pt

Claims (4)

[Claims] 1. A ferroelectric thin film, a gate electrode provided in contact with the first surface of the ferroelectric thin film, and two sources provided in contact with the second surface of the ferroelectric thin film and spaced apart from each other. In a semiconductor device having a / drain electrode,
A semiconductor device, wherein the second surface of the ferroelectric thin film is made into a semiconductor. 2. A ferroelectric thin film, a gate electrode provided in contact with the first surface of the ferroelectric thin film, and two sources provided in contact with the second surface of the ferroelectric thin film and spaced apart from each other. In a semiconductor device having a / drain electrode,
The source / drain regions of the second surface of the ferroelectric thin film, which are in contact with the source / drain electrodes, are made into semiconductors of p-type or n-type conductivity and are sandwiched between the source / drain regions. 2. The semiconductor device, wherein the second surface is a channel region that is made into a semiconductor of a conductivity type different from that of the source / drain regions. 3. A step of forming a gate electrode on a substrate or a film formed on the substrate, a step of forming a ferroelectric thin film on the gate electrode, and a step of converting the surface of the ferroelectric thin film into a semiconductor. Manufacturing a semiconductor device, comprising: forming a semiconducting region in a part of a ferroelectric thin film; and forming two source / drain electrodes on the semiconducting region at intervals. Method. 4. A step of forming a gate electrode on a substrate or a film formed on the substrate, a step of forming a ferroelectric thin film on the gate electrode, and a gap between surfaces of the ferroelectric thin film. Forming a source / drain region by semiconducting the two regions thus set to a p-type or n-type conductivity type; and a region sandwiched between the source / drain regions on the surface of the ferroelectric thin film as the source / drain region. A method for manufacturing a semiconductor device, comprising: a step of semiconducting to a conductivity type different from that of a drain region to form a channel region; and a step of forming source / drain electrodes on the source / drain regions, respectively.