JPH08264549A - Silicon wafer and production thereof - Google Patents

Abstract

PURPOSE: To produce a silicon wafer provided with a denuded zone(DZ) having substantially no slip defect efficiently at low cost. CONSTITUTION: The method for producing a silicon wafer comprises an initial temperature rise step for raising the temperature at a rate of 15-1000 deg.C/min in the temperature range of 800-1000 deg.C using a wafer produced from a single crystal silicon ingot, a gradual temperature rise step for raising the temperature at a low rate in the temperature range of 1000-1300 deg.C, and a step keeping the wafer in the temperature range of 1100-1300 deg.C for 5min or longer. With such method, a denuded zone(DZ) layer, where the density of oxygen deposit (BMD) is lower than 10<3> particles/cm<3> , can be formed on the surface of the wafer at a thickness of 3μm or above.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon wafer for semiconductor devices and a method for manufacturing the same.

[0002]

2. Description of the Related Art A silicon wafer is cut out from a single crystal silicon ingot.

A silicon single crystal can be manufactured by the Czochralski method. That is, raw material polysilicon is put in a quartz glass (SiO ₂ ) crucible, which is heated and melted, and a silicon single crystal is pulled up using a seed crystal.

In general, oxygen is in solid solution in a silicon single crystal produced by the Czochralski method. This is because oxygen is dissolved in the silicon melt from the quartz crucible and taken into the silicon single crystal.

Oxygen contained in the crystal is precipitated in the crystal as an in-crystal oxygen precipitate (BMD) by the initial heat treatment in the semiconductor device manufacturing process. When BMD is present in the device active layer, it causes electrical leakage in the device, causing device failure, which is not desirable.

In order to remove the BMD of the device active layer, the following measures are generally taken. That is, the wafer is subjected to high temperature heat treatment in an inert atmosphere such as hydrogen or Ar to remove outward diffusion of oxygen in the surface layer, or the silane-based gas is subjected to reduction treatment in a hydrogen atmosphere to form an epitaxial layer on the wafer surface. Of. These heat treatments are usually 1
It is performed at a high temperature of 100 to 1300 ° C. This is because the diffusion rate of oxygen moving in the silicon crystal is very low.

However, the silicon crystal has a temperature of 1000 ° C.
At the above high temperatures, plastic deformation is likely to occur. Therefore, when a large temperature distribution difference occurs in the wafer surface during heating at a high temperature, plastic deformation (slip transition of silicon crystal composition) occurs, and as a result, slip defects occur. For example, the average temperature of the wafer is 1200 ° C
In this case, slip defects may occur even if the temperature difference between the central part and the peripheral part of the wafer is several degrees centigrade.

[0008]

Generally, the diameter is 150 m.
A horizontal furnace is used for heat treatment of wafers having a diameter of less than m (6 inches), and a vertical furnace is used for wafers having a diameter of 150 mm and 200 mm (8 inches) or more. A heater made of metal is used to heat these furnaces, and a type of heating the entire inside of the furnace is adopted.

On the other hand, it is convenient to use a single-wafer type apparatus when a high temperature treatment of several hundreds of degrees Celsius or more is performed in a short time. The single-wafer type apparatus is configured to accurately control the temperature of one wafer using a lamp or the like, reduce the heat capacity in the furnace as much as possible, and perform high-speed heating / cooling.

The temperature difference in the wafer surface is greatest when the temperature of the wafer is increased or decreased, particularly when the temperature is increased.
As one method to prevent the slip defect of the wafer,
There is a heating method in which the temperature is slowly raised in a form close to the equilibrium state. The method of slowly raising the temperature is suitable for a large-scale furnace in which a large number of wafers are processed. However, with this method,
Since the process step time becomes long, the productivity could not be improved to some extent.

On the other hand, in the single-wafer type apparatus, it is possible to prevent slip defects by supplying an optimum amount of heat to one wafer and optimally controlling the temperature distribution in the plane of the wafer. However, in the single-wafer type device, since the number of processed sheets is small, the productivity could not be sufficiently improved.

In view of the above-mentioned problems of the prior art, the present invention provides a silicon wafer having a DZ layer which is a defect-free layer and substantially free of slip defects, and such a silicon wafer can be manufactured efficiently and at low cost. It is an object of the present invention to provide a manufacturing method for manufacturing in.

[0013]

The first invention of the present application uses a wafer formed of a single crystal silicon ingot, and
15-1000 ° C / in the temperature range of 0-1000 ° C
an initial temperature raising step of raising the temperature at a temperature raising rate of min;
The gist is a method for manufacturing a silicon wafer, which is characterized in that a gradual temperature raising step of slowly raising the temperature in the temperature range of 1300 ° C. to 1300 ° C. and a stay holding step of allowing the temperature to stay in the temperature range of 1100 ° C. to 1300 ° C. for 5 minutes or more are performed.

In the second invention of the present application, a defect-free layer (DZ layer) having a density of oxygen precipitates (BMD) of 20 nm or more in a silicon wafer manufactured by the above manufacturing method is 10 ³ pieces / cm ³ or less. The gist is a silicon wafer having a thickness of at least 3 μm or more formed on the surface of the wafer.

[0015]

EXAMPLE FIG. 1 is a graph showing a slip defect generation region when there is a temperature difference in a silicon wafer. In FIG. 1, the horizontal axis represents the average temperature of the wafer. The slip occurring area is shown above the curve. The present inventors have found that the probability of slip occurrence increases when the temperature distribution in the wafer is in the slip occurrence region of FIG.

As can be seen from FIG. 1, slip defects are 1
If it exceeds 000 ° C., it is likely to occur rapidly, and slip defects will occur even if the temperature difference in the wafer is small. Therefore, if the temperature exceeds 1000 ° C, it is necessary to more strictly control the temperature of the wafer.

In consideration of such slip defect generation characteristics, in the method of the present invention, the heat treatment for forming the defect-free layer (DZ layer) on the device active layer portion of the silicon wafer is performed by the following method. That is, an initial temperature raising step with a temperature raising rate of 15 to 100 ° C./min is performed in the temperature range of 800 to 1000 ° C., and a slow temperature raising step of raising the temperature at a low speed is performed in the temperature range of 1000 to 1300 ° C. The stay-holding step is performed in which the material is allowed to stay for 5 minutes or more in the temperature range of 1300 ° C.

The slow slow temperature raising step is preferably 0.5 to
The heating rate is 10 ° C./min. A more desirable gradual temperature increase rate is 1 to 5 ° C / min.

If the rate of temperature rise is less than 0.5 ° C./min, the heat treatment requires a lot of time, resulting in high cost. Further, when the temperature rising rate exceeds 10 ° C./min, the temperature difference in the wafer surface becomes large, so that the occurrence of slip defects cannot be reliably prevented.

When the initial temperature raising step is performed at a rate of less than 15 ° C./min, fine nuclei (embryos) causing crystal defects inside the wafer grow, BMD formation increases, and a good defect-free layer is formed. This is because it will not be formed.

At a rate of 100 ° C./min or more in the initial temperature raising step, the thermal stress applied to the wafer becomes large and it is not practical.

The reason why the stay holding step is carried out at 1100 to 1300 ° C. is that if the temperature is lower than this range, the outward diffusion efficiency of oxygen is poor and a good defect-free layer cannot be formed. Also, if the temperature exceeds this temperature range, the BM inside the wafer
D grows excessively and the mechanical strength of the wafer deteriorates.

These heat treatments are preferably performed in an atmosphere containing at least one of hydrogen, He and Ar.

By performing the above heat treatment, a defect-free layer having a thickness of at least 3 μm and an oxygen precipitate (BMD) density of 10 ³ pieces / cm ³ or less, that is, a DZ layer is formed on the wafer surface. You can If the thickness of the DZ layer is less than 3 μm, a defect such as a leak may occur in the device process, and a high quality silicon wafer cannot be obtained.

The upper limit of the thickness of the DZ layer is about 30 μm. If the thickness of the DZ layer exceeds this, problems such as a poor gettering effect exerted on the DZ layer by the BMD layer formed inside the wafer occur.

It is also possible to form the BMD layer inside the silicon wafer by the heat treatment. BM
The D layer is a layer containing an oxygen precipitate and having an intrinsic gettering (IG) effect. In order to form a BMD layer having the IG effect, the oxygen concentration ([0 _i ]) in the crystal of a wafer obtained by slicing a single crystal silicon ingot is 1.2 to 1.8 × 10 ¹⁸ atoms /
It is preferably cm ³ .

FIG. 2 is an explanatory view showing an example of the heat treatment step of the method of the present invention. The temperature rising rate from the furnace charging temperature T1 ° C. to 1000 ° C. is shown by the temperature rising rate 1. The heating process from 1000 ° C. to 1200 ° C. is shown by the heating rate 2. The stay-holding step after heating is shown as heat treatment.

A silicon wafer was actually manufactured by the method of the present invention. Further, as a comparative example, a silicon wafer was manufactured by partially changing the heat treatment conditions and compared with the example.

First, single crystal silicon ingots were pulled under different pulling conditions and sliced to obtain average oxygen contents of 1.3 × 10 ¹⁸ , 1.5 × 10 ¹⁸ , 1.7 × 10 ^18.
Atoms / cm ³ silicon wafer (W-
A, WB, and WC) were formed.

The heat treatments shown in Table 1 were applied to these wafers. HT01 to HT10 are comparative examples, and HT
11 to 11 are examples of the present invention.

HT01 to HT05 are comparative examples in which the rate of temperature increase was not changed and the rate of temperature increase was kept constant in the range of 30 to 2 ° C./min.

For HT06 and HT07, the heating rate 1 after the furnace was put in was set to 30 ° C./min, and the heating rate 2 thereafter was set to 2
This is a comparative example in which the temperature is lowered to 0 and 15 ° C / min.

The HT08 uses H _{2 as} the processing atmosphere of the HT07.
This is a comparative example in which the atmosphere is changed to an Ar atmosphere.

HT09 sets the heating rate 1 of HT10 to 30
It is a comparative example in the case of increasing from 40 ° C / min to 40 ° C / min.

HT11 to HT13 have a furnace charging temperature of 60.
This is an example when the temperature is changed to 0, 700, and 800 ° C.

HT14 to HT18 set the heating rate 2 of HT12 to 0.5, 1, 5, 10 and 15 ° C./min, respectively.
It is an example in the case of increasing.

HT19 to HT22 are examples when the temperature rising rate 1 of the HT12 is increased to 20, 50, 60 and 80 ° C./min, respectively.

HT23 to HT26 have the processing temperatures of HT12 of 1100, 1150, 1250 and 1290, respectively.
This is an example when the temperature is raised to ℃.

HT27 and HT28 are examples when the processing atmosphere gas is changed from H ₂ to Ar or He.

HT29 to HT33 are examples when the heat treatment is performed in a binary or ternary gas atmosphere of H ₂ , Ar and He.

The wafers to be heat treated are WA, WB, W-
The results in the case of C are shown in Tables 2 to 4, respectively. Table 2
As can be seen from Table 4, even if the oxygen concentration of the wafer was changed, there was almost no change in the thickness of the DZ layer and the occurrence of slip. Further, in all the examples, the DZ layer was formed to have a thickness of 3 μm or more.

Even when the furnace temperature was set to 600 to 800 ° C., slip defects did not occur (HT11 to HT).
13).

The temperature rising rate up to 1000 ° C. is 30 ° C./mi
Even if it increases with n, by slowing the temperature rising rate after that,
It was possible to prevent the occurrence of slip defects (HT14 to HT1
8).

The temperature rising rate up to 1000 ° C. is 20 ° C./mi
Even if the temperature was increased from n to 80 ° C./min, slip defects did not occur or slightly occurred (HT1
9-HT22).

In Tables 2 to 4, the degree of occurrence of slip is "small", specifically, JIS H0609-1994.
In the slip of the wafer observed by the method described in "Method of observing crystal defects of silicon by selective etching", when there is one slip occurrence point and the number of slips is 10 or less, "medium" means Similarly, if the number of occurrence points is more than 10 at one location or if there are multiple occurrence points and the total is 50 or less, "Large" means that there are multiple occurrence points and the total exceeds 50. If
Means

When the heat treatment rate was changed from 1100 ° C. to 1290 ° C., the higher the temperature, the larger the DZ layer thickness. On the other hand, slips are more likely to occur as the temperature rises, but only slightly (HT23).
~ HT26).

The atmosphere gas is H ₂ alone, He, Ar
Also, even in a mixed atmosphere of H ₂ , He, and Ar, the DZ layer was formed as in the case of the H ₂ single atmosphere, and slip did not occur (HT27 to HT33).

Even when the treatment time was changed from 5 minutes to 240 minutes, slip defects did not occur and only the thickness of the DZ layer was increased (HT34 to HT38).

As is clear from the above examples, according to the method of the present invention, it is possible to manufacture a high-quality silicon wafer having a DZ layer having a thickness of 3 μm or more on the surface of the wafer and having substantially no slip defects. Is possible.

The method of the present invention can also be applied to a silicon wafer manufactured by the FZ (float zone) method having a relatively low oxygen content. In that case,
The oxygen concentration on the wafer surface can be further reduced to form a DZ layer, and the wafer surface can be modified.

[0051]

[Table 1]

[0052]

[Table 2]

[0053]

[Table 3]

[0054]

[Table 4]

[0055]

According to the present invention, a silicon wafer having a DZ layer which is a defect-free layer and substantially free of slip defects can be efficiently manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a graph for explaining a relationship between a temperature difference inside a wafer and a slip generation region in the present invention.

FIG. 2 is an explanatory view for explaining a method for manufacturing a silicon wafer of the present invention.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Jun Yoshikawa 30 Soya, Hadano City, Kanagawa Prefecture Toshiba Ceramics Co., Ltd.Development Research Laboratory (72) Inventor Katsuhiro Chaki 30 Soya, Hadano City, Kanagawa Prefecture Toshiba Ceramics Co. In-house

Claims (5)

[Claims] 1. A wafer formed from a single crystal silicon ingot, an initial temperature raising step of heating at a temperature raising rate of 15 to 1000 ° C./min in a temperature range of 800 to 1000 ° C., and a temperature of 1000 to 1300 ° C. A method for producing a silicon wafer, which comprises performing a gradual temperature raising step of raising the temperature at a low speed in the range and a stay holding step of allowing the temperature to stay in the temperature range of 1100 to 1300 ° C. for 5 minutes or more. 2. The temperature raising rate in the gradual temperature raising step is 0.5 to 10 ° C.
/ Min It sets, The manufacturing method of Claim 1 characterized by the above-mentioned. 3. The temperature raising rate of the gradual temperature raising step is 1 to 5 ° C./mi.
n is set, The manufacturing method of Claim 1 characterized by the above-mentioned. 4. The initial temperature raising step, the gradual temperature raising step and the stay holding step are performed in an atmosphere consisting of at least one of hydrogen, He and Ar.
A method for manufacturing a silicon wafer according to item. 5. A silicon wafer manufactured by the manufacturing method according to claim 1, wherein a defect-free layer (DZ layer) having an oxygen precipitate (BMD) density of 20 nm or more is 10 ³ pieces / cm ³ or less. Is formed on the surface of the wafer with a thickness of at least 3 μm.