JPH0787447A - Recorder, reproducing device and tape medium for digital video signal - Google Patents

Abstract

PURPOSE:To easily confirm the content of a picture at search reproduction in a VTR for a digital video signal. CONSTITUTION:A video signal converted into a digital signal by an A/D converter 10 is subject to DCT and zigzag scanning by an orthogonal transformation circuit. A data string after scanning is demultiplexed into an even numbered data string and an odd numbered data string by a demultiplexer circuit 14 and subjected to code processing by coding circuits 16, 18. Then a data string including a DC component at the orthogonal transformation is recorded in a lower area of a track by rearrangement by a rearrangement circuit 20 and inverse arrangement and decoding to that at recording are executed at searching. Data are multiplexed by utilizing the data string including the DC component in a multiplexer circuit 40. The reproduced picture is made up of a few number of frames.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a helical scan type digital video signal recording apparatus, a reproducing apparatus, and a tape medium for recording or reproducing a digital video signal on a video tape, and more specifically, to a tape medium. The present invention relates to improvement of image reproduction at the time of search in which reproduction is performed faster than normal reproduction.

[0002]

2. Description of the Related Art In a consumer digital VTR of a helical scan type, a cassette size (tape length) is determined in consideration of not only image quality but also recording time length and ease of handling. Must be
For this reason, a cassette size smaller than the new VTR standard tends to be selected. At the same time, the entire apparatus is required to be downsized, so that the drum can be downsized and the tape can be narrowed.

On the other hand, when the signal is handled from analog to digital, the signal band that must be recorded or reproduced must be several times to several tens of times (for example, "Digital recording technology", published by Nikkan Kogyo Shimbun, P5. See P6).

Under these circumstances, it has been considered to compress and decompress image information by using a high-efficiency coding and decoding technique to record and reproduce the image information, and one frame of image information is recorded on a plurality of tracks. A method of recording separately is considered.

By the way, when the image information of one frame is divided into a number of tracks and recorded, when special reproduction such as search is performed, the image information of many frames are mixed in the reproduced image of one frame. As a result, the image quality deteriorates and it becomes difficult to understand the contents of the screen.

For example, as shown in FIG. 11A, an image P is divided into upper and lower parts. Then, as shown in FIG. 7B, the video signal of PA corresponding to the upper half of the image P is recorded on the A track of the video tape T by the A head HA. The video signal of PB corresponding to the lower half of the image P is recorded on the B track of the video tape T by the B head HB. However, the A head HA and the B head HB have opposite azimuths. The video signal of the 0th frame is track A0,
It is recorded separately in B0. The video signal of the first frame is divided and recorded on tracks A1 and B1. The same applies to the third and subsequent frames.

In this way, a head locus when a search and reproduction are performed at a double speed and a range in which a video signal can be effectively reproduced are shown for a video tape in which image information of one frame is divided into two tracks and recorded. , As shown in FIG. It should be noted that the effective reproduction range is a portion reproduced at a level larger than ½ of the maximum level of the reproduction signal.

As shown in the figure, the head HA, which started tracing from the track A0, crosses the track B0 and ends the tracing at the track A1. Similarly, the head HB, which started tracing from the track B0, moves to the track A1.
Traverse and end the trace on track B1. Here, since the heads HA and HB have mutually opposite azimuths, the head HA can take out the video signals of the track A and the head HB can take out the video signals of the track B with good S / N. Therefore, the video signal in the hatched area in the figure is extracted.

Track A by the above heads HA, HB
When an image is composed of the portion reproduced by the reproduction operation from 0 to B1, it becomes as shown in FIG. SA to S in the figure
D corresponds to the shaded areas SA to SD in FIG. 12, respectively.

Similarly, the head HA, which has started tracing from the track A2, crosses the track B2 and crosses the track A3.
Ends the trace with. Similarly, the head HB that started tracing from the track B2 crosses the track A3 and ends the tracing at the track B3. Also in this case, the video signal in the hatched area is extracted due to the azimuth relationship.

Track A by the above heads HA, HB
When the image is composed of the portion reproduced by the reproduction operation from 2 to B3, it becomes as shown in FIG. 13 (B). SE to S in the figure
H corresponds to the shaded portions SE to SH in FIG. 12, respectively.

As shown in FIGS. 13A and 13B, the middle portion of the upper and lower divided areas is not reproduced. Therefore, no matter how many times tracing is performed, the image of one frame cannot be reproduced, and the image cannot be updated at the same position on the screen at all times. FIG. 3C shows an image composed of a video signal reproduced by each one-time tracing by the heads HA and HB of 3 × speed. As shown in the figure, when the search speed is increased by an integer multiple speed, images of a larger number of frames are mixed, and in this case as well, images in a range of about 1/2 of the entire screen are not updated.

Next, the head locus at the time of searching and reproducing at 2.5 times speed and the range in which the video signal can be effectively reproduced on the video tape recorded as shown in FIG. It looks like 14. As shown in the figure, the head HA that started tracing from the track A0 crosses the tracks B0 and A1 and ends the tracing at the track B1. Similarly, the head HB that started tracing from the track B0 crosses the tracks A1 and B1 and ends the tracing at the track A2.

The video signal reproduced by these traces is indicated by the hatched line S in the figure because of the relationship of the head azimuth.
It is a part of I to SL, and when an image is composed of these parts, it becomes as shown in FIG.

Similarly, the head HA that started tracing from the track B2 crosses the tracks A3 and B3 and ends the tracing at the track A4. The head HB, which started the tracing from the track A3, crosses the tracks B3 and A4 and ends the tracing at the track B4.

The video signal reproduced by these traces is indicated by the hatched line S in the figure from the relationship of the head azimuth.
It is a portion of M to SP, and when an image is composed of these portions, it becomes as shown in FIG.

As shown in FIGS. 15 (A) and 15 (B), in this case as well, there is a region which is not reproduced. However, when combining the images obtained by the two traces,
As shown in FIG. 7C, the image of one frame can be reproduced for the time being. However, the images from the 0th frame to the 4th frame are mixed. in this way,
If the search is performed at (integer + 1/2) times speed, the image is updated on the entire screen, but as the search speed is increased, the images of a larger number of frames are mixed, and the content confirmation becomes difficult. .

The present invention focuses on these points,
It is an object of the present invention to provide a digital video signal recording apparatus, a reproducing apparatus, and a tape medium that can easily confirm the content of an image during special reproduction such as search.

[0019]

In order to achieve the above object, a first aspect of the present invention is a digital video signal recording apparatus for recording one unit of image information by dividing it into a plurality of tracks of a tape medium and digitizing it. An orthogonal transformation unit that performs multidimensional orthogonal transformation on the generated video signal and scans the transformed data in a predetermined order to obtain a data sequence, and the data sequence obtained by this into at least two data sequences. Separation means for separating, coding means for performing coding processing for data compression and error correction for each data string separated thereby, and the lowest in orthogonal transform of the data string after coding by this means. A first rearrangement for rearranging the data strings corresponding to the track scan of the recording head so that the data strings including the order data are located in a predetermined area of the track. Characterized by comprising a means.

According to a second aspect of the present invention, in the recording apparatus, the separating means separates the data string obtained by the orthogonal transforming means into at least two data strings, and at least two of these data strings are orthogonal to each other. It is characterized in that processing for including the lowest order data in the conversion is performed.

In a third aspect of the present invention, in the digital video signal reproducing apparatus for reproducing the digital video signal recorded on the tape medium by the recording apparatus, the data string read from the tape medium by the reproducing head is arranged in the first arrangement. For the second rearrangement means for performing rearrangement by performing the reverse processing of the rearrangement means, and for the data string rearranged by this second rearrangement means,
A correction / decoding means for performing error correction and decoding processing, a synthesizing means for mixing using a data string containing the lowest order data by a method opposite to the separating method by the separating means, and processing by the orthogonal transforming means. It is characterized in that it is provided with an orthogonal inverse transform means for performing an inverse process.

A fourth invention is a tape medium in which a digital video signal is recorded by a helical scan method by the recording device.

[0023]

According to the present invention, for digital video signals,
For example, DCT and zigzag scanning of coefficient data after conversion are performed. Then, the scanned data string is separated into, for example, an even-numbered data string and an odd-numbered data string, and after separation, encoding for data compression and error correction is performed for each data string. Then, the data is rearranged so that the even-numbered data string including the DC component, which is the lowest order data of the DCT, is located in the lower area of the track, and the digital video signal is recorded on the tape medium. At the time of search, data synthesis is performed using the data string including the DC component,
After that, inverse DCT conversion is performed to obtain a reproduction signal. The reproduced image is composed of images of a small number of frames.

[0024]

Embodiments of a digital video signal recording apparatus, a reproducing apparatus, and a tape medium according to the present invention will be described below in detail with reference to the accompanying drawings. The same reference numerals are used for the same components as those of the above-described conventional technique or components corresponding to the conventional technique.

<First Embodiment> First, a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows the circuit configuration of the first embodiment. In the figure, first, the structure on the recording side will be described. An orthogonal conversion circuit 12 is connected to the output side of an A / D converter 10 to which an analog video signal is supplied, and an output side of this circuit is separated. The circuit 14 is connected. The output side of the separation circuit 14 is connected to the variable length coding circuits 16A and 16B, respectively, and the output side of each of these circuits is connected to the error correction coding circuits 18A and 18B, respectively.

Next, the error correction coding circuits 18A and 18B
The output side of each is connected to the rearrangement circuit 20, and the recording encoding circuit 22, the amplifier 24, and the recording heads 26A and 26B are sequentially connected to the output side of this circuit.

Next, the structure of the reproducing side will be described. An amplifier 30 and a data detection circuit 32 are connected in order to the output side of the reproducing heads 28A and 28B, and a rearrangement circuit 34 is provided to the output side of this circuit. Are connected. The output side of this rearrangement circuit 34 is connected to error correction circuits 36A and 36B, respectively, and these circuits are connected to variable length code decoding circuits 38A and 38B, respectively. The output sides of the variable length code decoding circuits 38A and 38B are
It is connected to the synthesizing circuit 40, and the output side of the mixing circuit 40 is sequentially connected to the quadrature inverse transform circuit 42 and the D / A converter 44.

FIG. 2 shows an example of a circuit from the orthogonal transformation circuit 12 to the variable length coding circuits 16A and 16B among the above-mentioned respective units. The orthogonal transformation circuit 12 uses the DCT
It is composed of a circuit 12A and a zigzag scan circuit 12B. The DCT circuit 12A has, for example, 8 × 8 = 6.
This is for orthogonally transforming video data of four pixels by a two-dimensional DCT. The zigzag scan circuit 12B is
This is for outputting the 64 pieces of transform coefficient data after the DCT transformation by zigzag scanning in the order shown in FIG.

Next, the separation circuit 14 is, for example, as shown in FIG.
The configuration is as shown in. In the figure, the output side of the orthogonal transformation circuit 12 described above is the FIF of the separation circuit 14.
They are connected to O (First In First Out) memories 70A and 70B, respectively. These FIFO memories 70A,
A control circuit 70C is connected to each of 70B,
The control circuit 70C controls writing and reading of data.

Each output side of the FIFO memories 70A and 70B is connected to one switching input side of the data addition switches 70D and 70E, respectively. Data "0" is supplied to the other switching input side of the data addition switches 70D and 70E, respectively.
The output side of D and 70E is the variable length coding circuit 16 described above.
A and 16B are respectively connected. The control circuit 70C is connected to the control sides of the data addition switches 70D and 70E, respectively, and the control circuit 70C also controls the switching of the data addition switches 70D and 70E. The control circuit 70C may be configured in common with the system control unit 56 shown in FIG.

Next, the operation of the separation circuit 14 will be described. Of the data strings of the DCT coefficients output from the zigzag scanning circuit 12B after being zigzag scanned,
The first 0th data D (0) is stored in the FIFO memory 70.
It is written in one of A and 70B, for example, 70A.
The next first data D (1) is the FIFO memory 70B.
Written in. Below, D (2), D (3), D
(4), ... Similarly, the FIFO memory 70
It is written alternately in A and 70B. That is, the FIFO
An even number data string is stored in the memory 70A, and the FIFO
An odd number data string is stored in the memory 70B.

Next, in this way, the FIFO memory 70
The data strings separated by A and 70B are supplied to the data addition switches 70D and 70E, respectively. In these switches, the data of the coefficient value "0" is added to the 33rd to 64th positions of each of the 32 separated data strings. Therefore, if the above-mentioned processing is performed when the plurality of data from the 1st to the 64th is data other than "0", 1
Data other than "0" exists only from the 32nd to the 32nd, and two sets of data strings in which the number of data other than "0" is stochastically ½ of that before processing are obtained.

Next, returning to FIG. 2, the variable length coding circuit 1
6A and 16B are quantizers 50A and 50B, code amount control circuits 52A and 52B, and a two-dimensional Huffman coding circuit 54.
It is composed of A and 54B. Of these, the quantizers 50A and 50B are code amount control circuits 52A and 52B.
This is for quantizing the input data with the roughness set based on the code amount control by B. The two-dimensional Huffman coding circuits 54A and 54B use the coefficient value “0” of the input data.
This is for performing code assignment in consideration of the appearance frequency for C (m, n) in which a number m (run length) following and a non-zero coefficient n subsequent thereto are paired. In addition,
In order to control the operation of each circuit described above, the system control unit 5
6 is provided.

Next, the error correction coding circuits 18A and 18B
In the above, the two sets of two-dimensional Huffman-encoded data are each subjected to encoding for error correction (for example, Reed-Solomon encoding).

Next, in the rearrangement circuit 20, even-numbered data strings (separated data strings including data with even numbers in FIG. 3) supplied from the error correction coding circuits 18A and 18B, and odd-numbered data strings, respectively. This circuit is for alternately rearranging and outputting the No. data string (separated data string including data with odd number in the figure).

Next, the recording / coding circuit 22 is adapted to perform coding (for example, I-NRZI) for recording the rearranged error-correction-coded data on a video tape. The final encoded data, after being amplified by the amplifier 24, is sequentially supplied to the recording heads 26A and 26B through appropriate switching output means (not shown).

Next, the reproducing side will be described. The data reproduced by the reproducing heads 28A and 28B from the video tape T is amplified by the amplifier 30 via an appropriate switching output means (not shown). There is. The data detection circuit 32 is for detecting (extracting) data related to the image, which is obtained by removing the sync signal and the control signal from the reproduction signal.

The rearrangement circuit 34 is for performing data rearrangement processing which is the reverse of the rearrangement circuit 20 on the recording side. The error correction circuits 36A and 36B are for performing error detection and correction for input data, and the variable length code decoding circuits 38A and 38B are for performing processing of decoding variable length codes.

The synthesizing circuit 40 has a structure as shown in FIG. 4, for example, the output side of the variable length code decoding circuit 38A is connected to the mixing circuit 40A, and the output of the variable length code decoding circuit 38B. The side is connected to the switching input side of the data addition switch 40B. Data "0" is input to the other switching input side of the switch 40B, and the output side is connected to the other input side of the mixing circuit 40A.
The mixing circuit 40A is for performing a process opposite to that of the separation circuit 14 on the recording side, and the data addition switch 40B.
Is for adding data "0" at the time of searching an odd numbered data string, and the switching is performed based on a search instruction. It should be noted that the synthesizing circuit 40 shown in the figure may use a memory means as in the separating circuit 14 if necessary.

The orthogonal inverse transform circuit 42 is for performing an inverse orthogonal transform process which is the inverse of DCT, and the digital video signal decoded by this is converted into an analog video signal by the D / A converter 44. It is supposed to be done.

Next, the overall operation of the embodiment configured as described above will be described. a, Normal Recording Operation First, the normal recording operation will be described. The analog video signal is input to the A / D converter 10 where it is converted into a digital video signal. Then, after that, it is supplied to the DCT circuit 12A of the orthogonal transformation circuit 12 and the DCT circuit 12A
Processing is performed. The coefficient data after conversion is supplied to the zigzag scan circuit 12B. Then, scanning is performed in the order shown in FIG. 3 and serially output. Figure 5
A data string D (n) after scanning is shown in (A). n is a number indicating the order of scanning.

The coefficient data after the zigzag scan is input to the separation circuit 14, where it is separated into an even-numbered data string and an odd-numbered data string. FIG. 5B shows even-numbered data strings, and FIG. 5C shows odd-numbered data strings. Further, the data of the coefficient value "0" is added to the 33rd to 64th positions in each data string.

The even-numbered and odd-numbered coefficient data strings separated in this way are respectively encoded by the variable-length coding circuit 16.
It is supplied to A and 16B, and variable length coding processing is performed. The encoded data is further encoded by the error correction encoding circuits 18A and 18B for error correction, and the rearrangement circuit 20 performs rearrangement processing.

This rearrangement processing will be described next. In this embodiment, as described above, one frame image is divided into upper and lower images PA and PB, and information is recorded on different tracks on the tape. That is, the information of one frame is divided into two tracks and recorded. Further, in this embodiment, as shown in FIG. 7, the DC component in the DCT coefficient (the 0th data D in FIG.
An even numbered data string including (0) is recorded, and an odd numbered data string is recorded in the upper VH area. Therefore, the rearrangement circuit 2
At 0, the input data string is rearranged and output as shown in FIG.

The rearranged data is encoded by the recording / encoding circuit 22 for recording and amplified by the amplifier 24, and then the recording heads 26A, 2A.
6B are alternately supplied and recorded on the video tape T.
That is, as shown in FIG. 7, the upper image P of the 0th frame
The even numbered data sequence of A is recorded in the area VL of the track A0, and the odd numbered data sequence is recorded in the area VH of the track A0. Further, the even numbered data strings of the lower image PB of the 0th frame are recorded in the area VL of the track B0, and the odd numbered data strings are recorded in the area VH of the track B0. The same applies to the first and subsequent frames.

B, Normal Reproducing Operation Next, the normal reproducing operation will be described. The data reproduced by the reproducing heads 28A and 28B from the video tape T is amplified by the amplifier 30, and then the data detecting circuit 32 is detected.
The data related to the image except for the synchronization signal and the control signal is detected. Then, the rearrangement circuit 34 performs a process reverse to that of the recording side rearrangement circuit 20, and outputs the even-numbered data string to the error correction circuit 36A side and the odd-numbered data string to the error correction circuit 63B side. .

Thereafter, error detection and correction by the error correction circuits 36A and 36B, a variable length code decoding circuit 38A,
After the decoding by 38B is performed in order, the synthesizing process by the synthesizing circuit 40 is performed. In the case of this normal reproduction, the data addition switch 40B is the variable length code decoding circuit 38B.
Since it is switched to the side, the mixing circuit 40A performs a process opposite to that of the separation circuit 14 on the recording side. The combined data string is decoded by the orthogonal inverse transform circuit 42 by performing an inverse orthogonal transform process that is the inverse of DCT. Further, the decoded digital video signal is converted into an analog video signal by the D / A converter 44. In this way, the data is decoded and the video signal is reproduced.

C, Operation During Search Next, the operation during search reproduction will be described. It is assumed that the video tape T on which the signal is recorded as shown in FIG. 7 is searched at 2.5 times speed. In this case, the reproducible range is the same as that shown in FIG. 14, and is the range shown by SI to SP.

In this embodiment, at the time of this search, only the even-numbered data sequence reproduced from the VL area of each track is used, and the processing is performed as if the data "0" was reproduced from the VH area. Specifically, at the time of search, the data addition switch 40 of the synthesis circuit 40 is based on the search instruction.
B is switched to the data "0" side. Therefore, in the mixing circuit 40A, the even-numbered data string shown in FIG.
A "0" data string is input, and these are alternately arranged and mixed as shown in FIG. As a result, the data string after mixing is, as shown in FIG.
This means that the odd-numbered data has been replaced with the data "0".

The orthogonal inverse transform circuit 42 performs orthogonal inverse transform on such a data string. Then, block distortion occurs because the odd-numbered data string is set to "0", but the contents can be confirmed because the even-numbered data string includes the DC component D (0) that is the lowest order data of the DCT. An image of about the same quality can be obtained.

When this is viewed on the reproduction screen, it becomes as shown in FIG. As described above, in this embodiment, the data in the lower VL area of each track is used, and the data in the upper VH area is discarded and not used. Therefore, FIG.
4, the area reproduced from tracks A0 to B1 is S
Only I and SK. This is shown on the screen in FIG.
It becomes like (A). Next, the areas reproduced from the tracks A3 to B4 are only SM and SO. This is shown on the screen as shown in FIG.

Therefore, when they are synthesized, FIG.
An image of one frame as shown in is obtained. As is clear from a comparison between this figure and FIG. 15 (C), the number of frames of images mixed in one frame image is 2 frames even though the same 2.5 times speed. Significantly less than technology. As described above, according to this embodiment, it is possible to easily confirm the content of the image during the 2.5 × speed search.

<Second Embodiment> Next, a second embodiment of the present invention will be described with reference to FIGS. According to the above-described first embodiment, in the case of a search of (integer + 1/2) times speed, a reproduced image whose contents can be easily confirmed can be obtained. However, at the integer multiple speed, a part of the screen that is not updated still occurs, and the contents cannot be confirmed well. Second
In the embodiment, the contents can be easily confirmed even in the case of such an integer multiple speed search.

First, the recording side will be described. The basic structure is the same as that of the first embodiment. However, FIG. 9 (A)
In the separation circuit 14 on the recording side in the present embodiment shown in
Of the DCT coefficient data string that has been zigzag scanned,
The first 0th data D (0) (DC component) is written in both the FIFO memories 70A and 70B. On the other hand, the second and subsequent data D (1), D (2), ...
Are alternately written to the FIFO memories 70A and 70B. For example, the data D (1) is stored in the FIFO memory 70B.
The data D (2) is stored in the FIFO memory 70A, the data D (3) is stored in the FIFO memory 70B, and so on.

That is, the even numbered data sequence is stored in the FIFO memory 70A, and the direct current component + odd numbered data sequence is stored in the FIFO memory 70B. As described above, the DC component D (0) is basically the same as that of the first embodiment.
Separation processing is performed so that is included in any of the data strings. To the separated data string, "0" data is added by the data addition switches 70D and 70E as in the first embodiment. Subsequent processing on the recording side is
This is similar to the first embodiment.

Next, the reproducing side will be described. In the synthesizing circuit 72, the output sides of the variable length code decoding circuits 38A and 38B of the synthesizing circuit 72 are connected to one of the data addition switches 72A and 72B. Each of them is connected to the switching input side, and data "0" is input to the other switching input side. These data addition switches 72A, 72B
The control side of is connected to the control circuit 72C, so that switching control is performed. The output side of the data addition switches 72A and 72B is a mixing circuit 72.
Connected to D. Note that this synthesizing circuit 72 may also use a memory means similarly to the separating circuit 14 of FIG.

Next, the operation during normal reproduction is performed by the synthesizing circuit 72.
Of the data addition switches 72A and 72B of the control circuit 72
The operation is switched to the variable length code decoding circuits 38A and 38B by C, and the same operation as in the first embodiment is performed.

Next, the operation at the time of search will be described.
For example, the case of double speed search will be described. In this case, the reproducible range is the same as that shown in FIG.
The range is indicated by SH.

In this embodiment, at the time of this search, when an even numbered data string is reproduced from the VL area of each track, it is processed as if data "0" was reproduced from the VH area, and vice versa. When the direct current component + odd number data string is reproduced from the VH area of each track, it is processed as if data "0" was reproduced from the VL area.

Specifically, when reproducing an even-numbered data string,
The control circuit 72C of the synthesis circuit 72 switches the data addition switch 72B to the data "0" side. Therefore, the even-numbered data string and the “0” data string are input to the mixing circuit 72D, and these are arranged alternately and mixed. On the other hand, when reproducing the direct current component + odd number data string, the control circuit 72C of the synthesizing circuit 72 switches the data addition switch 72A to the data “0” side. Therefore, the direct current component + odd number data string and the “0” data string are input to the mixing circuit 72D, and these are arranged alternately and mixed.

A reproduction screen synthesized based on these mixed data is as shown in FIG. This screen
13 is a reproduction screen based on data in the areas SA to SD reproduced from tracks A0 to B1 in FIG. This figure and the above figure 1
As is clear from comparison with 3 (C), the number of frames of the image mixed in one frame image is 2 frames at the same double speed, which is smaller than in the prior art. .

As described above, according to the second embodiment, since the DC component of the orthogonal transform coefficient is included in each of the separated data strings, the contents can be easily confirmed even in the search at an integer multiple speed. Is obtained. Also in the case of (integer + 1/2) times the speed, it is possible to confirm the contents well by performing the same processing as in the first embodiment.

<Other Embodiments> The present invention is not limited to the above embodiments, and includes the following, for example. (1) In the above-described embodiment, the two-dimensional DCT with 8 × 8 pixels as a unit is used as the orthogonal transformation, but the number of pixels may be set appropriately or may be multidimensional. Also, another orthogonal transform method may be used. The same applies to methods such as variable length coding and error correction coding. The zigzag scanning method is not limited to that shown in FIG. 3, and any order may be used as long as the data can be serialized.

(2) In the above embodiment, the data strings are separated into two data strings having the same number of data, but it may be separated into a larger number of data strings as necessary. When the second embodiment is applied to this, it is not necessary to include the lowest order data in the orthogonal transformation in all the data strings, and if it is included in at least two data strings, an image that can be easily confirmed can be reproduced.

(3) For example, if the output side of the orthogonal transform circuit 12 of FIG. 1 is directly connected to the input side of the variable length coding circuit 16A, the same configuration as a general digital video signal recording apparatus is provided. Becomes If such a connection and the connection of FIG. 1 are switched by a switch, a plurality of operation modes such as a standard mode and a high image quality mode are provided, and one V
It is also possible to change the information amount of recording / reproducing data by TR.

The number of search operation modes may be appropriately set as necessary. For example, it is only 2x speed, 2x speed and 2.5x speed, etc. (4) In the above embodiment, the variable length coding is performed after adding the data of "0" in the separation circuit 14, but it is the same as the case of adding the data of "0" in the variable length encoder side. If the encoding process can be performed on the above, it is not necessary to add data at the time of separation. (4) In the above-described embodiment, the screen is divided into two, but may be divided appropriately as needed. Further, the area to be divided may be divided not only into upper and lower areas but also into appropriate areas.

[0067]

As described above, according to the recording device, the reproducing device, and the tape medium of the digital video signal according to the present invention, the data string after orthogonal transformation and scanning is separated into at least two data strings, and Since the search reproduction is performed using the data string that contains the lowest order data in the orthogonal transformation of the separated data strings, the reproduced image can be composed of images with a small number of frames, and it is easy to check the content during search. There is an effect that can be done.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a first embodiment of a digital video signal recording / reproducing circuit according to the present invention.

FIG. 2 is a circuit block diagram showing an example of a main part in the embodiment.

FIG. 3 is an explanatory diagram showing a state of zigzag scanning in the embodiment.

FIG. 4 is a circuit block diagram showing an example of a combining circuit in the embodiment.

FIG. 5 is an explanatory diagram showing how data strings are separated and combined in the embodiment.

FIG. 6 is an explanatory diagram showing how data strings are rearranged in the embodiment.

FIG. 7 is an explanatory diagram showing a data recording area on a video tape in the embodiment.

FIG. 8 is an explanatory diagram showing a reproduced image at the time of searching in the embodiment.

FIG. 9 is a circuit block diagram showing a main part of an embodiment of the present invention.

FIG. 10 is an explanatory diagram showing a reproduced image at the time of searching in the second embodiment.

FIG. 11 is an explanatory diagram showing a state of divided recording of an image.

FIG. 12 is an explanatory diagram showing a reproduction area during a search.

FIG. 13 is an explanatory diagram showing a state of a reproduced image during the search.

FIG. 14 is an explanatory diagram showing a reproduction area in another search.

FIG. 15 is an explanatory diagram showing a state of a reproduced image during the search.

[Description of Reference Signs] 10 ... A / D converter, 12 ... Orthogonal transformation circuit (orthogonal transformation means), 14 ... Separation circuit (separation means), 16A, 16B ...
Variable length coding circuit (coding means), 18A, 18B ... error correction coding circuit (coding means), 20, 34 ... rearrangement circuit (first rearrangement means, second rearrangement means),
22 ... Recording encoding circuit, 24, 30 ... Amplifier, 26A,
26B ... recording head, 28A, 28B ... reproducing head, 3
2 ... Data detection circuit, 36A, 36B ... Error correction circuit (correction decoding means), 38A, 38B ... Variable length code decoding circuit (correction decoding means), 40, 72 ... Synthesis circuit (synthesis means), 42 ... Orthogonal inverse transform circuit (orthogonal inverse transform means),
44 ... D / A converter, Am, Bm ... Track, D (n) ...
DCT conversion coefficient data, HA, HB ... Head, PA, P
B ... Divided image, SA to SP ... Play area, T ... Video tape (tape medium), VL, VH ... Divided recording area.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hironori Akasaka, 3-12 Moriya-cho, Kanagawa-ku, Kanagawa, Japan Victor Company of Japan, Ltd. (72) Masami Mori 3--12, Moriya-cho, Kanagawa-ku, Yokohama Address inside Victor Company of Japan, Ltd.

Claims (4)

[Claims] 1. A digital video signal recording apparatus for recording one unit of image information by dividing it into a plurality of tracks of a tape medium, and performing multidimensional orthogonal transformation on the digitized video signal, and transforming the digitized video signal. Orthogonal transformation means for scanning data in a predetermined order to obtain a data string, separation means for separating the data string obtained thereby into at least two data strings, and each data string separated by this means, Coding means for performing a coding process for data compression and error correction, and a data string including the lowest order data in orthogonal transformation of a data string after coding by this, so that it is located in a predetermined area of the track, Recording of a digital video signal, comprising first rearrangement means for rearranging a data string in response to a track scan of a recording head. apparatus. 2. The digital video signal recording apparatus according to claim 1, wherein the separating unit separates the data string obtained by the orthogonal transforming unit into at least two data strings and at least two of these data strings. A recording apparatus for a digital video signal, characterized by performing a process of including lowest order data in orthogonal transformation in a data string. 3. A digital video signal reproducing apparatus for reproducing a digital video signal recorded on a tape medium by the digital video signal recording apparatus according to claim 1 or 2, wherein data read from the tape medium by a reproducing head. Second reordering means for reordering the columns by performing a process reverse to that of the first reordering means, and correction decoding for performing error correction and decoding processing on the data sequence reordered by the second reordering means. Means, a synthesizing means for mixing the data sequence including the lowest order data by a method opposite to the separating method by the separating means, and an orthogonal inverse transforming means for performing a process reverse to the process by the orthogonal transforming means. A device for reproducing a digital video signal, which is characterized in that 4. A tape medium on which a digital video signal is recorded by a helical scan method by the digital video signal recording device according to claim 1.