JPH0782995B2 - Method for manufacturing semiconductor substrate - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate required for a high density semiconductor device.

2. Description of the Related Art So-called SOS and SOI are examples of substrates that are completely isolated. SOS is an epitaxial growth of silicon on a sapphire single crystal and has already been partially put into practical use. However, there are problems such as poor crystallinity due to the difference in lattice constant and autodoping of Al. As the SOI, various methods other than the above SOS have been proposed. For example, there has been proposed a method of irradiating an energy beam such as a laser or an electron beam to instantaneously melt and re-solidify only the surface layer to single-crystallize a polycrystal on an insulator. It continues. Although simple devices have been formed and evaluated, the quality of the underlying surface recrystallized layer is poor.
Distortion of crystal orientation, slip-like defects due to thermal strain, grain boundaries, etc. are observed [Editor: S. Furukawa, Silicon-on-Ins
ulator: HsTechnology and Application, KTK Suie.pub.
(1985)].

In addition, spinel was epitaxially grown on the Si substrate, followed by Si
A technique for further epitaxial growth has been reported, and quite good results have been reported, but strains and defects due to lattice mismatch are inevitable. [M.Ihara, et al, J. Ele
ctrochem.Sol, 129, 2569 (1982)].

There is also a technique of heteroepitaxially growing a fluoride such as CaF instead of spinel using an apparatus such as MBE and further growing Si, but again, there is a problem of lattice mismatch and another problem of twinning is large. It has been pointed out as a subject for consideration [H.
Ishiwara. Et al, APL, 40, 66 (1982)].

In addition to this, many various methods have been proposed, but all of them have the same problems as described above, and it is only SOS that is currently used and practically used for some special applications.

Problems to be Solved by the Invention As is apparent from the above description, in heteroepitaxial growth, lattice mismatch is basically a problem. However, in reality, the lattice constants do not match with a difference of 0.01% or less. Moreover, even with a very small difference of 0.01%,
This is a big difference from the viewpoint of epitaxial growth. That is, if 10,000 atoms arranged on the surface of the mother substrate are taken on a straight line, the length is only about 1 to 2 μm. At this time, if the same number of 10,000 epitaxially grown atoms are arranged corresponding to each one, they are shifted by one. Therefore, in order to successfully epitaxially grow the entire surface, this one difference must be absorbed. Therefore, minute defects and strains are introduced. When the epitaxial growth becomes thicker, strain accumulates, and conversely grows into large defects.

According to the present invention, strain due to lattice mismatch is unavoidable based on the above consideration, but by preventing the strain from being accumulated and becoming a defect, a good insulating silicon epitaxial growth film can be obtained. It is an object to provide a method for manufacturing a semiconductor substrate.

Means for Solving the Problems In order to solve the above problems, a method for manufacturing a semiconductor substrate according to the present invention comprises: a silicon mother substrate; and Al ₂ O _{3 having} a thickness of 300 Å or less.
A layer and an insulating layer in which multiple layers of a silicon buffer layer of the same material as the mother substrate and having a thickness of 350 Å or less are alternately formed, are formed by heteroepitaxial growth, and an active silicon epilayer is formed on the heteroepitaxial insulating layer. It is a thing.

Action According to the above configuration, the specific insulating layer having a thickness found by the inventors of the present invention, which is extremely thin, is composed of a plurality of layers. Therefore, by appropriately setting the layer thickness of each layer, the difference in lattice constant Energy can be prevented from being accumulated, problems such as grain boundaries, crystal defects, and twinning can be solved, and an insulating isolation silicon layer with extremely low defect density can be formed.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor substrate according to an embodiment of the present invention, in which 1 is a mother substrate, 2 is an insulating material layer, 3 is a buffer layer made of the same material as the mother substrate 1, 4 is an insulating layer, and 5 is an active epitaxial layer. It is a layer. In manufacturing this semiconductor substrate, the insulating material layer 2 is thinly epitaxially grown on the mother substrate 1, and then the buffer layer 3 is immediately epitaxially grown to prevent strain from being accumulated and partially relax it.
Next, an insulating material layer 2 and a buffer layer 3 are alternately formed in multiple layers to form an insulating layer 4, and finally a necessary active epi layer 5 is formed. The total thickness of the insulating material layer 2, or when the buffer layer 3 is also an insulating material, the thickness of the insulating layer 4 is set to the required insulation separation film thickness. In order to positively eliminate the strain, it is necessary that the unique lattice constants of the insulating material layer 2, the mother substrate 1 and the buffer layer 3 are close to each other. It is estimated that the layer thickness of each layer 2 and 3 has an optimum value, but experimentally, each layer may have a thickness of several hundred Å. Further, according to the above description, it can be said that the thickness is preferably changed according to the lattice mismatch amount. Alternatively, the insulating layer 4 may be formed in an island shape or a stripe shape on the mother substrate 1, and the active epi layer 5 may be formed thereon.

A basic atomic model of a semiconductor substrate is shown in FIG. The circles in the figure show the atomic arrangement in a staring manner. At the time of epitaxial growth, first, atoms 2a of the insulating material layer 2 start heteroepitaxial growth corresponding to the atoms 1a forming the mother substrate 1 immediately below the interface 6 of the mother substrate 1. It is generally considered that the atoms 2a of the first layer are formed in a one-to-one correspondence with the strain energy being inherent even if the lattice constants are slightly different. The next atomic layer is also formed correspondingly, but when it grows to a certain thickness, the accumulated energy exceeds the limit value to form the defect 7 and relax the strain. In FIG. 2, it is assumed that the lattice constant of the insulating material layer 2 is about 10% larger than that of the mother substrate 1. In the present embodiment, the buffer layer 3 is formed for stress relaxation as shown in FIG. 3 with a thickness (determined by the material, combination, and thermal conditions) at which this defect 7 does not occur. At this time, due to the arrangement of the atoms 3a in the first layer of the buffer layer 3, even if the defects 7 are formed, the atoms 3a are not grown unless they grow large.
By the bond with, the atom 2a moves as shown by the arrow 8 and leaves a vacancy behind. Therefore, epi growth continues to grow without defects. Continuing to grow in this way, on the contrary, one extra atom enters. Therefore, at this time, the insulating material layer 2 having a large lattice constant is formed to prevent the defect formation. By repeating this operation, the defect-free insulating layer 4 having a sufficient thickness can be formed. Moreover, the substantial lattice of this surface matches that of the mother substrate 1.
Therefore, the further epitaxial growth of the active epi layer 5 thereon is equivalent to the direct epitaxial growth on the mother substrate 1 without the insulating layer 4, and a good epi film can be formed. .

Next, specific examples will be described. An example in which Si is used as the mother substrate 1, Al ₂ O ₃ is used as the insulating material layer 2, and Si is also used as the active epi layer 5 and the buffer layer 3 by epi growth using an ionization type molecular beam epitaxy device as an example that is easy to compare with others. Will be described in detail below. Using a water-cooled E-gun as the Si source and the same E-gun as the Al source, a minute amount of O ₂ gas was introduced from the variable leak valve through a high-speed on / off check valve and mixed with the Al molecular beam. , I took an ion shower and made it ionize. Shutters are attached to the Si and Al ₂ O ₃ sources, respectively. First, after cleaning the (111) Si substrate, it was filled in the above-mentioned molecular beam epitaxy apparatus and irradiated with Si molecular beam at a slow rate of 0.6Å / S in the epi growth chamber while being heated to 800 ° C. It was cleaned. Next, while increasing the growth rate to about 4Å / S,
The substrate temperature was lowered to 700 ° C. During this time, the Si layer is about 2
00Å formed. The Si molecular beam was stopped by the shutter, the check valve and the Al shutter were opened, and the ionized beam composed of Al, O and its compound was irradiated. The formation speed is about 2Å / S. By opening and closing this shutter, layers were alternately formed, and finally a Si layer having a thickness of 1 μm was formed as the active epi layer 5. An Al ₂ O ₃ layer and a Si layer interposed between them were formed to a total thickness of about 0.3 μm. The layer thickness of the insulating layer 4 is 0.6 μm. The insulating material layer 2 was confirmed to be Al ₂ O ₃ by RHEED.

Through the above steps, epi-growth was performed while changing the thicknesses of the insulating material layer 2 made of the Al ₂ O ₃ layer and the buffer layer 3 made of the Si layer in various ways as shown in Table 1 below. Secc the obtained sample surface.
The solution was etched with a liquid and the defect density was measured. In addition, in the analysis by RHEED, all samples show clear (111) images,
It showed that a good epi film was growing.

When the buffer layer 3 is not provided at all like the samples No. 1 and 2 in Table 1 above, the defect density is extremely high. However, as in the present invention, by inserting only one or two buffer layers 3,
Like the samples of Nos. 3 and 4, the defect density is significantly reduced to 3 to 4 digits. By further reducing the thickness of the insulating material layer 2 which causes defects and thinning the buffer layer 3 and inserting a large number thereof, the defect density is further reduced, and the insulating material layer 2 is reduced to 300%.
If the buffer layer 3 has a thickness of Å or less and a thickness of 350 Å or less, the defect density becomes smaller than 10 ² / cm ² . 10 ² / cm ² or less of the defect density is the same as that directly epitaxially grown on a Si substrate. Although the total thickness of the insulating material layer 2 is the same as 0.3 μm, defects are significantly reduced by dividing the insulating material layer 2 into thin pieces, and the effect of the present invention is remarkable.

Next, a 0.1 μm-wide line / space oxide film mask was formed on the (111) Si surface, and the above experiment was repeated. The results are shown in Table 2 below. Compared with the above Table 1, the defect density is reduced by about one digit,
After all, the effect of the present invention was confirmed.

As is clear from the above description, and by considering the experimental results together, the present invention is applicable not only to the combination of Si and Al ₂ O ₃ but also to other combinations of materials capable of epitaxial growth. Clearly applicable.

Effects of the Invention As described above, according to the present invention, since the influence of the difference in lattice constant can be reduced, the number of defects can be reduced and the epi growth can be continued with almost no defects.
The active epi layer can be formed as a good epi film equivalent to that obtained by directly performing epi growth on the mother substrate, and the number of processes can be reduced because it is a process of epi growth only. This allows
It is possible to obtain an SOI substrate with a significantly reduced defect density, and this substrate is expected to be applied to high-speed and highly integrated semiconductor devices.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor substrate according to an embodiment of the present invention, FIG. 2 is an explanatory view of generation of crystal defects, and FIG. 3 is an explanatory view for eliminating generation of crystal defects. 1 ... Mother substrate, 2 ... Insulating material layer, 3 ... Buffer layer, 4 ...
Insulating layer, 5 ... Active epi layer.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Naoto Matsuo 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) Reference JP-A-55-38020 (JP, A) JP-A-53-17069 (JP, A) JP-A-59-75620 (JP, A)

Claims (2)

[Claims] 1. A 300 Å or less thick A on a silicon mother substrate
An insulating layer in which an l ₂ O ₃ layer and a silicon buffer layer having the same material as the mother substrate and a thickness of 350 Å or less are alternately formed is formed by heteroepitaxial growth, and an active silicon epilayer is formed on the heteroepitaxial insulating layer. Forming a semiconductor substrate. 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the insulating layer and the active epi layer are heteroepitaxially grown in an island shape or a stripe shape on a mother substrate.