JPH0750830B2 - FPC terminal processing method - Google Patents
FPC terminal processing methodInfo
- Publication number
- JPH0750830B2 JPH0750830B2 JP3157445A JP15744591A JPH0750830B2 JP H0750830 B2 JPH0750830 B2 JP H0750830B2 JP 3157445 A JP3157445 A JP 3157445A JP 15744591 A JP15744591 A JP 15744591A JP H0750830 B2 JPH0750830 B2 JP H0750830B2
- Authority
- JP
- Japan
- Prior art keywords
- fpc
- conductive pattern
- base film
- conductor
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000003672 processing method Methods 0.000 title claims description 11
- 239000004020 conductor Substances 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 11
- 238000012545 processing Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 239000010408 film Substances 0.000 description 30
- 239000000758 substrate Substances 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 9
- 230000001070 adhesive effect Effects 0.000 description 9
- 230000008569 process Effects 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- 238000004080 punching Methods 0.000 description 3
- 230000003014 reinforcing effect Effects 0.000 description 3
- 238000012993 chemical processing Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 230000002787 reinforcement Effects 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 239000012787 coverlay film Substances 0.000 description 1
- 230000008570 general process Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明はベースフィルムの一面に
設けた第１の導電パターンと、一面とは反対側の他面に
第２の導電パターンとを設けたフレキシブル・プリンテ
ィッド・サーキット（以下「ＦＰＣ」という）に端子を
形成するための加工方法、さらに詳しくは電気機器など
に使用される高密度ＦＰＣをプリント回路基板などの基
板に接続させるために用いるＦＰＣの端子加工方法に関
する。The present invention relates to the first surface of the base film
On the first conductive pattern provided and the other surface opposite to the one surface
A processing method for forming terminals on a flexible printed circuit (hereinafter referred to as "FPC") provided with a second conductive pattern , more specifically, a high-density FPC used for electric equipment and the like, a printed circuit board, etc. The present invention relates to an FPC terminal processing method used for connecting to an FPC board.
【０００２】[0002]
【従来の技術】従来のＦＰＣは、図１２および図１３に
示すように、絶縁性のベースフィルム１を有している。
ベースフィルム１の表裏面には、それぞれに銅箔等の導
電性の表面パターン３及び裏面パターン４が形成されて
いる。これらの表裏面パターン３，４とベースフィルム
１とによってＦＰＣ６を構成し、ベースフィルム１の表
裏面の間で表裏面パターン３，４が互いに接続されてい
る。すなわち、ベースフィルム１の所定位置には表裏面
を貫通したスルーホール５が形成されている。表面パタ
ーン３は裏面パターン４に接続するためにスルーホール
５へとのびている。スルーホール５には導電性のランド
７が形成されている。ランド７は裏面パターン４と表面
パターン３とを接続している。また、表面パターン３は
プリント回路基板のような基板８に接続されている。つ
まり、基板８には表面パターン３に対向している一面に
回路パターン１０ａ，１０ｂが形成されている。これら
の回路パターン１０ａ，１０ｂに表面パターン３が対向
して接続されている。2. Description of the Related Art A conventional FPC has an insulating base film 1 as shown in FIGS.
A conductive front surface pattern 3 and a back surface pattern 4 such as a copper foil are formed on the front and back surfaces of the base film 1, respectively. The front and back patterns 3 and 4 and the base film 1 constitute an FPC 6, and the front and back patterns 3 and 4 are connected to each other between the front and back surfaces of the base film 1. That is, a through hole 5 penetrating the front and back surfaces is formed at a predetermined position of the base film 1. Surface pattern
The chain 3 extends to the through hole 5 for connecting to the back surface pattern 4 . A conductive land 7 is formed in the through hole 5. Land 7 is the back surface pattern 4 and the front surface
The pattern 3 is connected. The surface pattern 3 is also connected to a substrate 8 such as a printed circuit board. That is, the substrate 8 has one surface facing the surface pattern 3.
Circuit patterns 10a and 10b are formed. The surface pattern 3 is connected to face these circuit patterns 10a and 10b .
【０００３】また、他の従来例としては、、図１２及び
図１３に示したＦＰＣ６の表裏面に銅箔などの導電パタ
ーン（図示せず）を設け、ベースフィルム１をエッチン
グ加工などの化学的な処理により溶かしてスルーホール
５を形成し表裏の導電パターンを接続している。As another conventional example, a conductive pattern (not shown) such as a copper foil is provided on the front and back surfaces of the FPC 6 shown in FIGS. 12 and 13, and the base film 1 is subjected to chemical processing such as etching. The through holes 5 are melted by a general process to form through holes 5, and the conductive patterns on the front and back are connected.
【０００４】[0004]
【発明が解決しようとする課題】図１２及び図１３に示
すスルーホール５を穿設するには、ドリルなどの機械加
工によって行なっていた。しかし、ＦＰＣ６は柔軟性が
あり、穿設加工が困難であるばかりでなく、スルーホー
ル５の穴径がφ０．４ｍｍ程度と比較的大きいために、
高密度化には適していなかった。The through holes 5 shown in FIGS. 12 and 13 are formed by machining such as a drill. However, the FPC 6 is not only flexible and difficult to drill, but also the through hole 5 has a relatively large diameter of about 0.4 mm.
It was not suitable for high density.
【０００５】また、エッチングによりベースフィルム１
にスルーホールを形成する方法は導電パターンを高密度
化できるが、化学的な処理のためにどうしても加工に時
間が係り過ぎるという問題がある。さらに、ベースフィ
ルム１が有機物であるためにアルカリ系の薬剤を使用す
ることになるが、かかる薬剤は有害なものが多く、薬害
を防止するための設備や廃液処理のための設備がどうし
ても必要となる。このため、加工設備が大規模なものと
ならざるを得ず製品のコストアップになっていた。Also, the base film 1 is formed by etching.
Although the method of forming through holes in the above can make the conductive pattern high density, it has a problem that the processing is too time-consuming due to the chemical processing. Furthermore, since the base film 1 is an organic substance, alkaline chemicals are used, but such chemicals are often harmful, and equipment for preventing chemical damage or equipment for waste liquid treatment is absolutely necessary. Become. For this reason, the processing equipment has to be large-scaled and the cost of the product has been increased.
【０００６】本発明の課題は、高密度化に適し、かつ加
工時間・加工コストの改善できるＦＰＣの端子加工方法
を提供するこにある。An object of the present invention is to provide a terminal processing method for an FPC which is suitable for high density and can improve processing time and processing cost.
【０００７】[0007]
【課題を解決するための手段】本発明によれば、絶縁性
のベースフィルムの一面に第１の導体を設けた中間素材
を用意し、該中間素材を貫通する穴を開け、この後、第
２の導体を該ベースフィルムの上記一面とは反対側の他
面に設けてＦＰＣとし、該ＦＰＣに上記第１及び上記第
２の導体にエッチング加工を施して上記一面に第１の導
電パターンを形成するとともに上記他面に第２の導電パ
ターンを形成し、次に上記穴部分に橋渡しされている上
記第２の導電パターンを切断することにより上記第２の
導電パターンにより端子部を形成することを特徴とする
ＦＰＣの端子加工方法が得られる。また、本発明によれ
ば、絶縁性のベースフィルムの一面に第１の導体を設け
た中間素材を用意し、該中間素材を貫通する穴を開け、
この後、第２の導体を該ベースフィルムの上記一面とは
反対側の他面に設けてＦＰＣとし、該ＦＰＣに上記第１
及び第２の導体にエッチング加工を施して上記一面に第
１の導電パターンを形成するとともに上記他面に第２の
導電パターンを形成し、次に、上記穴部分に橋渡しされ
ている上記第１の導電パターンと上記第２の導電パター
ンとを設けた上記ベースフィルムの領域を残した状態で
上記ベースフィルムを切断することを特徴とするＦＰＣ
の端子加工方法が得られる。According to the present invention, an intermediate material in which a first conductor is provided on one surface of an insulating base film
Is prepared, a hole is formed through the intermediate material, and then a second conductor is provided on the other surface of the base film opposite to the one surface to form an FPC.
The second conductor is etched to form the first conductor on the one surface.
And a second conductive pattern on the other surface.
Forming a turn, and then cutting the second conductive pattern bridging to the hole portion to form a terminal portion by the second conductive pattern.
An FPC terminal processing method can be obtained. Further, according to the present invention, an intermediate material having a first conductor provided on one surface of an insulating base film is prepared, and a hole is formed through the intermediate material ,
After that, a second conductor is provided on the other surface of the base film opposite to the one surface to form an FPC, and the FPC is connected to the first surface.
And the second conductor is etched to form a first
1 conductive pattern is formed and the second surface is formed on the other surface.
A conductive pattern is formed, and then the base film is cut while leaving an area of the base film provided with the first conductive pattern and the second conductive pattern bridged to the hole portion. FPC characterized by
The terminal processing method can be obtained.
【０００８】[0008]
【作用】この発明のＦＰＣの端子加工方法に用いられる
ＦＰＣはベースフィルムの一面に接着剤により第１の導
体が張り付けられている。ベースフィルムの一面とは反
対側の他面には離型紙付きの接着剤が張り付けられる。
この後、パンチング等の機械加工によりベースフィルム
に穴を開ける。次に、ベースフィルム上の離型紙を剥が
し、ベースフィルムの接着剤の付着した面に第２の導体
を張り付けてＦＰＣとする。次に、所定部位にレジスト
を行ないエッチング加工により導電パターンを形成す
る。次に端子の先端となる部分で切断する。上記のよう
な工程を経て製造された端子付きのＦＰＣは基板に接続
される。 Used in the FPC terminal processing method of the present invention.
The FPC is the first conductor on one side of the base film with an adhesive.
The body is stuck. Contrary to one side of the base film
An adhesive with release paper is attached to the other surface on the opposite side.
After that, holes are made in the base film by mechanical processing such as punching. Next, the release paper on the base film is peeled off, and the second conductor is attached to the surface of the base film to which the adhesive is attached to complete the FPC. Next, a resist is applied to a predetermined portion to form a conductive pattern by etching. Next, cut at the portion that will be the tip of the terminal. The FPC with terminals manufactured through the above steps is connected to the substrate.
【０００９】[0009]
【実施例】図１乃至図８は本発明のＦＰＣの端子加工方
法の一実施例を示している。この実施例において、図１
２及び図１３と同じ部分には同じ符号を付して説明をす
る。1 to 8 show an embodiment of a method for processing terminals of an FPC according to the present invention . In this example, FIG.
2 and FIG. 13 are given the same reference numerals and will be described.
【００１０】この発明のＦＰＣの端子加工方法では、図
１に示すように、ベースフィルム１の一面に接着剤２４
により銅箔のような薄い第１の導体２５を設けた中間素
材２１が用意される。ベースフィルム１の他面には、図
２に示すように、離型紙２６付きの接着剤２７を張り付
ける。この後、中間素材２１には、図３に示すように、
パンチング等の機械加工により貫通させた長穴２８を開
ける。In the FPC terminal processing method of the present invention,
As shown in FIG. 1, an adhesive 24 is formed on one surface of the base film 1.
An intermediate element provided with a thin first conductor 25 such as a copper foil by
Material 21 is prepared. As shown in FIG. 2, an adhesive 27 with a release paper 26 is attached to the other surface of the base film 1 . After that , as shown in FIG.
The elongated hole 28 that has been penetrated is formed by mechanical processing such as punching.
【００１１】次に、図４及び図５に示すように、ベース
フィルム１上の離型紙２６を剥がし、ベースフィルム１
の接着剤２７の付着した面に銅箔のような薄い第２の導
体２９を張り付けてＦＰＣ３０とする。この後、図６に
示すように、所定部位にレジスト３１を行ないエッチン
グ加工により第１の導電パターン２５ａと第２の導電パ
ターン２９ａとを形成する。ここで、図９はエッチング
加工後のＦＰＣ３０の平面図を示すもので、第１の導電
パターン２５ａ及び第２の導電パターン２９ａは所定の
間隔をおいて並置された状態となっている。また、第２
の導電パターン２９ａの先端部分は長穴２８に橋渡しさ
れている状態にある。Next, as shown in FIGS. 4 and 5, the release paper 26 on the base film 1 is peeled off, and the base film 1 is removed.
The FPC 30 by sticking a thin second conductor 29 such as a copper foil adhered surface of the adhesive 27. After that, as shown in FIG. 6, a resist 31 is applied to a predetermined portion and an etching process is performed to form a first conductive pattern 25a and a second conductive pattern 29a . Here, FIG. 9 is a plan view of the FPC 30 after the etching process, in which the first conductive pattern 25a and the second conductive pattern 29a are arranged side by side with a predetermined interval. Also, the second
The leading end portion of the conductive pattern 29a is bridged to the elongated hole 28.
【００１２】次に、図７に示すように、長穴２８をその
長手方向に切断するとともに、長穴２８の長手方向に直
交する向きにＦＰＣ３０を切断してＦＰＣ３０から突出
した端子部３３を形成する。つまり、端子部３３は第２
の導電パターン２９ａの先端部分となる。これらの切断
部分は、図９において点線Ａ，Ｂで示した部分となる。
このような工程を経て製造された端子部３３を有するＦ
ＰＣ３０は、図８及び図１０に示すように、プリント回
路基板のような基板８の表面に接続される。図１０にお
いて、１０ａ，１０ｂは基板８の表面にそれぞれ形成し
た回路パターンである。すなわち、回路パターン１０ａ
には第１の導電パターン２５ａが接続され、回路パター
ン１０ｂには第２の導電パターン２９ａの先端部分であ
る端子部３３が接続される。Next, as shown in FIG. 7, the elongated hole 28 is cut in the longitudinal direction thereof, and the FPC 30 is cut in a direction orthogonal to the longitudinal direction of the elongated hole 28 to project the terminal portion 33 from the FPC 30. To form. That is, the terminal portion 33 is the second
Will be the tip of the conductive pattern 29a. These cut portions are portions indicated by dotted lines A and B in FIG.
F having the terminal portion 33 manufactured through the above process
The PC 30 is connected to the surface of a substrate 8, such as a printed circuit board, as shown in FIGS. 8 and 10. In FIG. 10, 10a and 10b are circuit patterns formed on the surface of the substrate 8, respectively. That is, the circuit pattern 10a
Is connected to the first conductive pattern 25a, and the circuit pattern 10b is connected to the terminal portion 33 which is the tip of the second conductive pattern 29a.
【００１３】なお、図１１に示すように、必要に応じて
端子部３３の先端に補強用の補強フィルム部３５を残す
ことも可能である。すなわち、補強フィルム部３５はＦ
ＰＣ３０を、図９に示すように、上述の点線Ｂ及び点線
Ｃの部分で切断することによって長穴２８の一部の領域
を残した状態で形成することもできる。図１１に示すＦ
ＰＣ３０は、高密度化により第２の導電パターン２９ａ
も必然的に細くなる。この結果、端子部３３が分離して
いる状態にあると、変形する恐れもあるため、端子部３
３が折れてしまったり、ロケーションエラーを起こし易
くなる。そこで、基板８の回路パターン１０ｂ（図８を
参照）にＦＰＣ３０の端子部３３を半田付けする工程時
までは、補強フィルム部３５を一体化させた状態にして
おく。この際、長穴２８に橋渡しされている端子部３３
を回路パターン１０ｂに半田付け等により接続し、第１
の導電パターン２５ａを回路パターン１０ａに絶縁性の
ソルダーレジストもしくはカバーレイフィルムを張り付
けて接続するものである。その後に、端子部３３を切断
して補強フィルム部３５を切り離しても良い。Note that, as shown in FIG. 11, it is possible to leave a reinforcing film portion 35 for reinforcement at the tip of the terminal portion 33, if necessary. That is, the reinforcing film portion 35 is F
As shown in FIG. 9, the PC 30 is cut along the above-mentioned dotted line B and dotted line C to form a partial region of the slot 28.
It can also be formed in the state where the above is left. F shown in FIG.
The PC 30 has a second conductive pattern 29a due to high density.
Will inevitably become thinner. As a result, if the terminal portion 33 is separated, the terminal portion 33 may be deformed.
It is easy for 3 to break or a location error to occur. Therefore, the circuit pattern 10b of the substrate 8 (see FIG. 8)
The reference) until step a terminal portion 33 of the FPC 30 is soldered, in the state of being integrated reinforcement film 35
deep. At this time, the terminal portion 33 bridged to the slot 28
To the circuit pattern 10b by soldering or the like.
The conductive pattern 25a is connected to the circuit pattern 10a by attaching an insulating solder resist or a coverlay film. After that, the terminal portion 33 may be cut to separate the reinforcing film portion 35.
【００１４】[0014]
【発明の効果】上記したように、本発明のＦＰＣの端子
加工方法によれば、個々の導電パターン毎にスルーホー
ルを設ける必要がないので、高密度に端子部を形成する
ことができる。As described above, according to the FPC terminal processing method of the present invention, since it is not necessary to provide through holes for each conductive pattern, it is possible to form terminal portions with high density.
【００１５】しかも、本発明のＦＰＣの端子加工方法に
よれば、有機物のエッチング工程を経ることなしに行な
うことができ、通常の機械加工と金属のエッチング（酸
系薬剤使用による）のみで行なうことができるので、廃
液処理などのための大規模な設備を要しなくて済み、安
価なコストでＦＰＣに端子部を形成することができる。Further, according to the FPC terminal processing method of the present invention, it can be carried out without going through an etching step of an organic substance, and can be carried out only by usual machining and metal etching (by using an acid type chemical). Therefore, it is not necessary to use a large-scale facility for waste liquid treatment, and the terminal portion can be formed on the FPC at a low cost.
【図１】本発明のＦＰＣの端子加工方法の一実施例を示
し、ベースフィルムの一面に銅箔を形成し中間素材とし
た状態の断面図である。FIG. 1 is a cross-sectional view showing an embodiment of a method for processing terminals of an FPC of the present invention, in a state in which a copper foil is formed on one surface of a base film and used as an intermediate material .
【図２】図１の中間素材の他面に離型紙付き接着剤を設
けた状態の工程を示す断面図である。FIG. 2 is a cross-sectional view showing a process in a state where an adhesive with release paper is provided on the other surface of the intermediate material of FIG.
【図３】図２の中間素材にパンチング加工により穴を形
成した状態の工程を示す断面図である。FIG. 3 is a cross-sectional view showing a step in a state where holes are formed in the intermediate material of FIG. 2 by punching.
【図４】図３の中間素材の他面に銅箔を設けＦＰＣとし
た状態の工程を示す断面図である。FIG. 4 is a cross-sectional view showing a process in which an FPC is formed by providing a copper foil on the other surface of the intermediate material of FIG.
【図５】図４の第２の導体を設けた状態を示す斜視図で
ある。5 is a perspective view showing a state in which the second conductor of FIG. 4 is provided.
【図６】図４のＦＰＣにレジストを施した状態の工程を
示す断面図である。FIG. 6 is a cross-sectional view showing a process in a state where a resist is applied to the FPC of FIG.
【図７】図６のＦＰＣを切断して端子部を形成した状態
の工程を示す断面図である。FIG. 7 is a cross-sectional view showing a process of cutting the FPC of FIG. 6 to form a terminal portion.
【図８】図７のＦＰＣを基板に接続した状態を示す断面
図である。8 is a sectional view showing a state in which the FPC of FIG. 7 is connected to a substrate.
【図９】図７のＦＰＣの切断部分を示す平面図である。9 is a plan view showing a cut portion of the FPC of FIG. 7. FIG.
【図１０】図８のＦＰＣを基板に接続する状態を示す斜
視図である。10 is a perspective view showing a state in which the FPC of FIG. 8 is connected to a substrate.
【図１１】図７のＦＰＣの他の実施例を示す斜視図であ
る。11 is a perspective view showing another embodiment of the FPC of FIG.
【図１２】従来のＦＰＣにおいてスルーホールにより表
裏の導通をした例を示す平面図である。FIG. 12 is a plan view showing an example in which the front and back are electrically connected by through holes in a conventional FPC .
【図１３】図１２のスルーホールにより表裏の導通をし
基板に接続した状態を示す平面図である。13 is a plan view showing a state in which the front and back sides are electrically connected to each other through the through holes in FIG. 12 and connected to the substrate.
１ ベースフィルム ３ 導電パターン ５ スルーホール ６，３０ ＦＰＣ ８ 基板 １０ 回路パターン ２１ 中間素材 ２４ 接着剤 ２５ 第１の導体 ２５ａ 第１の導電パターン ２６ 離型紙 ２７ 接着剤 ２８ 長穴２９ 第２の導体 ２９ａ 第２の導電パターン ３３ 端子部1 Base Film 3 Conductive Pattern 5 Through Hole 6, 30 FPC 8 Substrate 10 Circuit Pattern 21 Intermediate Material 24 Adhesive 25 First Conductor 25a First Conductive Pattern 26 Release Paper 27 Adhesive 28 Slot 29 Second Conductor 29a Second conductive pattern 33 terminal portion
Claims (2)
導体を設けた中間素材を用意し、該中間素材を貫通する
穴を開け、この後、第２の導体を該ベースフィルムの上
記一面とは反対側の他面に設けてＦＰＣとし、該ＦＰＣ
に上記第１及び上記第２の導体にエッチング加工を施し
て上記一面に第１の導電パターンを形成するとともに上
記他面に第２の導電パターンを形成し、次に上記穴部分
に橋渡しされている上記第２の導電パターンを切断する
ことにより上記第２の導電パターンにより端子部を形成
することを特徴とするＦＰＣの端子加工方法。An intermediate material having a first conductor provided on one surface of an insulating base film is prepared, a hole is formed through the intermediate material, and then a second conductor is provided on the base. The FPC is provided on the other surface of the film opposite to the one surface,
The first and second conductors are etched
And form a first conductive pattern on the one surface and
A second conductive pattern is formed on the other surface, and then the second conductive pattern bridging the hole portion is cut to form a terminal portion by the second conductive pattern. FPC terminal processing method.
導体を設けた中間素材を用意し、該中間素材を貫通する
穴を開け、この後、第２の導体を該ベースフィルムの上
記一面とは反対側の他面に設けてＦＰＣとし、該ＦＰＣ
に上記第１及び第２の導体にエッチング加工を施して上
記一面に第１の導電パターンを形成するとともに上記他
面に第２の導電パターンを形成し、次に、上記穴部分に
橋渡しされている上記第１の導電パターンと上記第２の
導電パターンとを設けた上記ベースフィルムの領域を残
した状態で上記ベースフィルムを切断することを特徴と
するＦＰＣの端子加工方法。2. An intermediate material having a first conductor provided on one surface of an insulating base film is prepared, a hole is formed through the intermediate material, and then a second conductor is provided on the base. The FPC is provided on the other surface of the film opposite to the one surface,
On the above first and second conductors by etching
In addition to forming the first conductive pattern on one surface
Forming a second conductive pattern on the surface, and then leaving an area of the base film provided with the first conductive pattern and the second conductive pattern bridging to the hole portion. A method for processing a terminal of an FPC , which comprises cutting the base film in such a state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3157445A JPH0750830B2 (en) | 1991-06-03 | 1991-06-03 | FPC terminal processing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3157445A JPH0750830B2 (en) | 1991-06-03 | 1991-06-03 | FPC terminal processing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04356996A JPH04356996A (en) | 1992-12-10 |
| JPH0750830B2 true JPH0750830B2 (en) | 1995-05-31 |
Family
ID=15649815
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3157445A Expired - Fee Related JPH0750830B2 (en) | 1991-06-03 | 1991-06-03 | FPC terminal processing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750830B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7772501B2 (en) | 2006-04-25 | 2010-08-10 | Molex Incorporated | Flexible printed circuit board |
-
1991
- 1991-06-03 JP JP3157445A patent/JPH0750830B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04356996A (en) | 1992-12-10 |
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