JPH0745620A - Semiconductor device, manufacturing method thereof, and mounting structure thereof - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a semiconductor device in which wires and packages are eliminated, mounting can be performed directly without forming a recess on the mounting substrate, and the state after mounting can be confirmed from the rear surface. [Structure] Holes 23, 24 on the side surface of the transistor 40,
25 is opened, and a transistor circuit 15 is provided on the peripheral surface of each hole.
Electrodes 33, 34 and 35 electrically connected to the electrodes are formed, and bumps 43, 44 and 45 are formed on each electrode. When the transistor 40 is mounted on the mounting substrate 50, the bumps are welded to the terminals 53, 54, 55, and the connection portions 57, 58, 59 for connecting the terminals to the electrodes are formed. [Effect] Since the bump melts into a spherical shape, the quality of each connection can be observed from the back surface of the transistor. Since most of the connection parts are immersed in the holes, the mounting height is low.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method of manufacturing the same, and a mounting structure thereof, and more particularly to a wireless semiconductor device and a mounting technique thereof, for example, a discrete transistor (hereinafter simply referred to as a transistor). Regarding what is valid to use.

[0002]

2. Description of the Related Art Generally, in a semiconductor device including a discrete transistor, a semiconductor pellet having an electronic circuit (hereinafter, referred to as a pellet) and a lead for leading the electronic circuit to the outside are electrically connected to each other. , By bridging a wire between the electrode pad of the pellet and the inner portion of the lead. in this way,
In a semiconductor device in which a wire is bridged between a pellet and a lead, a package that surrounds the pellet, the inner portion of the lead, and the wire is required to protect the bridged wire. Various researches and developments have been conventionally performed to make the thickness of this package thin, but there is a limit to the thinning because of the height of the wire.

On the other hand, an attempt has been proposed to directly mount the pellet on the mounting board. As a proposal of this kind of semiconductor device, Japanese Patent Office published patent publication Sho 63-6
There is No. 852. The semiconductor device described in this publication has a semiconductor element having a trapezoidal cross section, a bump electrode wiring conductor provided along an inclined surface of the semiconductor element,
And a passivation film covering the entire surface of the semiconductor element including the activated region.

Further, according to this semiconductor device, since the semiconductor element has a trapezoidal cross section, the electrode pad is removed from the surface of the activation region, and the wiring conductor for the bump electrode is a film insulating substrate. Since the wiring is exposed down to the printed wiring, the overall thickness is uniquely determined by the thickness of the semiconductor element, and the semiconductor device can be formed thin.

CCB (Controlled Collapse) is a technique for directly and electrically and mechanically connecting a pellet to a mounting substrate without using a wire.
Bonding) method is well known. This is a technique in which a bump is formed on an electrode pad arranged on one main surface of a pellet and the bump is welded to an electric wiring on a mounting board.

[0006]

Conventionally, also in the small signal transistor, since the pellet and the lead are electrically connected by a wire, a bonding pad is formed on the pellet. And since the area under the bonding pad cannot be used as an activation region, only the portion where the bonding pad is formed,
The size of the pellet becomes large.

Therefore, a first object of the present invention is to provide a semiconductor device in which electrical connection by wires is abolished and the pellet can be directly mounted on a mounting substrate or a lead.

By the way, as a small-signal transistor, there is generally called an M-pack transistor, in which the package is resin-molded. However, in this M-pack transistor, the size of the package itself is extremely small,
There is a problem that the usage efficiency of the resin material is extremely low. In other words, compared to the amount of resin material used to mold the package itself, the amount of resin material wasted in pots or runners that feed the resin material to the cavity for molding the package is much greater. There are many.

Therefore, a second object of the present invention is to provide a semiconductor device in which the package can be omitted.

In the semiconductor device proposed in the above publication, the semiconductor device cannot be mounted on the substrate unless the film insulating substrate on the side where the semiconductor device is mounted has a hole or a recess. And again
It is not possible to reduce the overall thickness of this semiconductor device.

Therefore, a third object of the present invention is to provide a mounting technique capable of mounting a semiconductor device without providing a recess on the mounting substrate.

Further, in the CCB mounting technology,
After the pellet is mounted on the mounting board, the welded state of the bumps is hidden by the pellet, so that there is a problem in that it is not possible to confirm whether the welded state is good or bad from the back surface side of the pellet.

Therefore, a fourth object of the present invention is to provide a semiconductor device, a method of manufacturing the same, and a mounting structure of the semiconductor device, in which the state after mounting can be confirmed from the back surface of the pellet to determine whether the welding state is good or bad. is there.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0015]

The typical ones of the inventions disclosed in the present application will be outlined below. That is, a hole is formed in the side surface of a semiconductor pellet having an electronic circuit formed on the first main surface side so that the first main surface side and the side surface side are open, and the electric circuit is formed on the peripheral surface of the hole. It is characterized in that electrodes electrically connected by electric wiring are formed and bumps are formed on the electrodes.

[0016]

When the semiconductor device according to the above means is mounted on the mounting substrate, the semiconductor device is arranged with the first main surface facing the mounting portion side, and each bump is aligned with each terminal of the mounting portion. To be done. When each bump is aligned with each terminal, the semiconductor device and the mounting substrate are heated. By this heating, the bump formed of the solder material or the like is melted. When the melted bumps cool, the connection parts that connect the terminals and the electrodes are formed.

Since the bumps tend to be spherical due to the surface tension in the molten state, these connecting portions are in a substantially hemispherical shape. That is, since half of each connecting portion projects from the side surface of the semiconductor device, the quality of each connecting portion can be observed even from the second main surface side of the semiconductor device.

Further, since each electrode is formed on the peripheral surface of the hole, the self-alignment action is extremely effective at these connecting portions. Therefore, the semiconductor device is mounted on the mounting portion of the mounting substrate in a highly accurately positioned state.

Further, since most of the upper side of each connection portion is immersed in each hole in which each electrode is formed, the height of the semiconductor device with respect to the mounting board, that is, from the upper surface of the mounting board is determined. The distance to the second main surface of the semiconductor device is extremely low. In other words, the dimension in which this height is increased by the presence of each connection portion is extremely suppressed. Moreover, the flow of solder material is also effectively prevented by the holes.

[0020]

1A and 1B show a mounting structure of a transistor which is an embodiment of the present invention. FIG. 1A is a partially cutaway plan view and FIG. 1B is a front sectional view. FIG. 2 and subsequent figures are explanatory views showing the method for manufacturing the transistor.

In this embodiment, the semiconductor device according to the present invention is constructed as a discrete transistor, and this transistor is manufactured by the following manufacturing method. Hereinafter, a method of manufacturing a transistor, which is an embodiment of the present invention, will be described. This description will clarify the details of the configuration of the transistor which is one embodiment of the present invention.

In the method of manufacturing a transistor which is an embodiment of the present invention, a silicon wafer (hereinafter, simply referred to as a wafer) 11 shown in FIG. 2 is prepared. The wafer 11 has a crystal arrangement of "100" (not shown). As shown in FIG. 2A, one main surface 12 of the wafer 11 (hereinafter, referred to as a first main surface) 12 has a large number of pellet portions 14 which become pellets, and the vertical and horizontal directions are along the orientation flat 13. , And the transistor circuits 15 are formed in the respective pellet portions 14.

As shown in FIG. 2B, an N-type collector 17 is provided on the substrate 16 of the wafer 11.
Is formed, a P-type base 18 is formed in the upper layer in the region of the collector 17, and N is formed in the upper layer in the region of the base 18.
A plus type emitter 19 is formed.

Next, an embodiment of a bump forming step, which is a main step of the method of manufacturing a transistor of the present invention, will be described.

After the desired transistor circuits 15 are collectively formed on each group of pellets 14 of the wafer 11, FIG.
As shown in FIG. 3, a collector hole 23, a base hole 24, and an emitter hole 25 are arranged on three sides of the four sides of each pellet portion 14 at substantially the center of each side.
The conical shape is formed by the lithography process and the etching process. The holes 23, 24, 25 are formed so as to straddle the adjacent pellet portions 14, 14, respectively, and the circular arcs of the holes 23, 24, 25 are the pellet portions 14, 1, respectively.
It has entered the side of No. 4.

That is, a resist film 21 is formed on the first main surface 12 of the wafer 11, and circular holes are formed at predetermined locations on the resist film 21 between adjacent pellet portions 14, 14. 22 is opened by a lithography process. Then, by performing a wet etching process using a hydrofluoric acid and nitric acid-based etching solution,
The resist film 21 is used as a mask to form holes 23, 24 and 25 in the circular hole 22. At this time, in the silicon wafer 11 having a crystal arrangement of "100", anisotropic etching is performed quickly in the vertical direction and in the horizontal direction, so that the holes 23, 24, and 25 are formed in a conical shape in a self-controlled manner. Will be.

After the holes 23, 24, 25 are formed on the three sides of each pellet portion 14 of the wafer 11, silicon oxide is formed on the first main surface 12 of the wafer 11 as shown in FIG. The (SiO ₂ ) film 26 is deposited by the CVD method or the heat treatment method.

Subsequently, as shown in FIG. 4, the portions of the silicon oxide film 26 on the first main surface 12 of the wafer 11 facing the collector 17, the base 18 and the emitter 19 of each pellet portion 14 are formed. , Through holes 27, 28, and 29 are opened by a lithography process and an etching process, respectively.

Each through hole 2 is formed in the silicon oxide film 26.
After the openings 7, 28, 29 are formed, collector electrical wiring (hereinafter referred to as collector wiring) 30, on the silicon oxide film 26 on the first main surface 12 of the wafer 11,
An electric wiring for base (hereinafter, referred to as base wiring) 31 and an electric wiring for emitter (hereinafter, referred to as emitter wiring) 32 are formed. The collector wiring 30 has a through hole 27 and a collector hole 23 provided on the collector 17, the base wiring 31 has a through hole 28 and a base hole 24 provided on the base 18, and the emitter wiring 32 has an emitter 19. The through hole 29 and the emitter hole 25 provided above are wired so as to be electrically connected to each other.

In this state, the collector electrode 33 is formed at the end of the collector wiring 31 in the collector hole 23.
A base electrode 34 is formed at the end of the base wiring 32 in the base hole 24, and an emitter electrode 35 is formed at the end of the emitter wiring 33 in the emitter hole 25 in a truncated cone shape. That is, each electrode 33, 34, 3
Reference numeral 5 is formed in a conical annular band shape (ring shape) on the conical surface of each of the conical holes 23, 24, 25.

Although detailed description and illustration are omitted, the wirings 30, 31, and 32 are formed on the wafer 1 by a vapor deposition process and subsequent lithographic process and etching process.
The first main surface 12 is collectively formed. Further, each of the wirings 30, 31, and 32 is firmly formed by depositing aluminum on a base of titanium (Ti) -platinum (Pt) or the like.

After the wirings 30, 31, 32 are formed, as shown in FIG. 6, a passivation film made of a silicon nitride (Si ₃ N ₄ ) film is formed on the first main surface 12 of the wafer 11. 36 is deposited by a vapor deposition process or the like, and the collector electrode 33, the base electrode 34, and the emitter electrode 35 are each exposed in a conical annular band shape.

After the first main surface 12 of the wafer 11 is entirely covered with the passivation film 36 except for a predetermined portion, the collector electrode 3 is formed as shown in FIG.
3, on the base electrode 34 and the emitter electrode 35, a convex portion 37 for a collector bump, a convex portion 38 for a base bump, and a convex portion 39 for an emitter bump are respectively formed into a conical annular band having a substantially semi-elliptical cross section. Formed into a shape.

The protrusions 37, 38, 39 are formed by using a solder material and depositing them on the surfaces of the electrodes 33, 34, 35 by a lithographic process or a metal mask method. In addition, each convex portion 37, 3
8 and 39 have a semi-elliptical cross section,
It is formed in a circular ring shape attached to the conical surface of the conical hole.

As described above, the collector electrode 33, the base electrode 34, and the emitter electrode 35 are formed on the first main surface 12 of the wafer 11, and the bump projections 37, 38, 39 are formed on each electrode. After the wafers 11 are respectively formed, the wafer 11 is diced between the adjacent pellet portions 14 and 14, so that as shown in FIG.
It is divided into pellets. Then, the transistor 40 is substantially constituted by the pellet.

That is, the transistor 40 made of this pellet is formed in a substantially square thin plate shape, and the transistor circuit 15 is formed in the activation region on the first main surface 41 side thereof. First of the pellet 40
A collector 17 and a base 18 are provided in the activation area on the main surface 41 side.
The collector wiring 30 is connected to the collector 17, the base wiring 31 is connected to the base 18, and the emitter wiring 32 is connected to the emitter 19. The surface side of the collector wiring 30 is connected to the collector wiring 30 to the emitter 19 by the passivation film 36. It is covered.

In the state of being divided into pellets, the bump convex portions 37, 38, 39 formed between the adjacent pellet portions 14, 14 are divided into two for each pellet 40. That is, the bump projections 37, 38,
39 is in a state of being divided into two by a vertical plane passing through the center lines of the holes 23, 24 and 25. Due to each of the two divided convex portions, a collector bump 43, a base bump 44, and an emitter bump 45 are formed on the side surfaces of three of the four sides of the transistor 40. Each of the bumps 43, 44 and 45 has a conical half-ring shape in which each of the convex portions 37, 38 and 39 is divided into two. The collector bump 43 and the collector 17 are connected to the collector wiring 30.
Thus, the base bump 44 and the base 18 are electrically connected by the base wiring 31, and the emitter bump 45 and the emitter 19 are electrically connected by the emitter wiring 32.

On the other hand, a transistor mounting portion is formed in advance on the mounting substrate 50 on which the transistor 40 is mounted, as shown in FIG. That is, the substrate 50 includes a main body 51 made of an insulating plate such as epoxy resin containing glass, and an electric wiring 52 is formed on the upper surface of the main body 51. The electric wiring 52 is finely formed on the copper foil adhered to the surface of the main body 51 by a lithographic process and an etching process. A collector terminal 53, a base terminal 54, and an emitter terminal 55 are formed in a radial pattern so as to be insulated from each other at predetermined positions in the electric wiring 52, and the transistor mounting portion 56 is substantially formed by these terminals 53, 54, 55. Is formed in.

When the transistor 40 manufactured as described above is mounted on the mounting substrate 50, the transistor 40 is arranged so that the first main surface 41 faces the mounting portion 56 side, and the collector bump 43 collects. Terminal 53
The base bump 44 and the emitter bump 45 are aligned with the base terminal 54 and the emitter terminal 55, respectively. At this time, the bumps 43, 44, 45 and the terminals 53, 54,
The alignment with 55 is performed after the position of each bump 43, 44, 45 is determined by image recognition,
It can be secured easily.

As described above, the bumps 43, 44,
When 45 is aligned with each terminal 53, 54, 55, the transistor 40 and the mounting substrate 50 are heated. By this heating, the bumps 43, 4 made of the solder material are formed.
4, 45 are melted. Melted bumps 43, 44, 4
When 5 cools, as shown in FIG. 1, a collector connecting portion 57 connecting the collector terminal 53 and the collector electrode 33, a base connecting portion 58 connecting the base terminal 54 and the base electrode 34, and an emitter terminal. Emitter connection portions 59 that connect 55 and the emitter electrode 35 are formed.

In the molten state, the bumps tend to be spherical due to the surface tension, so that the connecting portions 57,
58 and 59 are in a substantially hemispherical shape. That is,
Half of each connection 57, 58, 59 is a transistor 40.
Because it will be in a state of protruding from the pellet side of each,
The quality of each connection part 57, 58, 59 is determined by the transistor 40.
It can also be observed from the second main surface 42 side.

Further, since each of the electrodes 33, 34, 35 is formed in a semi-conical conical surface, these connecting portions 57, 5
The self-alignment action works extremely effectively on Nos. 8 and 59. Therefore, the transistor 40 is mounted on the mounting board 5.
It will be mounted in the mounting portion 56 at position 0 with extremely high accuracy.

Further, most of the upper portions of the connecting portions 57, 58, 59 are set in the respective holes 23, 24, 25 in which the electrodes 33, 34, 35 are formed, so that the transistors are formed. The height of 40 with respect to the mounting substrate 50, that is, the distance from the upper surface of the mounting substrate 50 to the second main surface 42 of the transistor 40 is extremely low. That is, the dimension in which this height is increased by the presence of the connecting portions 57, 58, 59 is extremely suppressed. Moreover, the solder material flows out through the holes 2.
3, 24, 25 will effectively prevent this.

According to the above embodiment, the following effects can be obtained. (1) Since the connection by the wire can be eliminated, the size of the pellet can be reduced to a size corresponding to the activation region, and the high frequency electrical characteristics can be improved.

(2) By eliminating the connection by the wire, the package for protecting the wire can be omitted, so that the forming material and forming process of the package can be omitted and the cost can be greatly reduced. Can be reduced to

(3) Since most of the connection part formed of the solder bumps is immersed in the hole formed in the pellet, it is possible to form a recess on the mounting substrate side without forming a recess.
The height of the pellet with respect to the mounting board can be reduced.

(4) Since the connection portion formed by melting and solidifying the solder bump has a hemispherical shape, the connection portion can be observed even from the second main surface side of the pellet, and the formation of the connection portion can be prevented. The quality can be confirmed from the second main surface side of the pellet.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the holes for bumps are not limited to be provided on each side of the pellet portion, but may be provided on each corner portion of the pellet.

In the above-mentioned embodiment, for the sake of convenience, the bump convex portion is formed on the wafer, and then the pellet portion is diced. However, the wafer on which the bump convex portion is formed is a transistor. There is also a case where the transistor is shipped to the user, and the pellet part is diced by the user and mounted for each transistor. In this case, an arbitrary time is interposed between the step of forming the bump convex portion and the step of dividing the wafer into pellets.

In the above description, the case where the invention made by the present inventor is mainly applied to the transistor technology which is the field of application which is the background of the invention has been described, but the invention is not limited thereto and the semiconductor integrated circuit device (I
It can be applied to all semiconductor devices such as C).

[0052]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

By directly connecting the electrode of the pellet and the terminal of the mounting substrate by the connecting portion formed by the bump, the wire can be eliminated, so that the package can be omitted and the high frequency characteristic can be improved. Can be increased.

Moreover, since the connecting portion is formed in the hole that is recessed in the side surface of the pellet, the mounting height can be reduced without providing a recess on the mounting substrate side. Further, since the self-alignment action at the time of melting and solidifying the bumps is enhanced, the mounting accuracy can be enhanced.

Furthermore, since the connecting portion has a hemispherical shape and protrudes from the side surface of the pellet, the connecting portion can be observed from the second main surface side of the pellet, and whether the connecting portion is good or bad can be determined. Can be performed by observing from the second main surface side.

[Brief description of drawings]

1A and 1B show a mounting structure of a transistor, which is an embodiment of the present invention, in which FIG. 1A is a partially cutaway plan view and FIG.

FIG. 2 shows a state after a transistor circuit is formed in a method of manufacturing a transistor according to an embodiment of the present invention,
(A) is a top view of a wafer, (b) is an expanded partial front sectional view which follows the bb line of (a).

FIG. 3 shows a hole opening step, (a) is an enlarged partial plan view, and (b) is an enlarged partial front sectional view.

FIG. 4 shows a through-hole opening step, (a) is an enlarged partial plan view, and (b) is an enlarged partial front sectional view.

FIG. 5 shows a wiring and electrode forming step, (a)
Is an enlarged partial plan view, and (b) is an enlarged partial front sectional view.

FIG. 6 shows a passivation film forming step,
(A) is an enlarged partial plan view and (b) is an enlarged partial front sectional view.

7A and 7B show a bump convex portion forming step, wherein FIG. 7A is an enlarged partial plan view and FIG. 7B is an enlarged partial front sectional view.

8A and 8B show a transistor which is an embodiment of the present invention, in which FIG. 8A is an enlarged partial plan view and FIG. 8B is an enlarged partial front sectional view.

[Explanation of symbols]

11 ... Silicon wafer (wafer), 12 ... First main surface, 1
3 ... Orientation flat, 14 ... Pellet part,
15 ... Transistor circuit, 16 ... Substrate, 1
7 ... Collector, 18 ... Base, 19 ... Emitter, 21 ...
Resist film, 22 ... Circular hole, 23 ... Collector hole, 24
... base holes, 25 ... emitter holes, 26 ... silicon oxide (SiO ₂ ) films, 27, 28, 29 ... through holes,
30 ... Collector electrical wiring (collector wiring), 31 ... Base electrical wiring (base wiring), 32 ... Emitter electrical wiring (emitter wiring), 33 ... Collector electrode, 34 ... Base electrode, 35 ... Emitter electrode, 36 ... Passivation film, 37 ... Collector bump projections, 38 ... Base bump projections, 39 ... Emitter bump projections, 40 ...
Transistor (pellet), 41 ... First main surface, 42 ...
Second main surface, 43 ... Collector bump, 44 ... Base bump, 45 ... Emitter bump, 50 ... Mounting substrate, 51 ... Main body, 52 ... Electrical wiring, 53 ... Collector terminal, 54 ... Base terminal, 55 ... Emitter terminal, 56 ... Transistor mounting part, 57 ... Collector connecting part, 58 ... Base connecting part, 5
9 ... Emitter connection part.

Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display location H01L 29/73 H01L 29/72

Claims (5)

[Claims] 1. A hole is submerged in a side surface of a semiconductor pellet having an electronic circuit formed on the first main surface side so that the first main surface side and the side surface side are opened, and the peripheral surface of the hole is provided with the hole. A semiconductor device characterized in that an electrode electrically connected to an electronic circuit by an electric wiring is formed, and a bump is formed on the electrode. 2. The hole is formed in a shape in which a conical hole is divided by a vertical plane including a center line, and
The electrode is formed on a conical surface.
The semiconductor device according to. 3. A step of forming a plurality of pellet parts regularly on the first main surface side of the wafer in a matrix in the vertical and horizontal directions, and a step of forming an electronic circuit for each pellet part, and a first main surface of the wafer. A step of forming a hole between adjacent pellet parts so as to cover a side surface of the pellet part; and an electrode is formed on the peripheral surface of the hole on the first main surface of the wafer, and the electrode and the electronic circuit are electrically connected. And a step of forming bumps on the electrodes, a method of manufacturing a semiconductor device. 4. The method of manufacturing a semiconductor device according to claim 3, wherein after the bumps are formed, the wafer is divided so as to divide the holes into pellets. 5. A mounting structure of a semiconductor device, wherein the semiconductor device according to claim 1 is mounted on a mounting board, wherein a mounting portion is formed on an upper surface of a main body of the mounting board, and the mounting portion is formed by a plurality of mounting portions. The electrical wiring of the book is laid out in a radial pattern passing through the positions corresponding to the bumps, and the bumps of the semiconductor device are aligned and melted and solidified to the terminals formed at the tips of the wirings. A connecting structure is formed by each of the above, and each electrode and each terminal are electrically connected by each connecting unit.