JPH0726977B2 - Surge classification circuit - Google Patents
Surge classification circuitInfo
- Publication number
- JPH0726977B2 JPH0726977B2 JP63148835A JP14883588A JPH0726977B2 JP H0726977 B2 JPH0726977 B2 JP H0726977B2 JP 63148835 A JP63148835 A JP 63148835A JP 14883588 A JP14883588 A JP 14883588A JP H0726977 B2 JPH0726977 B2 JP H0726977B2
- Authority
- JP
- Japan
- Prior art keywords
- surge
- voltage
- circuit
- voltage detection
- absorbing element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 23
- 238000012545 processing Methods 0.000 claims description 16
- 238000012360 testing method Methods 0.000 claims description 7
- 239000006096 absorbing agent Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000001186 cumulative effect Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Landscapes
- Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
- Measurement Of Current Or Voltage (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は、雷インパルスなどのサージの大きさや発生累
積頻度等を求めるサージ分類回路に関するものである。Description: TECHNICAL FIELD The present invention relates to a surge classification circuit for obtaining the magnitude of surges such as lightning impulses, cumulative frequency of occurrences, and the like.
[従来の技術] 電源回路に重畳するサージの大きさや時間的な発生パタ
ーン等を求める場合、サージの立ち上がりが急峻である
ため、その計測には高度の技術を必要としていた。[Prior Art] When the magnitude of a surge to be superimposed on a power supply circuit, a temporal generation pattern, and the like are obtained, a sharp rise of the surge requires a high level of technology for the measurement.
このような、従来のサージの大きさを分類する装置を第
4図に示す。この装置では、被検回路1の電圧を分圧器
2で10V以下に落とし、高速アンプ3でインピーダンス
変換を行った後、基準レベルの夫々異なる複数個の高速
比較器41〜4nでサージの電圧を検出し、これら比較器41
〜4nの出力に応じて処理回路5が電圧分類を行うように
していた。ところが、この方法では急峻な立ち上がりの
サージ波形(1000V/μs以上)を分圧器2で正確に分圧
する必要があり、このため無誘導高抵抗を必要とする
が、この種の抵抗は入手することが難しく、高価であ
る。しかも、急峻な立ち上がりのサージのインピーダン
ス変換及び電圧比較を行うためには、超高速アンプや超
高速電圧比較器を必要とする。このため、この種のアン
プや比較器を設計・製作するには高度の技術を必要と
し、且つ高価なものとなる。FIG. 4 shows such a conventional device for classifying the magnitude of surge. In this device, the voltage of the circuit under test 1 is reduced to 10 V or less by the voltage divider 2, impedance conversion is performed by the high speed amplifier 3, and then surges are detected by a plurality of high speed comparators 4 1 to 4 n having different reference levels. Voltage detection and comparators 4 1
The processing circuit 5 performs the voltage classification according to the output of 4 n . However, with this method, it is necessary to accurately divide the surge waveform of a steep rise (1000 V / μs or more) with the voltage divider 2. Therefore, non-induction high resistance is required, but this kind of resistance must be obtained. Difficult and expensive. Moreover, an ultra-high speed amplifier and an ultra-high speed voltage comparator are required to perform impedance conversion and voltage comparison of a surge having a sharp rise. Therefore, a high level of technology is required to design and manufacture this kind of amplifier and comparator, and it becomes expensive.
[発明が解決しようとする課題] 本発明は上述の点に鑑みて為されたものであり、その目
的とするところは、高性能の分圧器、アンプ及び比較器
を用いずに、サージの分類を行うことができるサージ分
類回路を提供することにある。[Problems to be Solved by the Invention] The present invention has been made in view of the above points, and an object of the present invention is to classify surges without using a high-performance voltage divider, an amplifier, and a comparator. It is to provide a surge classification circuit capable of performing.
[課題を解決するための手段] 上記目的を達成するために、本発明はアレスタ等のサー
ジ吸収素子と、サージが印加されたときにサージ吸収素
子の放電が継続することを防止する電流制限用抵抗と、
サージ吸収素子及び電流制限抵抗を介してサージによる
電流が供給される電圧検出用抵抗とを直列接続して構成
され、夫々異なる動作電圧のサージ吸収素子を備えると
共に、サージが重畳される電源回路等の被検回路の出力
電圧が夫々印加される複数個の電圧検出回路と、夫々の
電圧検出回路の電圧検出用抵抗の両端電圧に応じて適宜
サージの分類処理を行う処理回路とを備えている。[Means for Solving the Problems] In order to achieve the above object, the present invention provides a surge absorbing element such as an arrester, and a current limiting element for preventing continuous discharge of the surge absorbing element when a surge is applied. Resistance,
A power supply circuit, etc., which is configured by connecting in series a surge absorption element and a voltage detection resistance to which a current due to a surge is supplied via a current limiting resistance, has surge absorption elements of different operating voltages, and in which surges are superimposed. A plurality of voltage detection circuits to which the output voltage of the circuit under test is applied, respectively, and a processing circuit that appropriately performs surge classification processing according to the voltage across the voltage detection resistors of each voltage detection circuit. .
(作用) 本発明は、上述のようにアレスタ等のサージ吸収素子
と、サージが印加されたときにサージ吸収素子の放電が
継続することを防止する電流制限用抵抗と、サージ吸収
素子及び電流制限抵抗を介してサージによる電流が供給
される電圧検出用抵抗とを直列接続して構成され、夫々
異なる動作電圧のサージ吸収素子を備えると共に、サー
ジが重畳される電源回路等の被検回路の出力電圧が夫々
印加される複数個の電圧検出回路を備えることにより、
サージ吸収素子及び普通の抵抗を用いてサージの大きさ
などを検出することができるようにし、これにより特殊
な抵抗や超高速のアンプや比較器などを用いることな
く、サージの分類を行うことができるようにしたもので
ある。(Operation) The present invention includes a surge absorbing element such as an arrester as described above, a current limiting resistor that prevents the surge absorbing element from continuing discharge when a surge is applied, a surge absorbing element and a current limiting element. The output of the circuit under test, such as a power supply circuit, which is configured by connecting in series a voltage detection resistor to which a surge current is supplied via a resistor and has different operating voltages By providing a plurality of voltage detection circuits to which each voltage is applied,
It makes it possible to detect the magnitude of surge using a surge absorbing element and ordinary resistance, which enables classification of surge without using special resistance or ultra-high speed amplifier or comparator. It was made possible.
(実施例) 第1図乃至第3図に本発明の一実施例を示す。(Embodiment) FIGS. 1 to 3 show an embodiment of the present invention.
本実施例では、第1図に示すように、電源回路などの被
検回路1に重畳されるサージの電圧を、アレスタ等のサ
ージ吸収素子Z、電流制限用抵抗r及び電圧検出用抵抗
Rの直列回路からなる電圧検出回路6を用いて検出する
ようにしたものである。上記電圧検出回路6は、被検回
路1に必要とする分類レベルの数だけ並列に接続し、こ
れら電圧検出回路6の夫々の電圧検出用抵抗Rの両端に
生じる電圧を処理回路5に入力し、この処理回路5でサ
ージの電圧を分類するなどの処理が行われる。第1図は
サージ電圧を5種類に分類する場合を示す。今、サージ
電圧を、例えば200V,300V,400V,500V,600Vの5水準に分
類するとすれば、サージ吸収素子Z1〜Z5の動作電圧が20
0V,300V,400V,500V,600Vのものを選択する。ところで、
例えばサージ吸収素子としてアレスタを用いた場合、ア
レスタには応答の速いもの(例えばセラミック製)と、
応答の遅いもの(ガラス管製)とがあるが、本発明では
応答の速いものを使用するものとする。つまり、第3図
(a)に示すような雷インパルス電圧が印加された時、
応答の遅いアレスタの端子電圧の応答波形は第3図
(c)に示すようになり、このように応答が遅いと、予
定した電圧よりも高い電圧で放電するので、判定時の誤
差が大きくなる。なお、第3図(b)に応答の速いアレ
スタの端子電圧を示す。夫々の電流制限用抵抗r1〜r5と
しては、サージ吸収素子Z1〜Z5の放電が継続しないよう
に電流を制限する抵抗値のものを選択し、サージ電圧を
上述のように分類する場合、抵抗r1〜r5として例えば10
KΩ〜100KΩのものを用いる。また、電圧検出用抵抗R1
〜R5としては、電流制限用抵抗r1〜r5の1/100程度のも
の(例えば100Ω〜1KΩ程度)を用いる。In the present embodiment, as shown in FIG. 1, the surge voltage superimposed on the circuit under test 1 such as a power supply circuit is detected by a surge absorbing element Z such as an arrester, a current limiting resistor r and a voltage detecting resistor R. The voltage detection circuit 6 composed of a series circuit is used for detection. The voltage detection circuits 6 are connected in parallel by the number of classification levels required for the circuit under test 1, and the voltages generated across the respective voltage detection resistors R of these voltage detection circuits 6 are input to the processing circuit 5. The processing circuit 5 performs processing such as classification of surge voltage. FIG. 1 shows the case where the surge voltage is classified into five types. Now, a surge voltage, for example 200V, 300 V, 400V, 500V, if classified into five levels of 600V, the operating voltage of the surge absorbing element Z 1 to Z 5 is 20
Select 0V, 300V, 400V, 500V, 600V. by the way,
For example, when an arrester is used as a surge absorber, the arrester must have a fast response (for example, made of ceramic).
Some of them have slow response (made of glass tube), but those of fast response are used in the present invention. That is, when a lightning impulse voltage as shown in FIG. 3 (a) is applied,
The response waveform of the terminal voltage of the arrester having a slow response is as shown in FIG. 3 (c). If the response is slow in this way, the discharge is performed at a voltage higher than the planned voltage, and the error at the time of determination becomes large. . 3 (b) shows the terminal voltage of the arrester having a fast response. The current limiting resistor r 1 ~r 5 each, select the one of the resistance value of the discharge of the surge absorber Z 1 to Z 5 limits the current so as not to continue to classify the surge voltage as described above In this case, the resistances r 1 to r 5 are, for example, 10
Use one with KΩ to 100KΩ. In addition, the voltage detection resistor R 1
The to R 5, used of about 1/100 of the current limiting resistor r 1 ~r 5 (e.g., about 100Ω~1KΩ).
例えば、400Vのサージが発生した場合、400V以下の動作
電圧の3個のサージ吸収素子Zが放電し、夫々の電圧検
出用抵抗Rの両端に電圧が現れ、この電圧に応じて処理
回路5が適宜サージの分類処理を行う。このような処理
回路5の一例を第2図に示す。この処理回路5では、保
護回路7を介して電圧を取り込む、この保護回路7でこ
の電圧を次段以降の回路が破壊しない電圧以下に抑制す
る。そして、単安定マルチ8で入力される電圧信号のパ
ルス幅を広げる。この単安定マルチ8の出力はドライバ
9で増幅されて、カウンタ10に入力される。つまり、こ
の処理回路5ではサージが入力される毎に、カウンタ10
でカウントを行って、サージの発生累積回数を求めてい
る。なお、上記処理回路5では、電圧検出用抵抗R1〜R5
の両端に電圧が発生した複数の電圧検出回路61〜65の内
で一番サージ吸収素子Zの動作電圧の高いものを求める
ことにより、サージの電圧を分類することもできる。ま
た、このサージの電圧の分類に基づいてサージの発生パ
ターンなども求めることもできる。ところで、本実施例
の場合でも単安定マルチ8には高速応答が要求される。
しかし、最近ではこの単安定マルチ8はIC化され、数nS
の立ち上がりに充分に応答できるので、この単安定マル
チ8も特殊なものを用いずに済む。このように本実施例
では、アレスタなどのサージ吸収素子Z及び普通の抵抗
r,Rを用いてサージの電圧を検出することができ、従来
のように特殊な抵抗や超高速のアンプや比較器を必要と
せず、簡単な回路でサージを分類することができる。For example, when a surge of 400V occurs, three surge absorbing elements Z having an operating voltage of 400V or less are discharged, a voltage appears at both ends of each voltage detection resistor R, and the processing circuit 5 responds to this voltage. Perform surge classification processing as appropriate. An example of such a processing circuit 5 is shown in FIG. In this processing circuit 5, a voltage is taken in through the protection circuit 7, and this protection circuit 7 suppresses this voltage to a voltage below which the circuits in the subsequent stages are not destroyed. Then, the pulse width of the voltage signal input by the monostable multi 8 is widened. The output of the monostable multi 8 is amplified by the driver 9 and input to the counter 10. That is, in this processing circuit 5, every time a surge is input, the counter 10
The cumulative number of surge occurrences is calculated by counting at. In the processing circuit 5, the voltage detection resistors R 1 to R 5 are used.
Voltage across the by obtaining a higher operating voltage of the most surge absorbing element Z in the plurality of voltage detecting circuit 6 through 65 generated, it is also possible to classify the surge voltage. Further, a surge generation pattern or the like can be obtained based on the classification of the surge voltage. By the way, even in the case of this embodiment, the monostable multi-8 is required to have a high-speed response.
However, recently, this monostable multi-8 has been integrated into an IC,
Since it is possible to sufficiently respond to the rising of, the monostable multi-8 does not need to use a special one. As described above, in this embodiment, the surge absorbing element Z such as an arrester and the normal resistance are used.
The surge voltage can be detected using r and R, and it is possible to classify surges with a simple circuit without the need for special resistors, ultra-high-speed amplifiers and comparators as in the past.
[発明の効果] 本発明は上述のように、アレスタ等のサージ吸収素子
と、サージが印加されたときにサージ吸収素子の放電が
継続することを防止する電流制限用抵抗と、サージ吸収
素子及び電流制限抵抗を介してサージによる電流が供給
される電圧検出用抵抗とを直列接続して構成され、夫々
異なる動作電圧のサージ吸収素子を備えると共に、サー
ジが重畳される電源回路等の被検回路の出力電圧が夫々
印加される複数個の電圧検出回路を備えているので、サ
ージ吸収素子及び普通の抵抗を用いてサージの大きさな
どを検出することができ、このため特殊な抵抗や超高速
のアンプや比較器などを用いることなく、サージの分類
を行うことができる効果がある。[Advantages of the Invention] As described above, the present invention provides a surge absorbing element such as an arrester, a current limiting resistor that prevents the surge absorbing element from continuing discharge when a surge is applied, a surge absorbing element, and A circuit to be tested, such as a power supply circuit, which is configured by connecting in series a voltage detection resistor to which a current due to a surge is supplied via a current limiting resistor and has surge absorbing elements of different operating voltages Since it is equipped with a plurality of voltage detection circuits to which each output voltage is applied, it is possible to detect the magnitude of the surge using a surge absorbing element and ordinary resistance. There is an effect that surges can be classified without using an amplifier or a comparator.
第1図は本発明の一実施例の回路図、第2図は同上の処
理回路の構成を示すブロック図、第3図は同上のアレス
タの特性の説明図、第4図は従来例のブロック図であ
る。 1は被検回路、61〜65は電圧検出回路、5は処理回路、
Z1〜Z5はサージ吸収素子、r1〜r5は電流制限用抵抗、R1
〜R5は電圧検出用抵抗である。FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a processing circuit of the same, FIG. 3 is an explanatory diagram of characteristics of an arrester of the same, and FIG. 4 is a block of a conventional example. It is a figure. 1 test circuit, 6 through 65 the voltage detection circuit, the 5 processing circuit,
Z 1 to Z 5 are surge absorbers, r 1 to r 5 are current limiting resistors, R 1
~ R 5 is a resistor for voltage detection.
Claims (1)
印加されたときにサージ吸収素子の放電が継続すること
を防止する電流制限用抵抗と、サージ吸収素子及び電流
制限抵抗を介してサージによる電流が供給される電圧検
出用抵抗とを直列接続して構成され、夫々異なる動作電
圧のサージ吸収素子を備えると共に、サージが重畳され
る電源回路等の被検回路の出力電圧が夫々印加される複
数個の電圧検出回路と、夫々の電圧検出回路の電圧検出
用抵抗の両端電圧に応じて適宜サージの分類処理を行う
処理回路とを備えて成ることを特徴とするサージ分類回
路。1. A surge absorbing element such as an arrester, a current limiting resistor for preventing the discharge of the surge absorbing element from continuing when a surge is applied, and a surge through a surge absorbing element and a current limiting resistor. It is configured by connecting in series a voltage detection resistor to which a current is supplied, and is provided with surge absorbing elements of different operating voltages, and the output voltage of a circuit under test such as a power supply circuit on which surge is superimposed is applied to each. A surge classification circuit comprising: a plurality of voltage detection circuits; and a processing circuit that appropriately performs surge classification processing according to the voltage across the voltage detection resistors of each voltage detection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63148835A JPH0726977B2 (en) | 1988-06-15 | 1988-06-15 | Surge classification circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63148835A JPH0726977B2 (en) | 1988-06-15 | 1988-06-15 | Surge classification circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01314973A JPH01314973A (en) | 1989-12-20 |
JPH0726977B2 true JPH0726977B2 (en) | 1995-03-29 |
Family
ID=15461799
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63148835A Expired - Lifetime JPH0726977B2 (en) | 1988-06-15 | 1988-06-15 | Surge classification circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0726977B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2527627Y2 (en) * | 1990-11-22 | 1997-03-05 | 東日本旅客鉄道株式会社 | Flash indicator |
CN104215821B (en) * | 2014-09-18 | 2017-02-01 | 青岛歌尔声学科技有限公司 | Method for detecting input surge current of power device |
CN112763886B (en) * | 2019-10-21 | 2024-08-09 | 瑞昱半导体股份有限公司 | Device and method for detecting surge occurrence point |
-
1988
- 1988-06-15 JP JP63148835A patent/JPH0726977B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH01314973A (en) | 1989-12-20 |
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